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fix(u-boot): fix phy issues 

* CP was not set correctly
* board config was wrong and changed cn9130 -> cn 9131

This commit needs rework. it is just a hotfix, to get stuff working.
This commit is contained in:
Patrick Vogelaar 2023-05-22 06:01:36 +02:00
parent 0c78536eb5
commit d3092c45d5
5 changed files with 135 additions and 9 deletions
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6
layers/meta-belden-marvell-bsp/conf/machine/cn9130-bldn-mbv.conf
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@ -1,6 +0,0 @@
#@TYPE: Machine
#@NAME: cn9130-bldn-mbv
#@DESCRIPTION: CN9130 SOM based on Bldn MBV-A/B
#
require conf/machine/include/cn913x.inc

6
layers/meta-belden-marvell-bsp/conf/machine/cn9131-bldn-mbv.conf Normal file
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@ -0,0 +1,6 @@
#@TYPE: Machine
#@NAME: cn9131-bldn-mbv
#@DESCRIPTION: CN9131 SOM based on Bldn MBV-A/B
#
require conf/machine/include/cn913x.inc

6
layers/meta-belden-marvell-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.3-solidrun.bb
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@ -15,8 +15,8 @@ COMPATIBLE_MACHINE = "cn913x"
DEPENDS += "mv-ddr-marvell coreutils-native" DEPENDS += "mv-ddr-marvell coreutils-native"
CP_NUM:cn9132 = "3" CP_NUM:cn9131-bldn-mbv = "2"
CP_NUM:cn9130 = "1" CP_NUM:cn9130-cf-pro = "1"
TFA_PLATFORM = "t9130" TFA_PLATFORM = "t9130"
TFA_BUILD_TARGET = "all mrvl_flash" TFA_BUILD_TARGET = "all mrvl_flash"
@ -27,4 +27,4 @@ TFA_UBOOT = "1"
TFA_UEFI = "0" TFA_UEFI = "0"
EXTRA_OEMAKE += "MV_DDR_PATH=${PKG_CONFIG_SYSROOT_DIR}/usr/src/mv-ddr-marvell CP_NUM=${CP_NUM} SCP_BL2=${WORKDIR}/mrvl_scp_bl2.img" EXTRA_OEMAKE += "USE_COHERENT_MEM=0 LOG_LEVEL=20 MV_DDR_PATH=${PKG_CONFIG_SYSROOT_DIR}/usr/src/mv-ddr-marvell CP_NUM=${CP_NUM} SCP_BL2=${WORKDIR}/mrvl_scp_bl2.img"

125
layers/meta-belden-marvell-bsp/recipes-kernel/linux/linux-netmodule/cn9131_linux_copper_and_sfp.patch Normal file
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@ -0,0 +1,125 @@
diff --git a/arch/arm64/boot/dts/marvell/cn9130-bldn-mbv.dts b/arch/arm64/boot/dts/marvell/cn9130-bldn-mbv.dts
index 42faebf55e28..0eb60884810a 100644
--- a/arch/arm64/boot/dts/marvell/cn9130-bldn-mbv.dts
+++ b/arch/arm64/boot/dts/marvell/cn9130-bldn-mbv.dts
@@ -96,7 +96,7 @@ cp0_sfp_eth0: sfp-eth@0 {
compatible = "sff,sfp";
i2c-bus = <&i2c_sfp0>;
mod-def0-gpio = <&cp0_gpio1 27 GPIO_ACTIVE_LOW>; //MPP27
- //maximum-power-milliwatt = <2000>;
+ maximum-power-milliwatt = <2000>;
pinctrl-names = "default";
pinctrl-0 = <&sfp_cp0_eth0_present_pins>;
};
@@ -173,7 +173,7 @@ rtc: rtc@68 {
/*connected to rtc DS1339U-33+*/
};
i2c-switch@73 {
- compatible = "nxp,pca9544";
+ compatible = "nxp,pca9543";
reg = <0x73>;
#address-cells = <1>;
#size-cell = <0>;
@@ -246,11 +246,7 @@ &cp0_eth0 {
managed = "in-band-status";
/* for SFP direct connectivity */
-// sfp = <&cp0_sfp_eth0>;
-
- /* MBV-A BCM PHY | MBV-B VSC Microchip PHY */
-// phy = <&cp0_sfi_phy8>; //address 0x01000
-
+ sfp = <&cp0_sfp_eth0>;
};
/* SRDS #3 - SGMII 1GE on carrier board */
@@ -303,6 +299,13 @@ spi-flash@0 {
reg = <0x0>;
spi-max-frequency = <10000000>;
};
+ spi-cpld@1 {
+ compatible = "rohm,dh2228fv";
+ reg = <0x1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi-max-frequency = <10000000>;
+ };
};
&cp0_syscon0 {
diff --git a/arch/arm64/boot/dts/marvell/cn9131-bldn-mbv.dts b/arch/arm64/boot/dts/marvell/cn9131-bldn-mbv.dts
index b0140000141c..fe93f180e4ac 100644
--- a/arch/arm64/boot/dts/marvell/cn9131-bldn-mbv.dts
+++ b/arch/arm64/boot/dts/marvell/cn9131-bldn-mbv.dts
@@ -42,7 +42,7 @@ cp1_usb3_0_phy1: cp1_usb3_phy@1 {
};
cp1_sfp_eth0: sfp_eth0{
compatible = "sff,sfp";
- // i2c-bus = <&i2c_sfp1>;
+ i2c-bus = <&i2c_sfp1>;
mod-def0-gpio = <&cp1_gpio2 18 GPIO_ACTIVE_LOW>; //MPP50
maximum-power-milliwatt = <2000>;
pinctrl-0 = <&sfp_cp1_present_pins>;
@@ -104,10 +104,7 @@ &cp1_eth0 {
managed = "in-band-status";
/* for SFP direct connectivity */
-// sfp = <&cp1_sfp_eth0>;
-
- /* MBV-A BCM PHY | MBV-B VSC Microchip PHY */
- phy = <&cp1_sfi_phy9>; //address 0x01001
+ sfp = <&cp1_sfp_eth0>;
};
/* SRDS #3 - NC */
@@ -142,25 +139,14 @@ &cp1_gpio2 {
status = "okay";
};
-&cp1_xmdio {
- status = "okay";
- pinctrl-0 = <&cp1_xmdio_pins>;
- cp0_sfi_phy8: ethernet-phy@8 {
- reg = <8>;
- };
- cp1_sfi_phy9: ethernet-phy@9 {
- reg = <9>;
- };
-};
-
&cp1_mdio {
status = "okay";
pinctrl-0 = <&cp1_mdio_pins>;
cp0_vsc_phy18: ethernet-phy@18 {
- reg = <18>;
+ reg = <0x18>;
};
cp0_vsc_phy19: ethernet-phy@19 {
- reg = <19>;
+ reg = <0x19>;
};
};
@@ -237,18 +223,15 @@ cp1_uart1_pins: cp1-uart1-pins-1 {
/*************** definitions of addresses for cp0 eth ports ************/
-&cp0_eth0 {
- status = "okay";
- phy = <&cp0_sfi_phy8>; //address 0x01000
-};
-
&cp0_eth1 {
status = "okay";
phy = <&cp0_vsc_phy18>; //address 0x0011000
+ managed = "auto";
};
&cp0_eth2 {
status = "okay";
phy = <&cp0_vsc_phy19>; //address 0x0011001
+ managed = "auto";
};
-
+
\ No newline at end of file

1
layers/meta-belden-marvell-bsp/recipes-kernel/linux/linux-netmodule_git-5.15-solidrun.bb
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@ -7,6 +7,7 @@ SRC_URI = "git://gitlab.com/netmodule/kernel/linux-netmodule.git;protocol=ssh;us
file://0001-cn913x-fix-compatible-node-inside-dts.patch \ file://0001-cn913x-fix-compatible-node-inside-dts.patch \
file://netfilter.cfg \ file://netfilter.cfg \
file://0001-cn913x-fix-compatible-node-inside-dts-pt-2.patch \ file://0001-cn913x-fix-compatible-node-inside-dts-pt-2.patch \
file://cn9131_linux_copper_and_sfp.patch \
" "
SRCREV ?= "be2f2f0c96e85ecec9d807397194e46bb8bea4a5" SRCREV ?= "be2f2f0c96e85ecec9d807397194e46bb8bea4a5"