README: cleanup mess with tabs

This commit is contained in:
Stefan Eichenberger 2016-04-27 14:37:07 +02:00
parent 8d4835d01a
commit 0309318521
1 changed files with 65 additions and 65 deletions

8
README
View File

@ -31,7 +31,7 @@ http://www.yoctoproject.org/docs/2.0/ref-manual/ref-manual.html
Memory Map of the FPGA (to switch SIMs, reset modems): Memory Map of the FPGA (to switch SIMs, reset modems):
Address Width Name/Comment Address Width Name/Comment
0x0020 16 LED 0x0020 16 LED
LED Control Register LED Control Register
Slice Name Type Reset Description Slice Name Type Reset Description
0 LED0 green RW 1 Enable LED 0 (green) 0 LED0 green RW 1 Enable LED 0 (green)
1 LED0 red RW 1 Enable LED 0 (red) 1 LED0 red RW 1 Enable LED 0 (red)
@ -53,7 +53,7 @@ Address Width Name/Comment
SIM Card Control SIM Card Control
Address Width Name/Comment Address Width Name/Comment
0x0040 16 SIM Ctrl 0x0040 16 SIM Ctrl
SIM Slot Control Register SIM Slot Control Register
Slice Name Type Reset Description Slice Name Type Reset Description
2..0 SIM1_SEL RW 0 000: disconnect 2..0 SIM1_SEL RW 0 000: disconnect
001: Connect Bus 1 001: Connect Bus 1
@ -76,7 +76,7 @@ Address Width Name/Comment
100: Connect Bus 4 100: Connect Bus 4
Note: If no SIM Card is inserted, the power is disable of the corresponding slot. Note: If no SIM Card is inserted, the power is disable of the corresponding slot.
11 N/A R 0 Reserved 11 N/A R 0 Reserved
14..12 SIM4_SEL RW 0 000: disconnect 14..12 SIM4_SE RW 0 000: disconnect
001: Connect Bus 1 001: Connect Bus 1
010: Connect Bus 2 010: Connect Bus 2
011: Connect Bus 3 011: Connect Bus 3
@ -88,7 +88,7 @@ Address Width Name/Comment
PCIe Mini Slot Control: PCIe Mini Slot Control:
Address Width Name/Comment Address Width Name/Comment
0x0030 16 PCIe Reset 0x0030 16 PCIe Reset
PCIe Slot Reset PCIe Slot Reset
Slice Name Type Reset Description Slice Name Type Reset Description
0 PCIe1 RST~ RW 0 PCIe Slot 1 Reset 0 PCIe1 RST~ RW 0 PCIe Slot 1 Reset
0: reset asserted 0: reset asserted