arm64: mvebu: Add Armada 3700 db-88f3720 development board support
This patch adds basic support for the Marvell Armada 3700 DB-88F3720 development board. Supported are the following interfaces: - UART - SPI (incl. SPI NOR) - I2C - Ethernet Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com>
This commit is contained in:
Stefan Roese
parent
f61aefc150
commit
01e62c7f11
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@ -56,6 +56,10 @@ config TARGET_CLEARFOG
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bool "Support ClearFog"
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select 88F6820
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config TARGET_MVEBU_DB_88F3720
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bool "Support DB-88F3720 Armada 3720"
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select ARMADA_3700
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config TARGET_DB_88F6720
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bool "Support DB-88F6720 Armada 375"
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select ARMADA_375
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@ -88,6 +92,7 @@ endchoice
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config SYS_BOARD
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default "clearfog" if TARGET_CLEARFOG
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default "mvebu_db-88f3720" if TARGET_MVEBU_DB_88F3720
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default "db-88f6720" if TARGET_DB_88F6720
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default "db-88f6820-gp" if TARGET_DB_88F6820_GP
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default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
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@ -98,6 +103,7 @@ config SYS_BOARD
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config SYS_CONFIG_NAME
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default "clearfog" if TARGET_CLEARFOG
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default "mvebu_db-88f3720" if TARGET_MVEBU_DB_88F3720
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default "db-88f6720" if TARGET_DB_88F6720
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default "db-88f6820-gp" if TARGET_DB_88F6820_GP
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default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
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@ -108,6 +114,7 @@ config SYS_CONFIG_NAME
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config SYS_VENDOR
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default "Marvell" if TARGET_DB_MV784MP_GP
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default "Marvell" if TARGET_MVEBU_DB_88F3720
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default "Marvell" if TARGET_DB_88F6720
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default "Marvell" if TARGET_DB_88F6820_GP
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default "Marvell" if TARGET_DB_88F6820_AMC
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@ -0,0 +1,6 @@
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MVEBU_DB_88F3720 BOARD
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M: Stefan Roese <sr@denx.de>
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S: Maintained
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F: board/Marvell/mvebu_db-88f3720/
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F: include/configs/mvebu_db-88f3720.h
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F: configs/mvebu_db-88f3720_defconfig
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@ -0,0 +1,7 @@
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#
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# Copyright (C) 2016 Stefan Roese <sr@denx.de>
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y := board.o
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@ -0,0 +1,134 @@
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/*
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* Copyright (C) 2016 Stefan Roese <sr@denx.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <i2c.h>
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#include <asm/io.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/soc.h>
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DECLARE_GLOBAL_DATA_PTR;
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/* IO expander I2C device */
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#define I2C_IO_EXP_ADDR 0x22
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#define I2C_IO_CFG_REG_0 0x6
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#define I2C_IO_DATA_OUT_REG_0 0x2
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#define I2C_IO_REG_0_SATA_OFF 2
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#define I2C_IO_REG_0_USB_H_OFF 1
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int board_early_init_f(void)
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{
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/* Nothing to do (yet), perhaps later some pin-muxing etc */
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return 0;
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}
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int board_init(void)
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{
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/* adress of boot parameters */
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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return 0;
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}
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/* Board specific AHCI / SATA enable code */
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int board_ahci_enable(void)
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{
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struct udevice *dev;
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int ret;
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u8 buf[8];
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/* Configure IO exander PCA9555: 7bit address 0x22 */
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ret = i2c_get_chip_for_busnum(0, I2C_IO_EXP_ADDR, 1, &dev);
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if (ret) {
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printf("Cannot find PCA9555: %d\n", ret);
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return 0;
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}
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ret = dm_i2c_read(dev, I2C_IO_CFG_REG_0, buf, 1);
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if (ret) {
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printf("Failed to read IO expander value via I2C\n");
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return -EIO;
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}
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/*
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* Enable SATA power via IO expander connected via I2C by setting
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* the corresponding bit to output mode to enable power for SATA
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*/
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buf[0] &= ~(1 << I2C_IO_REG_0_SATA_OFF);
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ret = dm_i2c_write(dev, I2C_IO_CFG_REG_0, buf, 1);
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if (ret) {
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printf("Failed to set IO expander via I2C\n");
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return -EIO;
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}
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return 0;
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}
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/* Board specific xHCI enable code */
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int board_xhci_enable(void)
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{
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struct udevice *dev;
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int ret;
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u8 buf[8];
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/* Configure IO exander PCA9555: 7bit address 0x22 */
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ret = i2c_get_chip_for_busnum(0, I2C_IO_EXP_ADDR, 1, &dev);
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if (ret) {
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printf("Cannot find PCA9555: %d\n", ret);
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return 0;
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}
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printf("Enable USB VBUS\n");
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/*
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* Read configuration (direction) and set VBUS pin as output
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* (reset pin = output)
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*/
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ret = dm_i2c_read(dev, I2C_IO_CFG_REG_0, buf, 1);
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if (ret) {
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printf("Failed to read IO expander value via I2C\n");
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return -EIO;
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}
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buf[0] &= ~(1 << I2C_IO_REG_0_USB_H_OFF);
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ret = dm_i2c_write(dev, I2C_IO_CFG_REG_0, buf, 1);
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if (ret) {
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printf("Failed to set IO expander via I2C\n");
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return -EIO;
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}
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/* Read VBUS output value and disable it */
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ret = dm_i2c_read(dev, I2C_IO_DATA_OUT_REG_0, buf, 1);
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if (ret) {
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printf("Failed to read IO expander value via I2C\n");
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return -EIO;
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}
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buf[0] &= ~(1 << I2C_IO_REG_0_USB_H_OFF);
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ret = dm_i2c_write(dev, I2C_IO_DATA_OUT_REG_0, buf, 1);
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if (ret) {
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printf("Failed to set IO expander via I2C\n");
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return -EIO;
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}
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/*
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* Required delay for configuration to settle - must wait for
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* power on port is disabled in case VBUS signal was high,
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* required 3 seconds delay to let VBUS signal fully settle down
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*/
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mdelay(3000);
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/* Enable VBUS power: Set output value of VBUS pin as enabled */
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buf[0] |= (1 << I2C_IO_REG_0_USB_H_OFF);
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ret = dm_i2c_write(dev, I2C_IO_DATA_OUT_REG_0, buf, 1);
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if (ret) {
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printf("Failed to set IO expander via I2C\n");
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return -EIO;
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}
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mdelay(500); /* required delay to let output value settle */
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return 0;
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}
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@ -0,0 +1,49 @@
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CONFIG_ARM=y
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CONFIG_ARCH_MVEBU=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_TARGET_MVEBU_DB_88F3720=y
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CONFIG_DEFAULT_DEVICE_TREE="armada-3720-db"
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CONFIG_AHCI=y
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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# CONFIG_CMD_IMLS is not set
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_SF=y
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CONFIG_CMD_SPI=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_USB=y
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# CONFIG_CMD_FPGA is not set
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_TFTPPUT=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_TIME=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_EXT4_WRITE=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_FS_GENERIC=y
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CONFIG_BLOCK_CACHE=y
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CONFIG_DM_I2C=y
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CONFIG_DM_I2C_COMPAT=y
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CONFIG_MISC=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_PHYLIB=y
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CONFIG_MVEBU_COMPHY_SUPPORT=y
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# CONFIG_SPL_SERIAL_PRESENT is not set
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CONFIG_DEBUG_UART=y
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CONFIG_DEBUG_MVEBU_A3700_UART=y
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CONFIG_DEBUG_UART_BASE=0xd0012000
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CONFIG_DEBUG_UART_CLOCK=25804800
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_DEBUG_UART_ANNOUNCE=y
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CONFIG_MVEBU_A3700_UART=y
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CONFIG_MVEBU_A3700_SPI=y
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CONFIG_USB=y
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CONFIG_DM_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_STORAGE=y
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@ -0,0 +1,144 @@
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/*
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* Copyright (C) 2016 Stefan Roese <sr@denx.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _CONFIG_MVEBU_DB_88F3720_H
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#define _CONFIG_MVEBU_DB_88F3720_H
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/*
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* High Level Configuration Options (easy to change)
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*/
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#define CONFIG_DISPLAY_BOARDINFO_LATE
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#define CONFIG_ARCH_EARLY_INIT_R
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#define CONFIG_SYS_TEXT_BASE 0x00000000
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/* additions for new ARM relocation support */
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#define CONFIG_SYS_SDRAM_BASE 0x00000000
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#define CONFIG_NR_DRAM_BANKS 1
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/* auto boot */
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#define CONFIG_PREBOOT
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
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115200, 230400, 460800, 921600 }
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/*
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* For booting Linux, the board info and command line data
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* have to be in the first 8 MB of memory, since this is
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* the maximum mapped by the Linux kernel during initialization.
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*/
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_INITRD_TAG /* enable INITRD tag */
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#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
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+sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buff */
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MiB for malloc() */
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/*
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* Other required minimal configurations
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*/
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */
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#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
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#define CONFIG_BOARD_EARLY_INIT_F /* call board_init_f for early inits */
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#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
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#define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */
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#define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */
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#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
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#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
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#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */
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#define CONFIG_SYS_ALT_MEMTEST
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/* End of 16M scrubbed by training in bootrom */
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000)
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/*
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* I2C
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*/
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#define CONFIG_I2C_MV
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#define CONFIG_SYS_I2C_SLAVE 0x0
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/*
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* SPI Flash configuration
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*/
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#define CONFIG_ENV_SPI_BUS 0
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#define CONFIG_ENV_SPI_CS 0
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/* SPI NOR flash default params, used by sf commands */
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#define CONFIG_SF_DEFAULT_SPEED 1000000
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#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
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#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
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/* Environment in SPI NOR flash */
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#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */
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#define CONFIG_ENV_IS_IN_SPI_FLASH
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#define CONFIG_ENV_OFFSET 0x180000 /* as Marvell U-Boot version */
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#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
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#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */
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/*
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* Ethernet Driver configuration
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*/
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#define CONFIG_MVNETA /* Enable Marvell Gbe Controller Driver */
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#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
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#define CONFIG_PHY_GIGE /* GbE speed/duplex detect */
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#define CONFIG_ARP_TIMEOUT 200
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#define CONFIG_NET_RETRY_COUNT 50
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/* USB 2.0 */
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
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/* USB 3.0 */
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#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 3
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#define CONFIG_USB_MAX_CONTROLLER_COUNT (CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS + \
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CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS)
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/* USB ethernet */
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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#define CONFIG_USB_ETHER_MCS7830
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#define CONFIG_USB_ETHER_RTL8152
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#define CONFIG_USB_ETHER_SMSC95XX
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/*
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* SATA/SCSI/AHCI configuration
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*/
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#define CONFIG_SCSI
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#define CONFIG_SCSI_AHCI
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#define CONFIG_SCSI_AHCI_PLAT
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#define CONFIG_LIBATA
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#define CONFIG_LBA48
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#define CONFIG_SYS_64BIT_LBA
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#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
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#define CONFIG_SYS_SCSI_MAX_LUN 1
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#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
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CONFIG_SYS_SCSI_MAX_LUN)
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#define CONFIG_SUPPORT_VFAT
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/* DISK Partition support */
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#define CONFIG_EFI_PARTITION
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#define CONFIG_DOS_PARTITION
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#define CONFIG_MAC_PARTITION
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#define CONFIG_ISO_PARTITION /* Experimental */
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#define CONFIG_CMD_PART
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#define CONFIG_PARTITION_UUIDS
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#endif /* _CONFIG_MVEBU_DB_88F3720_H */
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