hw25: add start reason detection
This commit is contained in:
Rene Straub
parent
7e9ca6d8fa
commit
0330a6b94f
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@ -10,4 +10,4 @@ ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
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obj-y := mux.o
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endif
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obj-y += board.o ../common/bdparser.o ../common/board_descriptor.o ../common/da9063.o fileaccess.o
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obj-y += board.o ../common/bdparser.o ../common/board_descriptor.o ../common/da9063.o ../common/ether_crc.o fileaccess.o
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@ -34,6 +34,7 @@
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#include "../common/bdparser.h"
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#include "../common/board_descriptor.h"
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#include "../common/da9063.h"
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#include "../common/ether_crc.h"
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#include "board.h"
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#include "fileaccess.h"
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@ -119,6 +120,7 @@ static int hw_type = -1;
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static char hw_variant_name[64];
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#else
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static int hw_type = -1;
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static uint32_t sys_start_event = 0x0;
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#endif
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#if !defined(CONFIG_SPL_BUILD)
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@ -294,31 +296,6 @@ struct dpll_params dpll_ddr = {
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DDR3_CLOCK_FREQUENCY, OSC-1, 1, -1, -1, -1, -1
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};
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// TODO: Since there is no ignition logic (with edge generator) on hw25
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// TODO: the following is not required
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#if 0
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static void pmic_ignition_gate_on(void)
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{
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uint8_t val;
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/* Configure GPIO15 to permanent high, so that ignition sense signal is readable */
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(void)da9063_set_reg(PMIC_REG_GPIO14_15, 0xCC); /* GPIO14/15 = Outputs open drain */
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(void)da9063_get_reg(PMIC_REG_CONFIG_L, &val); /* Enable pull ups on GPIO14/15 */
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val |= 0xC0;
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(void)da9063_set_reg(PMIC_REG_CONFIG_L, val);
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(void)da9063_get_reg(PMIC_REG_CONTROL_D, &val); /* No blinking, state selected by GPIOxx_MODE */
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val &= ~0xF8;
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(void)da9063_set_reg(PMIC_REG_CONTROL_D, val);
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(void)da9063_get_reg(PMIC_REG_GPIO_MODE8_15, &val); /* Set to GPIO14,15 to high */
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val |= 0xC0;
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(void)da9063_set_reg(PMIC_REG_GPIO_MODE8_15, val);
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}
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#endif
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static void init_pmic_spl(void)
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{
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int bus;
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@ -339,60 +316,152 @@ static void init_pmic_spl(void)
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}
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struct reset_registers {
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uint32_t value;
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uint32_t value_crc;
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/* Reboot Reasons, set by OS, expect watchdog set by bootloader */
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uint32_t rr_value;
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uint32_t rr_value_crc;
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/* Start Events */
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uint32_t se_magic; /* Token to check presence of following fields */
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uint32_t se_events; /* Events bitmask, see SE_... defines */
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uint32_t se_checksum; /* Checksum over se_events */
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};
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#ifdef CONFIG_NRSW_BUILD
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/* Watchdog reboot reason event */
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#define RR_EXTERNAL_WATCHDOG_PATTERN 0x781f9ce2
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/* TODO: Move ethernet crc to dedicated file */
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static uint32_t ether_crc(size_t len, uint8_t const *p)
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/* Start event token 'SRTE' */
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#define SE_MAGIC 0x53525445
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/* Possible start events (see se_events) */
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#define SE_POR 0x00000001
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#define SE_WATCHDOG 0x00000010
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#define SE_IGNITION 0x00000100
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#define SE_RTC_ALARM 0x00000200
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#define SE_RTC_TICK 0x00000400
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static void print_start_reason(uint32_t events)
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{
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uint32_t crc;
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unsigned i;
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puts("\nStart Events: ");
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crc = ~0;
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while (len--) {
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crc ^= *p++;
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for (i = 0; i < 8; i++)
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crc = (crc >> 1) ^ ((crc & 1) ? 0xedb88320 : 0);
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if (events == 0) {
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puts("-\n");
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}
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else {
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static char buffer[10+11+11+6+6+1];
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buffer[0] = 0;
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if (events & SE_POR)
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strncat(buffer, "PowerOn, ", sizeof(buffer));
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if (events & SE_WATCHDOG)
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strncat(buffer, "Watchdog, ", sizeof(buffer));
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if (events & SE_IGNITION)
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strncat(buffer, "Ignition, ", sizeof(buffer));
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if (events & SE_RTC_ALARM)
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strncat(buffer, "RTC, ", sizeof(buffer));
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if (events & SE_RTC_TICK)
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strncat(buffer, "Tick, ", sizeof(buffer));
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/* an reverse the bits, cuz of way they arrive -- last-first */
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crc = (crc >> 16) | (crc << 16);
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crc = (crc >> 8 & 0x00ff00ff) | (crc << 8 & 0xff00ff00);
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crc = (crc >> 4 & 0x0f0f0f0f) | (crc << 4 & 0xf0f0f0f0);
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crc = (crc >> 2 & 0x33333333) | (crc << 2 & 0xcccccccc);
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crc = (crc >> 1 & 0x55555555) | (crc << 1 & 0xaaaaaaaa);
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return crc;
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/* Trim last comma, no 0 len check required, at least one entry is present */
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buffer[strlen(buffer)-2] = 0;
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printf("%s\n", buffer);
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}
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}
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void check_pmic_reset_reason(unsigned int reset_reason_shm_location)
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static void check_pmic_reset_reason(unsigned int reset_reason_shm_location)
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{
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volatile struct reset_registers* reset_regs = (struct reset_registers*)reset_reason_shm_location;
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uint32_t start_event = 0;
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uint8_t state = 0x00;
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int bus;
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int ret;
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bus = da9063_claim_i2c_bus();
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/*
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* Check/write boot marker to GP_ID_0
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* If this marker is not present, we have a power on reset
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*/
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ret = da9063_get_reg(PMIC_GP_ID_0, &state);
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if ((ret == 0) && (state != 0xC5)) {
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start_event |= SE_POR;
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(void)da9063_set_reg(PMIC_GP_ID_0, 0xC5);
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}
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/*
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* Check Fault Log register for
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* - Power On Reset: No Power, RTC Delivery -> requires removal of RTC battery
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* - Watchdog
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*/
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ret = da9063_get_reg(PMIC_REG_FAULT_LOG, &state);
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if ((ret == 0) && (state != 0)) {
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// PMIC Watchdog
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if (state & PMIC_FAULT_TWD_ERROR_MASK) {
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reset_regs->value = EXTERNAL_WATCHDOG_PATTERN;
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reset_regs->value_crc = ether_crc(sizeof(reset_regs->value),
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(const uint8_t*)&(reset_regs->value));
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start_event |= SE_WATCHDOG;
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reset_regs->rr_value = RR_EXTERNAL_WATCHDOG_PATTERN;
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reset_regs->rr_value_crc = ether_crc(sizeof(reset_regs->rr_value),
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(const uint8_t*)&(reset_regs->rr_value));
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}
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// PMIC Power On Reset (only when RTC battery is removed)
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if (state & PMIC_FAULT_POR_MASK) {
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start_event |= SE_POR;
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}
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/* clear pmic fault log by writing back all bits currently set */
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da9063_set_reg(PMIC_REG_FAULT_LOG, state);
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(void)da9063_set_reg(PMIC_REG_FAULT_LOG, state);
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}
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da9063_release_i2c_bus(bus);
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}
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/*
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* Event Register A
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* - Event B Activity
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* - RTC Alarm
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* - RTC Tick
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*/
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ret = da9063_get_reg(PMIC_REG_EVENT_A, &state);
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if ((ret == 0) && (state != 0)) {
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(void)da9063_set_reg(PMIC_REG_EVENT_A, state);
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#endif
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if (state & PMIC_REG_EVENT_RTC_ALARM_MASK) {
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start_event |= SE_RTC_ALARM;
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}
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if (state & PMIC_REG_EVENT_RTC_TICK_MASK) {
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start_event |= SE_RTC_TICK;
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}
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if (state & PMIC_REG_EVENT_EVENTS_B_MASK) {
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/*
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* Event Register B
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* - COMP 1V2: Ignition
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*/
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ret = da9063_get_reg(PMIC_REG_EVENT_B, &state);
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if ((ret == 0) && (state != 0)) {
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(void)da9063_set_reg(PMIC_REG_EVENT_B, state);
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if (state & PMIC_REG_EVENT_COMP1V2_MASK) {
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start_event |= SE_IGNITION;
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}
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}
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}
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/* TODO: Should we clear events here or leave them for Linux driver? */
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}
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sys_start_event = start_event;
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/* Store start events in shared memory region for OS */
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reset_regs->se_magic = SE_MAGIC;
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reset_regs->se_events = start_event;
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reset_regs->se_checksum = 0;
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reset_regs->se_checksum = ether_crc(sizeof(reset_regs->se_events),
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(const uint8_t*)&(reset_regs->se_events));
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da9063_release_i2c_bus(bus);
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print_start_reason(reset_regs->se_events);
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}
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static void init_bd_spl(void)
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{
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@ -426,6 +495,9 @@ void am33xx_spl_board_init(void)
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/* Get board descriptor */
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init_bd_spl();
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/* Detect reset/Wakeup reason */
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check_pmic_reset_reason(RESET_REASON_SHM_LOCATION);
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/* Setup PMIC */
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init_pmic_spl();
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@ -438,10 +510,6 @@ void am33xx_spl_board_init(void)
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/* Set MPU Frequency to what we detected now that voltages are set */
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do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100);
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#ifdef CONFIG_NRSW_BUILD
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check_pmic_reset_reason(RESET_REASON_SHM_LOCATION);
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#endif
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/* Debugger can place marker at end of SRAM to stop boot here */
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if (is_jtag_boot(CONFIG_JTAG_MARKER_SPL))
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{
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@ -308,10 +308,7 @@ int eth_phy_timeout(void);
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#define CONFIG_JTAG_MARKER_UBOOT 0x807FFF00
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/* NRSW PMIC Reset Reason */
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#ifdef CONFIG_NRSW_BUILD
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#define RESET_REASON_SHM_LOCATION 0x8e000000
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#define EXTERNAL_WATCHDOG_PATTERN 0x781f9ce2
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#endif
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/* SPL command is not needed */
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