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dt-bindings: ti-serdes-mux: Add defines for J784S4 SoC 

There are 4 instances of SERDES modules, with each instance supporting 4
lanes.

Signed-off-by: Matthew Ranostay <mranostay@ti.com>
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
This commit is contained in:
Hari Nagalla 2023-04-12 14:48:39 -05:00 committed by Udit Kumar
parent 50da3bbab2
commit 0355e7ebd9
1 changed files with 62 additions and 0 deletions
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62
include/dt-bindings/mux/ti-serdes.h
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@ -117,4 +117,66 @@
#define J721S2_SERDES0_LANE3_USB 0x2
#define J721S2_SERDES0_LANE3_IP4_UNUSED 0x3
/* J784S4 */
#define J784S4_SERDES0_LANE0_IP1_UNUSED 0x0
#define J784S4_SERDES0_LANE0_PCIE1_LANE0 0x1
#define J784S4_SERDES0_LANE0_IP3_UNUSED 0x2
#define J784S4_SERDES0_LANE0_IP4_UNUSED 0x3
#define J784S4_SERDES0_LANE1_IP1_UNUSED 0x0
#define J784S4_SERDES0_LANE1_PCIE1_LANE1 0x1
#define J784S4_SERDES0_LANE1_IP3_UNUSED 0x2
#define J784S4_SERDES0_LANE1_IP4_UNUSED 0x3
#define J784S4_SERDES0_LANE2_PCIE3_LANE0 0x0
#define J784S4_SERDES0_LANE2_PCIE1_LANE2 0x1
#define J784S4_SERDES0_LANE2_IP3_UNUSED 0x2
#define J784S4_SERDES0_LANE2_IP4_UNUSED 0x3
#define J784S4_SERDES0_LANE3_PCIE3_LANE1 0x0
#define J784S4_SERDES0_LANE3_PCIE1_LANE3 0x1
#define J784S4_SERDES0_LANE3_USB 0x2
#define J784S4_SERDES0_LANE3_IP4_UNUSED 0x3
#define J784S4_SERDES1_LANE0_QSGMII_LANE3 0x0
#define J784S4_SERDES1_LANE0_PCIE0_LANE0 0x1
#define J784S4_SERDES1_LANE0_IP3_UNUSED 0x2
#define J784S4_SERDES1_LANE0_IP4_UNUSED 0x3
#define J784S4_SERDES1_LANE1_QSGMII_LANE4 0x0
#define J784S4_SERDES1_LANE1_PCIE0_LANE1 0x1
#define J784S4_SERDES1_LANE1_IP3_UNUSED 0x2
#define J784S4_SERDES1_LANE1_IP4_UNUSED 0x3
#define J784S4_SERDES1_LANE2_QSGMII_LANE1 0x0
#define J784S4_SERDES1_LANE2_PCIE0_LANE2 0x1
#define J784S4_SERDES1_LANE2_PCIE2_LANE0 0x2
#define J784S4_SERDES1_LANE2_IP4_UNUSED 0x3
#define J784S4_SERDES1_LANE3_QSGMII_LANE2 0x0
#define J784S4_SERDES1_LANE3_PCIE0_LANE3 0x1
#define J784S4_SERDES1_LANE3_PCIE2_LANE1 0x2
#define J784S4_SERDES1_LANE3_IP4_UNUSED 0x3
#define J784S4_SERDES2_LANE0_QSGMII_LANE5 0x0
#define J784S4_SERDES2_LANE0_IP2_UNUSED 0x1
#define J784S4_SERDES2_LANE0_IP3_UNUSED 0x2
#define J784S4_SERDES2_LANE0_IP4_UNUSED 0x3
#define J784S4_SERDES2_LANE1_QSGMII_LANE6 0x0
#define J784S4_SERDES2_LANE1_IP2_UNUSED 0x1
#define J784S4_SERDES2_LANE1_IP3_UNUSED 0x2
#define J784S4_SERDES2_LANE1_IP4_UNUSED 0x3
#define J784S4_SERDES2_LANE2_QSGMII_LANE7 0x0
#define J784S4_SERDES2_LANE2_QSGMII_LANE1 0x1
#define J784S4_SERDES2_LANE2_IP3_UNUSED 0x2
#define J784S4_SERDES2_LANE2_IP4_UNUSED 0x3
#define J784S4_SERDES2_LANE3_QSGMII_LANE8 0x0
#define J784S4_SERDES2_LANE3_QSGMII_LANE2 0x1
#define J784S4_SERDES2_LANE3_IP3_UNUSED 0x2
#define J784S4_SERDES2_LANE3_IP4_UNUSED 0x3
#endif /* _DT_BINDINGS_MUX_TI_SERDES */