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Merge git://git.denx.de/u-boot-marvell 

- Add DM based generic watchdog start and reset implementation
  and remove all ad-hoc implementations (Stefan)
- Move mv_sdhci to DM (Pierre)
- Misc turris_omnia updates (Pierre)
- Change openrd targets to correctly build again (size changes
  and fixes to the dts targets) and bring it back into Travis
  builds (Stefan)
- Add Kirkwood db-88f6281-bp board (Chris)
This commit is contained in:
Tom Rini 2019-04-26 13:50:00 -04:00
parent 1c64692df2 b684d4031b
commit 07b68b7843
45 changed files with 743 additions and 345 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
.travis.yml
View File

@ -235,9 +235,9 @@ matrix:
env:
- BUILDMAN="sandbox x86"
TOOLCHAIN="i386"
- name: "buildman kirkwood (excluding openrd)"
- name: "buildman kirkwood"
env:
- BUILDMAN="kirkwood -x openrd"
- BUILDMAN="kirkwood"
- name: "buildman mvebu"
env:
- BUILDMAN="mvebu"

5
arch/arm/dts/Makefile
View File

@ -37,6 +37,8 @@ dtb-$(CONFIG_KIRKWOOD) += \
kirkwood-atl-sbx81lifxcat.dtb \
kirkwood-blackarmor-nas220.dtb \
kirkwood-d2net.dtb \
kirkwood-db-88f6281.dtb \
kirkwood-db-88f6281-spi.dtb \
kirkwood-dns325.dtb \
kirkwood-dockstar.dtb \
kirkwood-dreamplug.dtb \
@ -54,6 +56,9 @@ dtb-$(CONFIG_KIRKWOOD) += \
kirkwood-ns2lite.dtb \
kirkwood-ns2max.dtb \
kirkwood-ns2mini.dtb \
kirkwood-openrd-base.dtb \
kirkwood-openrd-client.dtb \
kirkwood-openrd-ultimate.dtb \
kirkwood-pogo_e02.dtb \
kirkwood-sheevaplug.dtb

48
arch/arm/dts/kirkwood-db-88f6281-spi.dts Normal file
View File

@ -0,0 +1,48 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Marvell DB-88F6281-BP Development Board Setup
*
* Saeed Bishara <saeed@marvell.com>
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
*
*/
/dts-v1/;
#include "kirkwood-db-88f6281.dts"
/ {
aliases {
spi0 = &spi0;
};
};
&spi0 {
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p128", "jedec,spi-nor", "spi-flash";
reg = <0>;
spi-max-frequency = <50000000>;
mode = <0>;
partition@u-boot {
reg = <0x00000000 0x00c00000>;
label = "u-boot";
};
partition@u-boot-env {
reg = <0x00c00000 0x00040000>;
label = "u-boot-env";
};
partition@unused {
reg = <0x00100000 0x00f00000>;
label = "unused";
};
};
};
&nand {
status = "disabled";
};

26
arch/arm/dts/kirkwood-db-88f6281.dts Normal file
View File

@ -0,0 +1,26 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Marvell DB-88F6281-BP Development Board Setup
*
* Saeed Bishara <saeed@marvell.com>
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
*
*/
/dts-v1/;
#include "kirkwood-db.dtsi"
#include "kirkwood-6281.dtsi"
/ {
model = "Marvell DB-88F6281-BP Development Board";
compatible = "marvell,db-88f6281-bp", "marvell,kirkwood-88f6281", "marvell,kirkwood";
};
&pciec {
status = "okay";
};
&pcie0 {
status = "okay";
};

94
arch/arm/dts/kirkwood-db.dtsi Normal file
View File

@ -0,0 +1,94 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Marvell DB-{88F6281,88F6282}-BP Development Board Setup
*
* Saeed Bishara <saeed@marvell.com>
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
*
* This file contains the definitions that are common between the 6281
* and 6282 variants of the Marvell Kirkwood Development Board.
*/
#include "kirkwood.dtsi"
/ {
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>; /* 512 MB */
};
chosen {
bootargs = "console=ttyS0,115200n8 earlyprintk";
stdout-path = &uart0;
};
aliases {
ethernet0 = &eth0;
spi0 = &spi0;
};
ocp@f1000000 {
pin-controller@10000 {
pmx_sdio_gpios: pmx-sdio-gpios {
marvell,pins = "mpp37", "mpp38";
marvell,function = "gpio";
};
};
serial@12000 {
status = "okay";
};
sata@80000 {
nr-ports = <2>;
status = "okay";
};
ehci@50000 {
status = "okay";
};
mvsdio@90000 {
pinctrl-0 = <&pmx_sdio_gpios>;
pinctrl-names = "default";
wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
cd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
status = "okay";
};
};
};
&nand {
chip-delay = <25>;
status = "okay";
partition@0 {
label = "uboot";
reg = <0x0 0x100000>;
};
partition@100000 {
label = "uImage";
reg = <0x100000 0x400000>;
};
partition@500000 {
label = "root";
reg = <0x500000 0x1fb00000>;
};
};
&mdio {
status = "okay";
ethphy0: ethernet-phy@8 {
reg = <8>;
};
};
&eth0 {
status = "okay";
ethernet0-port@0 {
phy-handle = <&ethphy0>;
};
};

45
arch/arm/mach-at91/clock.c
View File

@ -14,8 +14,6 @@
#define EN_UPLL_TIMEOUT 500
static struct udevice *watchdog_dev __attribute__((section(".data"))) = NULL;
void at91_periph_clk_enable(int id)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
@ -123,46 +121,3 @@ void at91_pllicpr_init(u32 icpr)
writel(icpr, &pmc->pllicpr);
}
/* Called by macro WATCHDOG_RESET */
void watchdog_reset(void)
{
static ulong next_reset;
ulong now;
if (!watchdog_dev)
return;
now = get_timer(0);
/* Do not reset the watchdog too often */
if (now > next_reset) {
next_reset = now + 1000; /* reset every 1000ms */
wdt_reset(watchdog_dev);
}
}
int arch_early_init_r(void)
{
struct at91_wdt_priv *priv;
/* Init watchdog */
if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) {
debug("Watchdog: Not found by seq!\n");
if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) {
puts("Watchdog: Not found!\n");
return 0;
}
}
priv = dev_get_priv(watchdog_dev);
if (!priv) {
printf("Watchdog: priv not available!\n");
return 0;
}
wdt_start(watchdog_dev, priv->timeout * 1000, 0);
printf("Watchdog: Started\n");
return 0;
}

2
arch/arm/mach-at91/include/mach/at91_wdt.h
View File

@ -28,7 +28,6 @@ typedef struct at91_wdt {
struct at91_wdt_priv {
void __iomem *regs;
u32 regval;
u32 timeout;
};
#endif
@ -51,6 +50,5 @@ struct at91_wdt_priv {
/* Hardware timeout in seconds */
#define WDT_MAX_TIMEOUT 16
#define WDT_DEFAULT_TIMEOUT 2
#endif

4
arch/arm/mach-kirkwood/Kconfig
View File

@ -65,6 +65,9 @@ config TARGET_SBx81LIFKW
config TARGET_SBx81LIFXCAT
bool "Allied Telesis SBx81GP24/SBx81GT24"
config TARGET_DB_88F6281_BP
bool "Marvell DB-88F6281-BP"
endchoice
config SYS_SOC
@ -89,5 +92,6 @@ source "board/Seagate/nas220/Kconfig"
source "board/zyxel/nsa310s/Kconfig"
source "board/alliedtelesis/SBx81LIFKW/Kconfig"
source "board/alliedtelesis/SBx81LIFXCAT/Kconfig"
source "board/Marvell/db-88f6281-bp/Kconfig"
endif

2
arch/arm/mach-mvebu/cpu.c
View File

@ -520,7 +520,7 @@ int arch_misc_init(void)
}
#endif /* CONFIG_ARCH_MISC_INIT */
#ifdef CONFIG_MMC_SDHCI_MV
#if defined(CONFIG_MMC_SDHCI_MV) && !defined(CONFIG_DM_MMC)
int board_mmc_init(bd_t *bis)
{
mv_sdh_init(MVEBU_SDIO_BASE, 0, 0,

2
arch/arm/mach-mvebu/include/mach/cpu.h
View File

@ -144,7 +144,9 @@ u32 mvebu_get_nand_clock(void);
void return_to_bootrom(void);
#ifndef CONFIG_DM_MMC
int mv_sdh_init(unsigned long regbase, u32 max_clk, u32 min_clk, u32 quirks);
#endif
void get_sar_freq(struct sar_freq_modes *sar_freq);

36
arch/mips/mach-mt7620/cpu.c
View File

@ -69,28 +69,6 @@ int print_cpuinfo(void)
return 0;
}
#ifdef CONFIG_WATCHDOG
static struct udevice *watchdog_dev __attribute__((section(".data"))) = NULL;
/* Called by macro WATCHDOG_RESET */
void watchdog_reset(void)
{
static ulong next_reset;
ulong now;
if (!watchdog_dev)
return;
now = get_timer(0);
/* Do not reset the watchdog too often */
if (now > next_reset) {
next_reset = now + 1000; /* reset every 1000ms */
wdt_reset(watchdog_dev);
}
}
#endif
int arch_misc_init(void)
{
/*
@ -103,19 +81,5 @@ int arch_misc_init(void)
flush_dcache_range(gd->bd->bi_memstart,
gd->bd->bi_memstart + gd->ram_size - 1);
#ifdef CONFIG_WATCHDOG
/* Init watchdog */
if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) {
debug("Watchdog: Not found by seq!\n");
if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) {
puts("Watchdog: Not found!\n");
return 0;
}
}
wdt_start(watchdog_dev, 60000, 0); /* 60 seconds */
printf("Watchdog: Started\n");
#endif
return 0;
}

2
arch/powerpc/Kconfig
View File

@ -35,7 +35,7 @@ config MPC8xx
bool "MPC8xx"
select BOARD_EARLY_INIT_F
imply CMD_REGINFO
imply MPC8xx_WATCHDOG
imply WDT_MPC8xx
endchoice

6
arch/powerpc/cpu/mpc8xx/Kconfig
View File

@ -25,9 +25,9 @@ config MPC885
endchoice
config MPC8xx_WATCHDOG
bool "Watchdog"
select HW_WATCHDOG
#config MPC8xx_WATCHDOG
# bool "Watchdog"
# select HW_WATCHDOG
config 8xx_GCLK_FREQ
int "CPU GCLK Frequency"

30
board/CZ.NIC/turris_mox/turris_mox.c
View File

@ -119,41 +119,11 @@ int board_fix_fdt(void *blob)
}
#endif
#ifdef CONFIG_WDT_ARMADA_37XX
static struct udevice *watchdog_dev __attribute__((section(".data"))) = NULL;
void watchdog_reset(void)
{
static ulong next_reset;
ulong now;
if (!watchdog_dev)
return;
now = timer_get_us();
/* Do not reset the watchdog too often */
if (now > next_reset) {
wdt_reset(watchdog_dev);
next_reset = now + 100000;
}
}
#endif
int board_init(void)
{
/* address of boot parameters */
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
#ifdef CONFIG_WDT_ARMADA_37XX
if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) {
printf("Cannot find Armada 3720 watchdog!\n");
} else {
printf("Enabling Armada 3720 watchdog (3 minutes timeout).\n");
wdt_start(watchdog_dev, 180000, 0);
}
#endif
return 0;
}

39
board/CZ.NIC/turris_omnia/turris_omnia.c
View File

@ -32,13 +32,13 @@
DECLARE_GLOBAL_DATA_PTR;
#define OMNIA_I2C_EEPROM_DM_NAME "i2c@0"
#define OMNIA_I2C_EEPROM_DM_NAME "i2c@11000->i2cmux@70->i2c@0"
#define OMNIA_I2C_EEPROM 0x54
#define OMNIA_I2C_EEPROM_CONFIG_ADDR 0x0
#define OMNIA_I2C_EEPROM_ADDRLEN 2
#define OMNIA_I2C_EEPROM_MAGIC 0x0341a034
#define OMNIA_I2C_MCU_DM_NAME "i2c@0"
#define OMNIA_I2C_MCU_DM_NAME "i2c@11000->i2cmux@70->i2c@0"
#define OMNIA_I2C_MCU_ADDR_STATUS 0x1
#define OMNIA_I2C_MCU_SATA 0x20
#define OMNIA_I2C_MCU_CARDDET 0x10
@ -364,25 +364,12 @@ static bool disable_mcu_watchdog(void)
}
#endif
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT_ORION)
static struct udevice *watchdog_dev __attribute__((section(".data"))) = NULL;
#endif
int board_init(void)
{
/* adress of boot parameters */
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
#ifndef CONFIG_SPL_BUILD
# ifdef CONFIG_WDT_ORION
if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) {
puts("Cannot find Armada 385 watchdog!\n");
} else {
puts("Enabling Armada 385 watchdog.\n");
wdt_start(watchdog_dev, 120000, 0);
}
# endif
if (disable_mcu_watchdog())
puts("Disabled MCU startup watchdog.\n");
@ -392,28 +379,6 @@ int board_init(void)
return 0;
}
#ifdef CONFIG_WATCHDOG
/* Called by macro WATCHDOG_RESET */
void watchdog_reset(void)
{
# if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT_ORION)
static ulong next_reset = 0;
ulong now;
if (!watchdog_dev)
return;
now = timer_get_us();
/* Do not reset the watchdog too often */
if (now > next_reset) {
wdt_reset(watchdog_dev);
next_reset = now + 1000;
}
# endif
}
#endif
int board_late_init(void)
{
#ifndef CONFIG_SPL_BUILD

1
board/Marvell/db-88f6281-bp/.gitignore vendored Normal file
View File

@ -0,0 +1 @@
kwbimage.cfg

12
board/Marvell/db-88f6281-bp/Kconfig Normal file
View File

@ -0,0 +1,12 @@
if TARGET_DB_88F6281_BP
config SYS_BOARD
default "db-88f6281-bp"
config SYS_VENDOR
default "Marvell"
config SYS_CONFIG_NAME
default "db-88f6281-bp"
endif

10
board/Marvell/db-88f6281-bp/MAINTAINERS Normal file
View File

@ -0,0 +1,10 @@
DB_88F6820_AMC BOARD
M: Chris Packham <judge.packham@gmail.com>
S: Maintained
F: arch/arm/dts/kirkwood-db-88f6281.dts
F: arch/arm/dts/kirkwood-db-88f6281-spi.dts
F: arch/arm/dts/kirkwood-db.dtsi
F: board/Marvell/db-88f6281-bp/
F: include/configs/db-88f6281-bp.h
F: configs/db-88f6281-bp-nand_defconfig
F: configs/db-88f6281-bp-spi_defconfig

12
board/Marvell/db-88f6281-bp/Makefile Normal file
View File

@ -0,0 +1,12 @@
# SPDX-License-Identifier: GPL-2.0+
obj-y := db-88f6281-bp.o
extra-y := kwbimage.cfg
quiet_cmd_sed = SED $@
cmd_sed = sed $(SEDFLAGS_$(@F)) $< >$(dir $<)$(@F)
SEDFLAGS_kwbimage.cfg = -e "s/^\#@BOOT_FROM.*/BOOT_FROM $(if $(CONFIG_CMD_NAND),nand,spi)/"
$(src)/kwbimage.cfg: $(src)/kwbimage.cfg.in include/autoconf.mk \
include/config/auto.conf
$(call if_changed,sed)

103
board/Marvell/db-88f6281-bp/db-88f6281-bp.c Normal file
View File

@ -0,0 +1,103 @@
// SPDX-License-Identifier: GPL-2.0+
#include <common.h>
#include <linux/io.h>
#include <miiphy.h>
#include <netdev.h>
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
#include <asm/arch/mpp.h>
#include <asm/arch/gpio.h>
#define DB_88F6281_OE_LOW ~(BIT(7))
#define DB_88F6281_OE_HIGH ~(BIT(15) | BIT(14) | BIT(13) | BIT(4))
#define DB_88F6281_OE_VAL_LOW BIT(7)
#define DB_88F6281_OE_VAL_HIGH 0
DECLARE_GLOBAL_DATA_PTR;
int board_early_init_f(void)
{
mvebu_config_gpio(DB_88F6281_OE_VAL_LOW,
DB_88F6281_OE_VAL_HIGH,
DB_88F6281_OE_LOW, DB_88F6281_OE_HIGH);
/* Multi-Purpose Pins Functionality configuration */
static const u32 kwmpp_config[] = {
#ifdef CONFIG_CMD_NAND
MPP0_NF_IO2,
MPP1_NF_IO3,
MPP2_NF_IO4,
MPP3_NF_IO5,
#else
MPP0_SPI_SCn,
MPP1_SPI_MOSI,
MPP2_SPI_SCK,
MPP3_SPI_MISO,
#endif
MPP4_NF_IO6,
MPP5_NF_IO7,
MPP6_SYSRST_OUTn,
MPP7_GPO,
MPP8_TW_SDA,
MPP9_TW_SCK,
MPP10_UART0_TXD,
MPP11_UART0_RXD,
MPP12_SD_CLK,
MPP13_SD_CMD,
MPP14_SD_D0,
MPP15_SD_D1,
MPP16_SD_D2,
MPP17_SD_D3,
MPP18_NF_IO0,
MPP19_NF_IO1,
MPP20_SATA1_ACTn,
MPP21_SATA0_ACTn,
MPP22_GPIO,
MPP23_GPIO,
MPP24_GPIO,
MPP25_GPIO,
MPP26_GPIO,
MPP27_GPIO,
MPP28_GPIO,
MPP29_GPIO,
MPP30_GPIO,
MPP31_GPIO,
MPP32_GPIO,
MPP33_GPIO,
MPP34_GPIO,
MPP35_GPIO,
MPP36_GPIO,
MPP37_GPIO,
MPP38_GPIO,
MPP39_GPIO,
MPP40_GPIO,
MPP41_GPIO,
MPP42_GPIO,
MPP43_GPIO,
MPP44_GPIO,
MPP45_GPIO,
MPP46_GPIO,
MPP47_GPIO,
MPP48_GPIO,
MPP49_GPIO,
0
};
kirkwood_mpp_conf(kwmpp_config, NULL);
return 0;
}
int board_init(void)
{
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
return 0;
}
#ifdef CONFIG_RESET_PHY_R
/* automatically defined by kirkwood config.h */
void reset_phy(void)
{
}
#endif

36
board/Marvell/db-88f6281-bp/kwbimage.cfg.in Normal file
View File

@ -0,0 +1,36 @@
# SPDX-License-Identifier: GPL-2.0+
# Boot Media configurations
#@BOOT_FROM
DATA 0xd00100e0 0x1b1b1b9b
DATA 0xd0020134 0xbbbbbbbb
DATA 0xd0020138 0x00bbbbbb
DATA 0xd0020154 0x00000200
DATA 0xd002014c 0x00001c00
DATA 0xd0020148 0x00000001
DATA 0xd0001400 0x43000c30
DATA 0xd0001404 0x39543000
DATA 0xd0001408 0x22125451
DATA 0xd000140c 0x00000833
DATA 0xd0001410 0x000000cc
DATA 0xd0001414 0x00000000
DATA 0xd0001418 0x00000000
DATA 0xd000141c 0x00000c52
DATA 0xd0001420 0x00000044
DATA 0xd0001424 0x0000f1ff
DATA 0xd0001428 0x00085520
DATA 0xd000147c 0x00008552
DATA 0xd0001504 0x0ffffff1
DATA 0xd0001508 0x10000000
DATA 0xd000150c 0x0ffffff5
DATA 0xd0001514 0x00000000
DATA 0xd000151c 0x00000000
DATA 0xd0001494 0x84210000
DATA 0xd0001498 0x00000000
DATA 0xd000149c 0x0000f40f
DATA 0xd0001480 0x00000001
# End of Header extension
DATA 0x0 0x0

4
board/Marvell/openrd/MAINTAINERS
View File

@ -1,6 +1,6 @@
OPENRD / OPENRD_CLIENT BOARD
#M: Albert ARIBAUD <albert-u-boot@aribaud.net>
S: Orphaned (Since 2018-09)
M: Stefan Roese <sr@denx.de>
S: Maintained
F: board/Marvell/openrd/
F: include/configs/openrd.h
F: configs/openrd_base_defconfig

36
board/alliedtelesis/x530/x530.c
View File

@ -25,10 +25,6 @@ DECLARE_GLOBAL_DATA_PTR;
#define CONFIG_NVS_LOCATION 0xf4800000
#define CONFIG_NVS_SIZE (512 << 10)
#ifdef CONFIG_WATCHDOG
static struct udevice *watchdog_dev;
#endif
static struct serdes_map board_serdes_map[] = {
{PEX0, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
{DEFAULT_SERDES, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0},
@ -80,10 +76,6 @@ struct mv_ddr_topology_map *mv_ddr_topology_map_get(void)
int board_early_init_f(void)
{
#ifdef CONFIG_WATCHDOG
watchdog_dev = NULL;
#endif
/* Configure MPP */
writel(0x00001111, MVEBU_MPP_BASE + 0x00);
writel(0x00000000, MVEBU_MPP_BASE + 0x04);
@ -99,13 +91,6 @@ int board_early_init_f(void)
void spl_board_init(void)
{
#ifdef CONFIG_WATCHDOG
int ret;
ret = uclass_get_device(UCLASS_WDT, 0, &watchdog_dev);
if (!ret)
wdt_start(watchdog_dev, 120000, 0);
#endif
}
int board_init(void)
@ -128,29 +113,10 @@ int board_init(void)
void arch_preboot_os(void)
{
#ifdef CONFIG_WATCHDOG
wdt_stop(watchdog_dev);
wdt_stop(gd->watchdog_dev);
#endif
}
#ifdef CONFIG_WATCHDOG
void watchdog_reset(void)
{
static ulong next_reset = 0;
ulong now;
if (!watchdog_dev)
return;
now = timer_get_us();
/* Do not reset the watchdog too often */
if (now > next_reset) {
wdt_reset(watchdog_dev);
next_reset = now + 1000;
}
}
#endif
static int led_7seg_init(unsigned int segments)
{
int node;

10
board/buffalo/lsxl/README
View File

@ -8,6 +8,16 @@ the LS-XHL PCB has two SDRAM chips. Both have a Kirkwood CPU (Marvell
bootloader and its environment. The linux kernel and the initial ramdisk
are loaded from the hard disk.
Important! Changes since v2019.07
---------------------------------
In u-boot v2019.07 the driver for the SATA port was changed to a new
one. This means that the old "ide" command and block interface is not
supported anymore. More important, the boot commands have changed. You have
to overwrite the boot commands in your envionment with the new ones:
env default -f bootcmd_legacy
env default -f bootcmd_hdd
saveenv
Rescue Mode
-----------

40
board/xilinx/microblaze-generic/microblaze-generic.c
View File

@ -24,10 +24,6 @@
DECLARE_GLOBAL_DATA_PTR;
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT)
static struct udevice *watchdog_dev __attribute__((section(".data"))) = NULL;
#endif /* !CONFIG_SPL_BUILD && CONFIG_WDT */
ulong ram_base;
int dram_init_banksize(void)
@ -43,44 +39,8 @@ int dram_init(void)
return 0;
};
#ifdef CONFIG_WDT
/* Called by macro WATCHDOG_RESET */
void watchdog_reset(void)
{
#if !defined(CONFIG_SPL_BUILD)
ulong now;
static ulong next_reset;
if (!watchdog_dev)
return;
now = timer_get_us();
/* Do not reset the watchdog too often */
if (now > next_reset) {
wdt_reset(watchdog_dev);
next_reset = now + 1000;
}
#endif /* !CONFIG_SPL_BUILD */
}
#endif /* CONFIG_WDT */
int board_late_init(void)
{
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT)
watchdog_dev = NULL;
if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) {
debug("Watchdog: Not found by seq!\n");
if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) {
puts("Watchdog: Not found!\n");
return 0;
}
}
wdt_start(watchdog_dev, 0, 0);
puts("Watchdog: Started\n");
#endif /* !CONFIG_SPL_BUILD && CONFIG_WDT */
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_SYSRESET_MICROBLAZE)
int ret;

39
board/xilinx/zynq/board.c
View File

@ -18,10 +18,6 @@
DECLARE_GLOBAL_DATA_PTR;
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT)
static struct udevice *watchdog_dev __attribute__((section(".data"))) = NULL;
#endif
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_BOARD_EARLY_INIT_F)
int board_early_init_f(void)
{
@ -31,19 +27,6 @@ int board_early_init_f(void)
int board_init(void)
{
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT)
if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) {
debug("Watchdog: Not found by seq!\n");
if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) {
puts("Watchdog: Not found!\n");
return 0;
}
}
wdt_start(watchdog_dev, 0, 0);
puts("Watchdog: Started\n");
# endif
return 0;
}
@ -127,25 +110,3 @@ int dram_init(void)
return 0;
}
#endif
#if defined(CONFIG_WATCHDOG)
/* Called by macro WATCHDOG_RESET */
void watchdog_reset(void)
{
# if !defined(CONFIG_SPL_BUILD)
static ulong next_reset;
ulong now;
if (!watchdog_dev)
return;
now = timer_get_us();
/* Do not reset the watchdog too often */
if (now > next_reset) {
wdt_reset(watchdog_dev);
next_reset = now + 1000;
}
# endif
}
#endif

39
board/xilinx/zynqmp/zynqmp.c
View File

@ -24,10 +24,6 @@
DECLARE_GLOBAL_DATA_PTR;
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT)
static struct udevice *watchdog_dev __attribute__((section(".data"))) = NULL;
#endif
#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) && \
!defined(CONFIG_SPL_BUILD)
static xilinx_desc zynqmppl = XILINX_ZYNQMP_DESC;
@ -344,44 +340,9 @@ int board_init(void)
}
#endif
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT)
if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) {
debug("Watchdog: Not found by seq!\n");
if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) {
puts("Watchdog: Not found!\n");
return 0;
}
}
wdt_start(watchdog_dev, 0, 0);
puts("Watchdog: Started\n");
#endif
return 0;
}
#ifdef CONFIG_WATCHDOG
/* Called by macro WATCHDOG_RESET */
void watchdog_reset(void)
{
# if !defined(CONFIG_SPL_BUILD)
static ulong next_reset;
ulong now;
if (!watchdog_dev)
return;
now = timer_get_us();
/* Do not reset the watchdog too often */
if (now > next_reset) {
wdt_reset(watchdog_dev);
next_reset = now + 1000;
}
# endif
}
#endif
int board_early_init_r(void)
{
u32 val;

4
common/board_r.c
View File

@ -48,6 +48,7 @@
#include <linux/compiler.h>
#include <linux/err.h>
#include <efi_loader.h>
#include <wdt.h>
DECLARE_GLOBAL_DATA_PTR;
@ -677,6 +678,9 @@ static init_fnc_t init_sequence_r[] = {
#ifdef CONFIG_DM
initr_dm,
#endif
#if defined(CONFIG_WDT)
initr_watchdog,
#endif
#if defined(CONFIG_ARM) || defined(CONFIG_NDS32) || defined(CONFIG_RISCV) || \
defined(CONFIG_SANDBOX)
board_init, /* Setup chipselects */

5
common/spl/spl.c
View File

@ -22,6 +22,7 @@
#include <linux/compiler.h>
#include <fdt_support.h>
#include <bootcount.h>
#include <wdt.h>
DECLARE_GLOBAL_DATA_PTR;
@ -600,6 +601,10 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
spl_board_init();
#endif
#if defined(CONFIG_SPL_WATCHDOG_SUPPORT) && defined(CONFIG_WDT)
initr_watchdog();
#endif
if (IS_ENABLED(CONFIG_SPL_OS_BOOT) || CONFIG_IS_ENABLED(HANDOFF))
dram_init_banksize();

54
configs/db-88f6281-bp-nand_defconfig Normal file
View File

@ -0,0 +1,54 @@
CONFIG_ARM=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_DB_88F6281_BP=y
CONFIG_IDENT_STRING="\nMarvell DB-88F6281-BP"
CONFIG_NR_DRAM_BANKS=2
# CONFIG_SYS_MALLOC_F is not set
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_DM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_IDE=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_JFFS2=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nand0=orion_nand"
CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:512K(uboot),512K(env),4M(kernel),-(rootfs)"
CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-db-88f6281"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_MVSATA_IDE=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHY_MARVELL=y
CONFIG_DM_ETH=y
CONFIG_MVGBE=y
CONFIG_MII=y
CONFIG_DM_RTC=y
CONFIG_RTC_MV=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_KIRKWOOD_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_LZMA=y
CONFIG_LZO=y

56
configs/db-88f6281-bp-spi_defconfig Normal file
View File

@ -0,0 +1,56 @@
CONFIG_ARM=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_DB_88F6281_BP=y
CONFIG_IDENT_STRING="\nMarvell DB-88F6281-BP"
CONFIG_NR_DRAM_BANKS=2
# CONFIG_SYS_MALLOC_F is not set
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_DM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_IDE=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_JFFS2=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nand0=orion_nand"
CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:512K(uboot),512K(env),4M(kernel),-(rootfs)"
CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-db-88f6281-spi"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_MVSATA_IDE=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHY_MARVELL=y
CONFIG_DM_ETH=y
CONFIG_MVGBE=y
CONFIG_MII=y
CONFIG_DM_RTC=y
CONFIG_RTC_MV=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_KIRKWOOD_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_LZMA=y
CONFIG_LZO=y

2
configs/gardena-smart-gateway-at91sam_defconfig
View File

@ -23,7 +23,6 @@ CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs rw"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_ARCH_EARLY_INIT_R=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SEPARATE_BSS=y
# CONFIG_TPL_BANNER_PRINT is not set
@ -76,7 +75,6 @@ CONFIG_TIMER=y
CONFIG_SPL_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
# CONFIG_SYS_WHITE_ON_BLACK is not set
CONFIG_WATCHDOG=y
CONFIG_WDT=y
CONFIG_WDT_AT91=y
# CONFIG_UBIFS_SILENCE_MSG is not set

4
configs/turris_omnia_defconfig
View File

@ -1,4 +1,5 @@
CONFIG_ARM=y
CONFIG_SPL_SYS_THUMB_BUILD=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00800000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
@ -7,13 +8,13 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_TURRIS_OMNIA=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_MISC_INIT_R=y
@ -40,6 +41,7 @@ CONFIG_ENV_SPI_MAX_HZ=50000000
CONFIG_SPL_OF_TRANSLATE=y
CONFIG_SCSI_AHCI=y
CONFIG_ATSHA204A=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_MV=y
CONFIG_SPI_FLASH=y

67
drivers/mmc/mv_sdhci.c
View File

@ -4,10 +4,13 @@
*/
#include <common.h>
#include <dm.h>
#include <malloc.h>
#include <sdhci.h>
#include <linux/mbus.h>
#define MVSDH_NAME "mv_sdh"
#define SDHCI_WINDOW_CTRL(win) (0x4080 + ((win) << 4))
#define SDHCI_WINDOW_BASE(win) (0x4084 + ((win) << 4))
@ -36,6 +39,8 @@ static void sdhci_mvebu_mbus_config(void __iomem *base)
}
}
#ifndef CONFIG_DM_MMC
#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
static struct sdhci_ops mv_ops;
@ -63,7 +68,6 @@ static inline void mv_sdhci_writeb(struct sdhci_host *host, u8 val, int reg)
#endif /* CONFIG_SHEEVA_88SV331xV5 */
#endif /* CONFIG_MMC_SDHCI_IO_ACCESSORS */
static char *MVSDH_NAME = "mv_sdh";
int mv_sdh_init(unsigned long regbase, u32 max_clk, u32 min_clk, u32 quirks)
{
struct sdhci_host *host = NULL;
@ -90,3 +94,64 @@ int mv_sdh_init(unsigned long regbase, u32 max_clk, u32 min_clk, u32 quirks)
return add_sdhci(host, 0, min_clk);
}
#else
DECLARE_GLOBAL_DATA_PTR;
struct mv_sdhci_plat {
struct mmc_config cfg;
struct mmc mmc;
};
static int mv_sdhci_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct mv_sdhci_plat *plat = dev_get_platdata(dev);
struct sdhci_host *host = dev_get_priv(dev);
int ret;
host->name = MVSDH_NAME;
host->ioaddr = (void *)devfdt_get_addr(dev);
host->quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_WAIT_SEND_CMD;
ret = sdhci_setup_cfg(&plat->cfg, host, 0, 0);
if (ret)
return ret;
if (CONFIG_IS_ENABLED(ARCH_MVEBU)) {
/* Configure SDHCI MBUS mbus bridge windows */
sdhci_mvebu_mbus_config(host->ioaddr);
}
host->mmc = &plat->mmc;
host->mmc->dev = dev;
host->mmc->priv = host;
upriv->mmc = host->mmc;
return sdhci_probe(dev);
}
static int mv_sdhci_bind(struct udevice *dev)
{
struct mv_sdhci_plat *plat = dev_get_platdata(dev);
return sdhci_bind(dev, &plat->mmc, &plat->cfg);
}
static const struct udevice_id mv_sdhci_ids[] = {
{ .compatible = "marvell,armada-380-sdhci" },
{ }
};
U_BOOT_DRIVER(mv_sdhci_drv) = {
.name = MVSDH_NAME,
.id = UCLASS_MMC,
.of_match = mv_sdhci_ids,
.bind = mv_sdhci_bind,
.probe = mv_sdhci_probe,
.ops = &sdhci_ops,
.priv_auto_alloc_size = sizeof(struct sdhci_host),
.platdata_auto_alloc_size = sizeof(struct mv_sdhci_plat),
};
#endif /* CONFIG_DM_MMC */

2
drivers/watchdog/Kconfig
View File

@ -51,6 +51,7 @@ config ULP_WATCHDOG
config WDT
bool "Enable driver model for watchdog timer drivers"
depends on DM
imply WATCHDOG
help
Enable driver model for watchdog timer. At the moment the API
is very simple and only supports four operations:
@ -150,7 +151,6 @@ config WDT_MT7621
config WDT_MPC8xx
bool "MPC8xx watchdog timer support"
depends on WDT && MPC8xx
select CONFIG_MPC8xx_WATCHDOG
help
Select this to enable mpc8xx watchdog timer

2
drivers/watchdog/Makefile
View File

@ -24,6 +24,6 @@ obj-$(CONFIG_WDT_BCM6345) += bcm6345_wdt.o
obj-$(CONFIG_BCM2835_WDT) += bcm2835_wdt.o
obj-$(CONFIG_WDT_ORION) += orion_wdt.o
obj-$(CONFIG_WDT_CDNS) += cdns_wdt.o
obj-$(CONFIG_MPC8xx_WATCHDOG) += mpc8xx_wdt.o
obj-$(CONFIG_WDT_MPC8xx) += mpc8xx_wdt.o
obj-$(CONFIG_WDT_MT7621) += mt7621_wdt.o
obj-$(CONFIG_WDT_MTK) += mtk_wdt.o

8
drivers/watchdog/at91sam9_wdt.c
View File

@ -107,14 +107,6 @@ static int at91_wdt_probe(struct udevice *dev)
if (!priv->regs)
return -EINVAL;
#if CONFIG_IS_ENABLED(OF_CONTROL)
priv->timeout = dev_read_u32_default(dev, "timeout-sec",
WDT_DEFAULT_TIMEOUT);
debug("%s: timeout %d", __func__, priv->timeout);
#else
priv->timeout = WDT_DEFAULT_TIMEOUT;
#endif
debug("%s: Probing wdt%u\n", __func__, dev->seq);
return 0;

15
drivers/watchdog/cdns_wdt.c
View File

@ -10,6 +10,7 @@
#include <dm.h>
#include <wdt.h>
#include <clk.h>
#include <div64.h>
#include <linux/io.h>
DECLARE_GLOBAL_DATA_PTR;
@ -23,7 +24,6 @@ struct cdns_regs {
struct cdns_wdt_priv {
bool rst;
u32 timeout;
struct cdns_regs *regs;
};
@ -142,10 +142,10 @@ static int cdns_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
return -1;
}
if ((timeout < CDNS_WDT_MIN_TIMEOUT) ||
(timeout > CDNS_WDT_MAX_TIMEOUT)) {
timeout = priv->timeout;
}
/* Calculate timeout in seconds and restrict to min and max value */
do_div(timeout, 1000);
timeout = max_t(u64, timeout, CDNS_WDT_MIN_TIMEOUT);
timeout = min_t(u64, timeout, CDNS_WDT_MAX_TIMEOUT);
debug("%s: CLK_FREQ %ld, timeout %lld\n", __func__, clk_f, timeout);
@ -235,12 +235,9 @@ static int cdns_wdt_ofdata_to_platdata(struct udevice *dev)
if (IS_ERR(priv->regs))
return PTR_ERR(priv->regs);
priv->timeout = dev_read_u32_default(dev, "timeout-sec",
CDNS_WDT_DEFAULT_TIMEOUT);
priv->rst = dev_read_bool(dev, "reset-on-timeout");
debug("%s: timeout %d, reset %d\n", __func__, priv->timeout, priv->rst);
debug("%s: reset %d\n", __func__, priv->rst);
return 0;
}

4
drivers/watchdog/mpc8xx_wdt.c
View File

@ -10,7 +10,7 @@
#include <asm/cpm_8xx.h>
#include <asm/io.h>
void hw_watchdog_reset(void)
static void hw_watchdog_reset(void)
{
immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
@ -18,7 +18,6 @@ void hw_watchdog_reset(void)
out_be16(&immap->im_siu_conf.sc_swsr, 0xaa39); /* write magic2 */
}
#ifdef CONFIG_WDT_MPC8xx
static int mpc8xx_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
{
immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
@ -66,4 +65,3 @@ U_BOOT_DRIVER(wdt_mpc8xx) = {
.of_match = mpc8xx_wdt_ids,
.ops = &mpc8xx_wdt_ops,
};
#endif /* CONFIG_WDT_MPC8xx */

26
drivers/watchdog/wdt-uclass.c
View File

@ -10,6 +10,8 @@
#include <dm/device-internal.h>
#include <dm/lists.h>
DECLARE_GLOBAL_DATA_PTR;
int wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags)
{
const struct wdt_ops *ops = device_get_ops(dev);
@ -63,6 +65,30 @@ int wdt_expire_now(struct udevice *dev, ulong flags)
return ret;
}
#if defined(CONFIG_WATCHDOG)
/*
* Called by macro WATCHDOG_RESET. This function be called *very* early,
* so we need to make sure, that the watchdog driver is ready before using
* it in this function.
*/
void watchdog_reset(void)
{
static ulong next_reset;
ulong now;
/* Exit if GD is not ready or watchdog is not initialized yet */
if (!gd || !(gd->flags & GD_FLG_WDT_READY))
return;
/* Do not reset the watchdog too often */
now = get_timer(0);
if (now > next_reset) {
next_reset = now + 1000; /* reset every 1000ms */
wdt_reset(gd->watchdog_dev);
}
}
#endif
static int wdt_post_bind(struct udevice *dev)
{
#if defined(CONFIG_NEEDS_MANUAL_RELOC)

4
include/asm-generic/global_data.h
View File

@ -137,6 +137,9 @@ typedef struct global_data {
#if defined(CONFIG_TRANSLATION_OFFSET)
fdt_addr_t translation_offset; /* optional translation offset */
#endif
#if defined(CONFIG_WDT)
struct udevice *watchdog_dev;
#endif
} gd_t;
#endif
@ -165,5 +168,6 @@ typedef struct global_data {
#define GD_FLG_ENV_DEFAULT 0x02000 /* Default variable flag */
#define GD_FLG_SPL_EARLY_INIT 0x04000 /* Early SPL init is done */
#define GD_FLG_LOG_READY 0x08000 /* Log system is ready for use */
#define GD_FLG_WDT_READY 0x10000 /* Watchdog is ready for use */
#endif /* __ASM_GENERIC_GBL_DATA_H */

99
include/configs/db-88f6281-bp.h Normal file
View File

@ -0,0 +1,99 @@
/* SPDX-License-Identifier: GPL-2.0+ */
#ifndef _CONFIG_DB_88F6281_BP_H
#define _CONFIG_DB_88F6281_BP_H
/*
* High Level Configuration Options (easy to change)
*/
#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */
#define CONFIG_KW88F6281 1 /* SOC Name */
#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
#define CONFIG_SYS_TCLK 166666667
#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg
#define CONFIG_BUILD_TARGET "u-boot.kwb"
/* additions for new ARM relocation support */
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */
#define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 */
#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */
#define CONFIG_KIRKWOOD_GPIO 1
/*
* NS16550 Configuration
*/
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE
#define CONFIG_SYS_MAX_NAND_DEVICE 1
/*
* Serial Port configuration
* The following definitions let you select what serial you want to use
* for your console driver.
*/
#define CONFIG_CONS_INDEX 1 /* Console on UART0 */
/*
* Environment variables configurations
*/
#define CONFIG_ENV_SPI_BUS 0
#define CONFIG_ENV_SPI_CS 0
#define CONFIG_ENV_SPI_MAX_HZ 20000000 /* 20Mhz */
#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
#define CONFIG_ENV_SECT_SIZE 0x40000 /* 256K */
#define CONFIG_ENV_SIZE 0x01000
#define CONFIG_ENV_OFFSET 0xC0000
/*
* U-Boot bootcode configuration
*/
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for monitor */
#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* Reserve 4.0 MB for malloc */
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Mem map for Linux*/
/* size in bytes reserved for initial data */
#include <asm/arch/config.h>
/* There is no PHY directly connected so don't ask it for link status */
#undef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
/*
* Other required minimal configurations
*/
#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */
#define CONFIG_SYS_MEMTEST_END 0x007fffff /* (_8M - 1) */
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
/*
* SDIO/MMC Card Configuration
*/
#ifdef CONFIG_CMD_MMC
#define CONFIG_MVEBU_MMC
#define CONFIG_SYS_MMC_BASE KW_SDIO_BASE
#endif /* CONFIG_CMD_MMC */
/*
* SATA Driver configuration
*/
#ifdef CONFIG_MVSATA_IDE
#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET
#endif /*CONFIG_MVSATA_IDE*/
#define CONFIG_SYS_LOAD_ADDR 0x1000000 /* default location for tftp and bootm */
#define CONFIG_SYS_DCACHE_OFF
#endif /* _CONFIG_DB_88F6281_BP_H */

3
include/configs/openrd.h
View File

@ -41,8 +41,7 @@
* it has to be rounded to sector size
*/
#define CONFIG_ENV_SIZE 0x20000 /* 128k */
#define CONFIG_ENV_ADDR 0x60000
#define CONFIG_ENV_OFFSET 0x60000 /* env starts here */
#define CONFIG_ENV_OFFSET 0x80000 /* env starts here */
/*
* Environment is right behind U-Boot in flash. Make sure U-Boot
* doesn't grow into the environment area.

5
include/configs/turris_omnia.h
View File

@ -29,11 +29,6 @@
#define CONFIG_SPL_I2C_MUX
#define CONFIG_SYS_I2C_MVTWSI
/* Watchdog support */
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT_ORION)
# define CONFIG_WATCHDOG
#endif
/*
* SDIO/MMC Card Configuration
*/

41
include/wdt.h
View File

@ -6,6 +6,9 @@
#ifndef _WDT_H_
#define _WDT_H_
#include <dm.h>
#include <dm/read.h>
/*
* Implement a simple watchdog uclass. Watchdog is basically a timer that
* is used to detect or recover from malfunction. During normal operation
@ -103,4 +106,42 @@ struct wdt_ops {
int (*expire_now)(struct udevice *dev, ulong flags);
};
#if defined(CONFIG_WDT)
#ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS
#define CONFIG_WATCHDOG_TIMEOUT_MSECS (60 * 1000)
#endif
#define WATCHDOG_TIMEOUT_SECS (CONFIG_WATCHDOG_TIMEOUT_MSECS / 1000)
static inline int initr_watchdog(void)
{
u32 timeout = WATCHDOG_TIMEOUT_SECS;
/*
* Init watchdog: This will call the probe function of the
* watchdog driver, enabling the use of the device
*/
if (uclass_get_device_by_seq(UCLASS_WDT, 0,
(struct udevice **)&gd->watchdog_dev)) {
debug("WDT: Not found by seq!\n");
if (uclass_get_device(UCLASS_WDT, 0,
(struct udevice **)&gd->watchdog_dev)) {
printf("WDT: Not found!\n");
return 0;
}
}
if (CONFIG_IS_ENABLED(OF_CONTROL)) {
timeout = dev_read_u32_default(gd->watchdog_dev, "timeout-sec",
WATCHDOG_TIMEOUT_SECS);
}
wdt_start(gd->watchdog_dev, timeout * 1000, 0);
gd->flags |= GD_FLG_WDT_READY;
printf("WDT: Started with%s servicing (%ds timeout)\n",
IS_ENABLED(CONFIG_WATCHDOG) ? "" : "out", timeout);
return 0;
}
#endif
#endif /* _WDT_H_ */