mpc8xx/i2c.c: CodungStyle cleanup
Make (mostly) checkpatch-clean We don't acctually change the code (like convert to use I/O accessors), so there will be some remaining "Use of volatile" warnings from checkpatch. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Heiko Schocher <hs@denx.de>
This commit is contained in:
Wolfgang Denk
parent
e1196b8005
commit
09e68ffadd
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@ -50,13 +50,13 @@ DECLARE_GLOBAL_DATA_PTR;
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#define MAX_TX_SPACE 256
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#define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */
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typedef struct I2C_BD
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{
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unsigned short status;
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unsigned short length;
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unsigned char *addr;
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typedef struct I2C_BD {
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unsigned short status;
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unsigned short length;
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unsigned char *addr;
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} I2C_BD;
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#define BD_I2C_TX_START 0x0400 /* special status for i2c: Start condition */
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#define BD_I2C_TX_START 0x0400 /* special status for i2c: Start condition */
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#define BD_I2C_TX_CL 0x0001 /* collision error */
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#define BD_I2C_TX_UN 0x0002 /* underflow error */
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@ -65,41 +65,41 @@ typedef struct I2C_BD
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#define BD_I2C_RX_ERR BD_SC_OV
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typedef void (*i2c_ecb_t)(int, int); /* error callback function */
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typedef void (*i2c_ecb_t) (int, int); /* error callback function */
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/* This structure keeps track of the bd and buffer space usage. */
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typedef struct i2c_state {
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int rx_idx; /* index to next free Rx BD */
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int tx_idx; /* index to next free Tx BD */
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void *rxbd; /* pointer to next free Rx BD */
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void *txbd; /* pointer to next free Tx BD */
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int tx_space; /* number of Tx bytes left */
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unsigned char *tx_buf; /* pointer to free Tx area */
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i2c_ecb_t err_cb; /* error callback function */
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int rx_idx; /* index to next free Rx BD */
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int tx_idx; /* index to next free Tx BD */
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void *rxbd; /* pointer to next free Rx BD */
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void *txbd; /* pointer to next free Tx BD */
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int tx_space; /* number of Tx bytes left */
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unsigned char *tx_buf; /* pointer to free Tx area */
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i2c_ecb_t err_cb; /* error callback function */
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} i2c_state_t;
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/* flags for i2c_send() and i2c_receive() */
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#define I2CF_ENABLE_SECONDARY 0x01 /* secondary_address is valid */
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#define I2CF_START_COND 0x02 /* tx: generate start condition */
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#define I2CF_STOP_COND 0x04 /* tx: generate stop condition */
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#define I2CF_ENABLE_SECONDARY 0x01 /* secondary_address is valid */
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#define I2CF_START_COND 0x02 /* tx: generate start condition */
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#define I2CF_STOP_COND 0x04 /* tx: generate stop condition */
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/* return codes */
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#define I2CERR_NO_BUFFERS 0x01 /* no more BDs or buffer space */
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#define I2CERR_MSG_TOO_LONG 0x02 /* tried to send/receive to much data */
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#define I2CERR_TIMEOUT 0x03 /* timeout in i2c_doio() */
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#define I2CERR_QUEUE_EMPTY 0x04 /* i2c_doio called without send/receive */
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#define I2CERR_NO_BUFFERS 0x01 /* no more BDs or buffer space */
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#define I2CERR_MSG_TOO_LONG 0x02 /* tried to send/receive to much data */
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#define I2CERR_TIMEOUT 0x03 /* timeout in i2c_doio() */
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#define I2CERR_QUEUE_EMPTY 0x04 /* i2c_doio called without send/receive */
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/* error callback flags */
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#define I2CECB_RX_ERR 0x10 /* this is a receive error */
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#define I2CECB_RX_ERR_OV 0x02 /* receive overrun error */
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#define I2CECB_RX_MASK 0x0f /* mask for error bits */
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#define I2CECB_TX_ERR 0x20 /* this is a transmit error */
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#define I2CECB_TX_CL 0x01 /* transmit collision error */
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#define I2CECB_TX_UN 0x02 /* transmit underflow error */
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#define I2CECB_TX_NAK 0x04 /* transmit no ack error */
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#define I2CECB_TX_MASK 0x0f /* mask for error bits */
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#define I2CECB_TIMEOUT 0x40 /* this is a timeout error */
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#define I2CECB_RX_ERR 0x10 /* this is a receive error */
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#define I2CECB_RX_ERR_OV 0x02 /* receive overrun error */
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#define I2CECB_RX_MASK 0x0f /* mask for error bits */
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#define I2CECB_TX_ERR 0x20 /* this is a transmit error */
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#define I2CECB_TX_CL 0x01 /* transmit collision error */
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#define I2CECB_TX_UN 0x02 /* transmit underflow error */
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#define I2CECB_TX_NAK 0x04 /* transmit no ack error */
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#define I2CECB_TX_MASK 0x0f /* mask for error bits */
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#define I2CECB_TIMEOUT 0x40 /* this is a timeout error */
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#ifdef DEBUG_I2C
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#define PRINTD(x) printf x
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@ -115,53 +115,53 @@ typedef struct i2c_state {
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*/
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static inline int
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i2c_roundrate(int hz, int speed, int filter, int modval,
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int *brgval, int *totspeed)
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int *brgval, int *totspeed)
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{
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int moddiv = 1 << (5-(modval & 3)), brgdiv, div;
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int moddiv = 1 << (5 - (modval & 3)), brgdiv, div;
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PRINTD(("\t[I2C] trying hz=%d, speed=%d, filter=%d, modval=%d\n",
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hz, speed, filter, modval));
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PRINTD(("\t[I2C] trying hz=%d, speed=%d, filter=%d, modval=%d\n",
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hz, speed, filter, modval));
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div = moddiv * speed;
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brgdiv = (hz + div - 1) / div;
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div = moddiv * speed;
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brgdiv = (hz + div - 1) / div;
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PRINTD(("\t\tmoddiv=%d, brgdiv=%d\n", moddiv, brgdiv));
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PRINTD(("\t\tmoddiv=%d, brgdiv=%d\n", moddiv, brgdiv));
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*brgval = ((brgdiv + 1) / 2) - 3 - (2*filter);
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*brgval = ((brgdiv + 1) / 2) - 3 - (2 * filter);
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if ((*brgval < 0) || (*brgval > 255)) {
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PRINTD(("\t\trejected brgval=%d\n", *brgval));
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return -1;
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}
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if ((*brgval < 0) || (*brgval > 255)) {
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PRINTD(("\t\trejected brgval=%d\n", *brgval));
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return -1;
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}
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brgdiv = 2 * (*brgval + 3 + (2 * filter));
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div = moddiv * brgdiv ;
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*totspeed = hz / div;
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brgdiv = 2 * (*brgval + 3 + (2 * filter));
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div = moddiv * brgdiv;
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*totspeed = hz / div;
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PRINTD(("\t\taccepted brgval=%d, totspeed=%d\n", *brgval, *totspeed));
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PRINTD(("\t\taccepted brgval=%d, totspeed=%d\n", *brgval, *totspeed));
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return 0;
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return 0;
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}
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/*
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* Sets the I2C clock predivider and divider to meet required clock speed.
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*/
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static int
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i2c_setrate (int hz, int speed)
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static int i2c_setrate(int hz, int speed)
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{
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immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
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immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
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volatile i2c8xx_t *i2c = (i2c8xx_t *) & immap->im_i2c;
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int brgval,
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modval, /* 0-3 */
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bestspeed_diff = speed,
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bestspeed_brgval = 0,
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bestspeed_modval = 0,
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bestspeed_filter = 0,
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totspeed,
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filter = 0; /* Use this fixed value */
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int brgval,
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modval, /* 0-3 */
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bestspeed_diff = speed,
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bestspeed_brgval = 0,
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bestspeed_modval = 0,
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bestspeed_filter = 0,
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totspeed,
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filter = 0; /* Use this fixed value */
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for (modval = 0; modval < 4; modval++) {
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if (i2c_roundrate(hz,speed,filter,modval,&brgval,&totspeed) == 0) {
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if (i2c_roundrate
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(hz, speed, filter, modval, &brgval, &totspeed) == 0) {
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int diff = speed - totspeed;
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if ((diff >= 0) && (diff < bestspeed_diff)) {
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@ -182,21 +182,21 @@ i2c_setrate (int hz, int speed)
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bestspeed_brgval,
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bestspeed_diff));
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i2c->i2c_i2mod |= ((bestspeed_modval & 3) << 1) | (bestspeed_filter << 3);
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i2c->i2c_i2mod |=
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((bestspeed_modval & 3) << 1) | (bestspeed_filter << 3);
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i2c->i2c_i2brg = bestspeed_brgval & 0xff;
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PRINTD (("[I2C] i2mod=%08x i2brg=%08x\n", i2c->i2c_i2mod,
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i2c->i2c_i2brg));
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i2c->i2c_i2brg));
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return 1;
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}
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void
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i2c_init(int speed, int slaveaddr)
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void i2c_init(int speed, int slaveaddr)
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{
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volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR ;
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volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
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volatile cpm8xx_t *cp = (cpm8xx_t *)&immap->im_cpm;
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volatile i2c8xx_t *i2c = (i2c8xx_t *)&immap->im_i2c;
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volatile i2c8xx_t *i2c = (i2c8xx_t *)&immap->im_i2c;
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volatile iic_t *iip = (iic_t *)&cp->cp_dparam[PROFF_IIC];
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ulong rbase, tbase;
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volatile I2C_BD *rxbd, *txbd;
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@ -219,10 +219,10 @@ i2c_init(int speed, int slaveaddr)
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#ifdef CONFIG_SYS_ALLOC_DPRAM
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dpaddr = iip->iic_rbase;
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if (dpaddr == 0) {
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/* need to allocate dual port ram */
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dpaddr = dpram_alloc_align(
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(NUM_RX_BDS * sizeof(I2C_BD)) + (NUM_TX_BDS * sizeof(I2C_BD)) +
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MAX_TX_SPACE, 8);
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/* need to allocate dual port ram */
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dpaddr = dpram_alloc_align((NUM_RX_BDS * sizeof(I2C_BD)) +
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(NUM_TX_BDS * sizeof(I2C_BD)) +
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MAX_TX_SPACE, 8);
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}
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#else
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dpaddr = CPM_I2C_BASE;
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@ -256,19 +256,19 @@ i2c_init(int speed, int slaveaddr)
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* divide BRGCLK by 1)
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*/
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PRINTD(("[I2C] Setting rate...\n"));
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i2c_setrate (gd->cpu_clk, CONFIG_SYS_I2C_SPEED) ;
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i2c_setrate(gd->cpu_clk, CONFIG_SYS_I2C_SPEED);
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/* Set I2C controller in master mode */
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i2c->i2c_i2com = 0x01;
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/* Set SDMA bus arbitration level to 5 (SDCR) */
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immap->im_siu_conf.sc_sdcr = 0x0001 ;
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immap->im_siu_conf.sc_sdcr = 0x0001;
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/* Initialize Tx/Rx parameters */
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iip->iic_rbase = rbase;
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iip->iic_tbase = tbase;
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rxbd = (I2C_BD *)((unsigned char *)&cp->cp_dpmem[iip->iic_rbase]);
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txbd = (I2C_BD *)((unsigned char *)&cp->cp_dpmem[iip->iic_tbase]);
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rxbd = (I2C_BD *) ((unsigned char *) &cp->cp_dpmem[iip->iic_rbase]);
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txbd = (I2C_BD *) ((unsigned char *) &cp->cp_dpmem[iip->iic_tbase]);
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PRINTD(("[I2C] rbase = %04x\n", iip->iic_rbase));
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PRINTD(("[I2C] tbase = %04x\n", iip->iic_tbase));
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@ -286,14 +286,14 @@ i2c_init(int speed, int slaveaddr)
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/*
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* Initialize required parameters if using microcode patch.
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*/
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iip->iic_rbptr = iip->iic_rbase;
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iip->iic_tbptr = iip->iic_tbase;
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iip->iic_rbptr = iip->iic_rbase;
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iip->iic_tbptr = iip->iic_tbase;
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iip->iic_rstate = 0;
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iip->iic_tstate = 0;
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#else
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cp->cp_cpcr = mk_cr_cmd(CPM_CR_CH_I2C, CPM_CR_INIT_TRX) | CPM_CR_FLG;
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do {
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__asm__ __volatile__ ("eieio");
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__asm__ __volatile__("eieio");
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} while (cp->cp_cpcr & CPM_CR_FLG);
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#endif
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@ -302,10 +302,9 @@ i2c_init(int speed, int slaveaddr)
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i2c->i2c_i2cmr = 0x00;
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}
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static void
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i2c_newio(i2c_state_t *state)
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static void i2c_newio(i2c_state_t *state)
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{
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volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR ;
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volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
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volatile cpm8xx_t *cp = (cpm8xx_t *)&immap->im_cpm;
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volatile iic_t *iip = (iic_t *)&cp->cp_dparam[PROFF_IIC];
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@ -316,10 +315,10 @@ i2c_newio(i2c_state_t *state)
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#endif
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state->rx_idx = 0;
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state->tx_idx = 0;
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state->rxbd = (void*)&cp->cp_dpmem[iip->iic_rbase];
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state->txbd = (void*)&cp->cp_dpmem[iip->iic_tbase];
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state->rxbd = (void *)&cp->cp_dpmem[iip->iic_rbase];
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state->txbd = (void *)&cp->cp_dpmem[iip->iic_tbase];
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state->tx_space = MAX_TX_SPACE;
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state->tx_buf = (uchar*)state->txbd + NUM_TX_BDS * sizeof(I2C_BD);
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state->tx_buf = (uchar *)state->txbd + NUM_TX_BDS * sizeof(I2C_BD);
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state->err_cb = NULL;
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PRINTD(("[I2C] rxbd = %08x\n", (int)state->rxbd));
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@ -334,25 +333,23 @@ static int
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i2c_send(i2c_state_t *state,
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unsigned char address,
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unsigned char secondary_address,
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unsigned int flags,
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unsigned short size,
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unsigned char *dataout)
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unsigned int flags, unsigned short size, unsigned char *dataout)
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{
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volatile I2C_BD *txbd;
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int i,j;
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int i, j;
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PRINTD(("[I2C] i2c_send add=%02d sec=%02d flag=%02d size=%d\n",
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address, secondary_address, flags, size));
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address, secondary_address, flags, size));
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/* trying to send message larger than BD */
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if (size > I2C_RXTX_LEN)
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return I2CERR_MSG_TOO_LONG;
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return I2CERR_MSG_TOO_LONG;
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/* no more free bds */
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if (state->tx_idx >= NUM_TX_BDS || state->tx_space < (2 + size))
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return I2CERR_NO_BUFFERS;
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return I2CERR_NO_BUFFERS;
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txbd = (I2C_BD *)state->txbd;
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txbd = (I2C_BD *) state->txbd;
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txbd->addr = state->tx_buf;
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PRINTD(("[I2C] txbd = %08x\n", (int)txbd));
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@ -360,43 +357,47 @@ i2c_send(i2c_state_t *state,
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if (flags & I2CF_START_COND) {
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PRINTD(("[I2C] Formatting addresses...\n"));
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if (flags & I2CF_ENABLE_SECONDARY) {
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txbd->length = size + 2; /* Length of msg + dest addr */
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/* Length of msg + dest addr */
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txbd->length = size + 2;
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txbd->addr[0] = address << 1;
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txbd->addr[1] = secondary_address;
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i = 2;
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} else {
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txbd->length = size + 1; /* Length of msg + dest addr */
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txbd->addr[0] = address << 1; /* Write dest addr to BD */
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/* Length of msg + dest addr */
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txbd->length = size + 1;
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/* Write dest addr to BD */
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txbd->addr[0] = address << 1;
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i = 1;
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}
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} else {
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txbd->length = size; /* Length of message */
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txbd->length = size; /* Length of message */
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i = 0;
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}
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/* set up txbd */
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txbd->status = BD_SC_READY;
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if (flags & I2CF_START_COND)
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txbd->status |= BD_I2C_TX_START;
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txbd->status |= BD_I2C_TX_START;
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if (flags & I2CF_STOP_COND)
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txbd->status |= BD_SC_LAST | BD_SC_WRAP;
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txbd->status |= BD_SC_LAST | BD_SC_WRAP;
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/* Copy data to send into buffer */
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PRINTD(("[I2C] copy data...\n"));
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for(j = 0; j < size; i++, j++)
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txbd->addr[i] = dataout[j];
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txbd->addr[i] = dataout[j];
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PRINTD(("[I2C] txbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n",
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txbd->length,
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txbd->status,
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txbd->addr[0],
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txbd->addr[1]));
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txbd->length,
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txbd->status,
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txbd->addr[0],
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txbd->addr[1]));
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/* advance state */
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state->tx_buf += txbd->length;
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state->tx_space -= txbd->length;
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state->tx_idx++;
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state->txbd = (void*)(txbd + 1);
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state->txbd = (void *) (txbd + 1);
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return 0;
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}
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|
@ -406,24 +407,24 @@ i2c_receive(i2c_state_t *state,
|
|||
unsigned char address,
|
||||
unsigned char secondary_address,
|
||||
unsigned int flags,
|
||||
unsigned short size_to_expect,
|
||||
unsigned char *datain)
|
||||
unsigned short size_to_expect, unsigned char *datain)
|
||||
{
|
||||
volatile I2C_BD *rxbd, *txbd;
|
||||
|
||||
PRINTD(("[I2C] i2c_receive %02d %02d %02d\n", address, secondary_address, flags));
|
||||
PRINTD(("[I2C] i2c_receive %02d %02d %02d\n",
|
||||
address, secondary_address, flags));
|
||||
|
||||
/* Expected to receive too much */
|
||||
if (size_to_expect > I2C_RXTX_LEN)
|
||||
return I2CERR_MSG_TOO_LONG;
|
||||
return I2CERR_MSG_TOO_LONG;
|
||||
|
||||
/* no more free bds */
|
||||
if (state->tx_idx >= NUM_TX_BDS || state->rx_idx >= NUM_RX_BDS
|
||||
|| state->tx_space < 2)
|
||||
return I2CERR_NO_BUFFERS;
|
||||
|| state->tx_space < 2)
|
||||
return I2CERR_NO_BUFFERS;
|
||||
|
||||
rxbd = (I2C_BD *)state->rxbd;
|
||||
txbd = (I2C_BD *)state->txbd;
|
||||
rxbd = (I2C_BD *) state->rxbd;
|
||||
txbd = (I2C_BD *) state->txbd;
|
||||
|
||||
PRINTD(("[I2C] rxbd = %08x\n", (int)rxbd));
|
||||
PRINTD(("[I2C] txbd = %08x\n", (int)txbd));
|
||||
|
|
@ -433,8 +434,8 @@ i2c_receive(i2c_state_t *state,
|
|||
/* set up TXBD for destination address */
|
||||
if (flags & I2CF_ENABLE_SECONDARY) {
|
||||
txbd->length = 2;
|
||||
txbd->addr[0] = address << 1; /* Write data */
|
||||
txbd->addr[1] = secondary_address; /* Internal address */
|
||||
txbd->addr[0] = address << 1; /* Write data */
|
||||
txbd->addr[1] = secondary_address; /* Internal address */
|
||||
txbd->status = BD_SC_READY;
|
||||
} else {
|
||||
txbd->length = 1 + size_to_expect;
|
||||
|
|
@ -455,23 +456,23 @@ i2c_receive(i2c_state_t *state,
|
|||
}
|
||||
|
||||
PRINTD(("[I2C] txbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n",
|
||||
txbd->length,
|
||||
txbd->status,
|
||||
txbd->addr[0],
|
||||
txbd->addr[1]));
|
||||
txbd->length,
|
||||
txbd->status,
|
||||
txbd->addr[0],
|
||||
txbd->addr[1]));
|
||||
PRINTD(("[I2C] rxbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n",
|
||||
rxbd->length,
|
||||
rxbd->status,
|
||||
rxbd->addr[0],
|
||||
rxbd->addr[1]));
|
||||
rxbd->length,
|
||||
rxbd->status,
|
||||
rxbd->addr[0],
|
||||
rxbd->addr[1]));
|
||||
|
||||
/* advance state */
|
||||
state->tx_buf += txbd->length;
|
||||
state->tx_space -= txbd->length;
|
||||
state->tx_idx++;
|
||||
state->txbd = (void*)(txbd + 1);
|
||||
state->txbd = (void *) (txbd + 1);
|
||||
state->rx_idx++;
|
||||
state->rxbd = (void*)(rxbd + 1);
|
||||
state->rxbd = (void *) (rxbd + 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -479,9 +480,9 @@ i2c_receive(i2c_state_t *state,
|
|||
|
||||
static int i2c_doio(i2c_state_t *state)
|
||||
{
|
||||
volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR ;
|
||||
volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
|
||||
volatile cpm8xx_t *cp = (cpm8xx_t *)&immap->im_cpm;
|
||||
volatile i2c8xx_t *i2c = (i2c8xx_t *)&immap->im_i2c;
|
||||
volatile i2c8xx_t *i2c = (i2c8xx_t *)&immap->im_i2c;
|
||||
volatile iic_t *iip = (iic_t *)&cp->cp_dparam[PROFF_IIC];
|
||||
volatile I2C_BD *txbd, *rxbd;
|
||||
volatile int j = 0;
|
||||
|
|
@ -512,22 +513,22 @@ static int i2c_doio(i2c_state_t *state)
|
|||
if (state->tx_idx > 0) {
|
||||
txbd = ((I2C_BD*)state->txbd) - 1;
|
||||
PRINTD(("[I2C] Transmitting...(txbd=0x%08lx)\n", (ulong)txbd));
|
||||
while((txbd->status & BD_SC_READY) && (j++ < TOUT_LOOP)) {
|
||||
if (ctrlc()) {
|
||||
while ((txbd->status & BD_SC_READY) && (j++ < TOUT_LOOP)) {
|
||||
if (ctrlc())
|
||||
return (-1);
|
||||
}
|
||||
__asm__ __volatile__ ("eieio");
|
||||
|
||||
__asm__ __volatile__("eieio");
|
||||
}
|
||||
}
|
||||
|
||||
if ((state->rx_idx > 0) && (j < TOUT_LOOP)) {
|
||||
rxbd = ((I2C_BD*)state->rxbd) - 1;
|
||||
PRINTD(("[I2C] Receiving...(rxbd=0x%08lx)\n", (ulong)rxbd));
|
||||
while((rxbd->status & BD_SC_EMPTY) && (j++ < TOUT_LOOP)) {
|
||||
if (ctrlc()) {
|
||||
while ((rxbd->status & BD_SC_EMPTY) && (j++ < TOUT_LOOP)) {
|
||||
if (ctrlc())
|
||||
return (-1);
|
||||
}
|
||||
__asm__ __volatile__ ("eieio");
|
||||
|
||||
__asm__ __volatile__("eieio");
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -544,22 +545,24 @@ static int i2c_doio(i2c_state_t *state)
|
|||
|
||||
if ((n = state->tx_idx) > 0) {
|
||||
for (i = 0; i < n; i++) {
|
||||
txbd = ((I2C_BD*)state->txbd) - (n - i);
|
||||
txbd = ((I2C_BD *) state->txbd) - (n - i);
|
||||
if ((b = txbd->status & BD_I2C_TX_ERR) != 0)
|
||||
(*state->err_cb)(I2CECB_TX_ERR|b, i);
|
||||
(*state->err_cb) (I2CECB_TX_ERR | b,
|
||||
i);
|
||||
}
|
||||
}
|
||||
|
||||
if ((n = state->rx_idx) > 0) {
|
||||
for (i = 0; i < n; i++) {
|
||||
rxbd = ((I2C_BD*)state->rxbd) - (n - i);
|
||||
rxbd = ((I2C_BD *) state->rxbd) - (n - i);
|
||||
if ((b = rxbd->status & BD_I2C_RX_ERR) != 0)
|
||||
(*state->err_cb)(I2CECB_RX_ERR|b, i);
|
||||
(*state->err_cb) (I2CECB_RX_ERR | b,
|
||||
i);
|
||||
}
|
||||
}
|
||||
|
||||
if (j >= TOUT_LOOP)
|
||||
(*state->err_cb)(I2CECB_TIMEOUT, 0);
|
||||
(*state->err_cb) (I2CECB_TIMEOUT, 0);
|
||||
}
|
||||
|
||||
return (j >= TOUT_LOOP) ? I2CERR_TIMEOUT : 0;
|
||||
|
|
@ -567,8 +570,7 @@ static int i2c_doio(i2c_state_t *state)
|
|||
|
||||
static int had_tx_nak;
|
||||
|
||||
static void
|
||||
i2c_test_callback(int flags, int xnum)
|
||||
static void i2c_test_callback(int flags, int xnum)
|
||||
{
|
||||
if ((flags & I2CECB_TX_ERR) && (flags & I2CECB_TX_NAK))
|
||||
had_tx_nak = 1;
|
||||
|
|
@ -587,7 +589,8 @@ int i2c_probe(uchar chip)
|
|||
state.err_cb = i2c_test_callback;
|
||||
had_tx_nak = 0;
|
||||
|
||||
rc = i2c_receive(&state, chip, 0, I2CF_START_COND|I2CF_STOP_COND, 1, buf);
|
||||
rc = i2c_receive(&state, chip, 0, I2CF_START_COND | I2CF_STOP_COND, 1,
|
||||
buf);
|
||||
|
||||
if (rc != 0)
|
||||
return (rc);
|
||||
|
|
@ -612,8 +615,8 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
|
|||
|
||||
xaddr[0] = (addr >> 24) & 0xFF;
|
||||
xaddr[1] = (addr >> 16) & 0xFF;
|
||||
xaddr[2] = (addr >> 8) & 0xFF;
|
||||
xaddr[3] = addr & 0xFF;
|
||||
xaddr[2] = (addr >> 8) & 0xFF;
|
||||
xaddr[3] = addr & 0xFF;
|
||||
|
||||
#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
|
||||
/*
|
||||
|
|
@ -626,12 +629,13 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
|
|||
* be one byte because the extra address bits are hidden in the
|
||||
* chip address.
|
||||
*/
|
||||
chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
|
||||
chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
|
||||
#endif
|
||||
|
||||
i2c_newio(&state);
|
||||
|
||||
rc = i2c_send(&state, chip, 0, I2CF_START_COND, alen, &xaddr[4-alen]);
|
||||
rc = i2c_send(&state, chip, 0, I2CF_START_COND, alen,
|
||||
&xaddr[4 - alen]);
|
||||
if (rc != 0) {
|
||||
printf("i2c_read: i2c_send failed (%d)\n", rc);
|
||||
return 1;
|
||||
|
|
@ -659,8 +663,8 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
|
|||
|
||||
xaddr[0] = (addr >> 24) & 0xFF;
|
||||
xaddr[1] = (addr >> 16) & 0xFF;
|
||||
xaddr[2] = (addr >> 8) & 0xFF;
|
||||
xaddr[3] = addr & 0xFF;
|
||||
xaddr[2] = (addr >> 8) & 0xFF;
|
||||
xaddr[3] = addr & 0xFF;
|
||||
|
||||
#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
|
||||
/*
|
||||
|
|
@ -673,12 +677,13 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
|
|||
* be one byte because the extra address bits are hidden in the
|
||||
* chip address.
|
||||
*/
|
||||
chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
|
||||
chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
|
||||
#endif
|
||||
|
||||
i2c_newio(&state);
|
||||
|
||||
rc = i2c_send(&state, chip, 0, I2CF_START_COND, alen, &xaddr[4-alen]);
|
||||
rc = i2c_send(&state, chip, 0, I2CF_START_COND, alen,
|
||||
&xaddr[4 - alen]);
|
||||
if (rc != 0) {
|
||||
printf("i2c_write: first i2c_send failed (%d)\n", rc);
|
||||
return 1;
|
||||
|
|
@ -698,4 +703,4 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
|
|||
return 0;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_HARD_I2C */
|
||||
#endif /* CONFIG_HARD_I2C */
|
||||
|
|
|
|||
Loading…
Reference in New Issue