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mips: octeon: dts/dtsi: Change UART DT node to use clocks property 

We already have a clock driver for MIPS Octeon. This patch changes the
Octeon DT nodes to supply the clock property via the clock driver
instead of using an hard-coded value, which is not correct in all cases.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This commit is contained in:
Aaron Williams 2021-04-07 09:12:39 +02:00 committed by Stefan Roese
parent 5d2d5c4f23
commit 0ba39cded6
2 changed files with 2 additions and 4 deletions
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2
arch/mips/dts/mrvl,cn73xx.dtsi
View File

@ -97,6 +97,7 @@
uart0: serial@1180000000800 { uart0: serial@1180000000800 {
compatible = "cavium,octeon-3860-uart","ns16550"; compatible = "cavium,octeon-3860-uart","ns16550";
reg = <0x11800 0x00000800 0x0 0x400>; reg = <0x11800 0x00000800 0x0 0x400>;
clocks = <&clk OCTEON_CLK_IO>;
clock-frequency = <0>; clock-frequency = <0>;
current-speed = <115200>; current-speed = <115200>;
reg-shift = <3>; reg-shift = <3>;
@ -106,6 +107,7 @@
uart1: serial@1180000000c00 { uart1: serial@1180000000c00 {
compatible = "cavium,octeon-3860-uart","ns16550"; compatible = "cavium,octeon-3860-uart","ns16550";
reg = <0x11800 0x00000c00 0x0 0x400>; reg = <0x11800 0x00000c00 0x0 0x400>;
clocks = <&clk OCTEON_CLK_IO>;
clock-frequency = <0>; clock-frequency = <0>;
current-speed = <115200>; current-speed = <115200>;
reg-shift = <3>; reg-shift = <3>;

4
arch/mips/dts/mrvl,octeon-ebb7304.dts
View File

@ -112,10 +112,6 @@
}; };
}; };
&uart0 {
clock-frequency = <1200000000>;
};
&i2c0 { &i2c0 {
u-boot,dm-pre-reloc; /* Needed early for DDR SPD EEPROM */ u-boot,dm-pre-reloc; /* Needed early for DDR SPD EEPROM */
clock-frequency = <100000>; clock-frequency = <100000>;