board: ti: j721s2: Delete nodes for OSPI NAND SPL fixup
cadence-qspi manually parses flash subnodes. Simply disabling the node was not giving expected behaviour across drivers. So, additionally delete the disabled node also as the flash is undiscoverable due to hardware muxing anyways. Signed-off-by: Apurva Nandan <a-nandan@ti.com>
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9390b636e8
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@ -79,7 +79,7 @@ static void __maybe_unused detect_enable_spinand(void *blob)
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{
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struct gpio_desc desc = {0};
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char *ospi_mux_sel_gpio = "6";
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int offset;
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int nand_offset, nor_offset;
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if (dm_gpio_lookup_name(ospi_mux_sel_gpio, &desc))
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return;
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@ -90,19 +90,16 @@ static void __maybe_unused detect_enable_spinand(void *blob)
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if (dm_gpio_set_dir_flags(&desc, GPIOD_IS_IN))
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return;
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nand_offset = fdt_node_offset_by_compatible(blob, -1, "spi-nand");
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nor_offset = fdt_node_offset_by_compatible(blob,
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fdt_parent_offset(blob, nand_offset),
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"jedec,spi-nor");
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if (dm_gpio_get_value(&desc)) {
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offset = fdt_node_offset_by_compatible(blob, -1, "spi-nand");
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fdt_status_okay(blob, offset);
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offset = fdt_first_subnode(blob,
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fdt_parent_offset(blob, offset));
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while (offset > 0) {
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if (!fdt_node_check_compatible(blob, offset,
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"jedec,spi-nor"))
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fdt_status_disabled(blob, offset);
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offset = fdt_next_subnode(blob, offset);
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}
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fdt_status_okay(blob, nand_offset);
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fdt_del_node(blob, nor_offset);
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} else {
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fdt_del_node(blob, nand_offset);
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}
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}
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#endif
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