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powerpc/ppc4xx: Remove typedefs for gdsys FPGA 

Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Dirk Eibach 2012-04-27 10:33:46 +02:00 committed by Stefan Roese
parent 530846b3c7
commit 0e60aa85c8
9 changed files with 42 additions and 40 deletions
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3
board/gdsys/405ep/405ep.c
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@ -105,7 +105,8 @@ int board_early_init_r(void)
gd405ep_set_fpga_reset(0); gd405ep_set_fpga_reset(0);
for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k) { for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k) {
ihs_fpga_t *fpga = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(k); struct ihs_fpga *fpga =
(struct ihs_fpga *)CONFIG_SYS_FPGA_BASE(k);
#ifdef CONFIG_SYS_FPGA_NO_RFL_HI #ifdef CONFIG_SYS_FPGA_NO_RFL_HI
u16 *reflection_target = &fpga->reflection_low; u16 *reflection_target = &fpga->reflection_low;
#else #else

4
board/gdsys/405ep/dlvision-10g.c
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@ -95,7 +95,7 @@ static unsigned int get_mc2_present(void)
static void print_fpga_info(unsigned dev) static void print_fpga_info(unsigned dev)
{ {
ihs_fpga_t *fpga = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(dev); struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(dev);
u16 versions = in_le16(&fpga->versions); u16 versions = in_le16(&fpga->versions);
u16 fpga_version = in_le16(&fpga->fpga_version); u16 fpga_version = in_le16(&fpga->fpga_version);
u16 fpga_features = in_le16(&fpga->fpga_features); u16 fpga_features = in_le16(&fpga->fpga_features);
@ -263,7 +263,7 @@ int checkboard(void)
int last_stage_init(void) int last_stage_init(void)
{ {
ihs_fpga_t *fpga = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(0); struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(0);
u16 versions = in_le16(&fpga->versions); u16 versions = in_le16(&fpga->versions);
print_fpga_info(0); print_fpga_info(0);

4
board/gdsys/405ep/io.c
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@ -117,7 +117,7 @@ int checkboard(void)
static void print_fpga_info(void) static void print_fpga_info(void)
{ {
ihs_fpga_t *fpga = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(0); struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(0);
u16 versions = in_le16(&fpga->versions); u16 versions = in_le16(&fpga->versions);
u16 fpga_version = in_le16(&fpga->fpga_version); u16 fpga_version = in_le16(&fpga->fpga_version);
u16 fpga_features = in_le16(&fpga->fpga_features); u16 fpga_features = in_le16(&fpga->fpga_features);
@ -179,7 +179,7 @@ static void print_fpga_info(void)
*/ */
int last_stage_init(void) int last_stage_init(void)
{ {
ihs_fpga_t *fpga = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(0); struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(0);
unsigned int k; unsigned int k;
print_fpga_info(); print_fpga_info();

2
board/gdsys/405ep/iocon.c
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@ -92,7 +92,7 @@ int checkboard(void)
static void print_fpga_info(void) static void print_fpga_info(void)
{ {
ihs_fpga_t *fpga = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(0); struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(0);
u16 versions = in_le16(&fpga->versions); u16 versions = in_le16(&fpga->versions);
u16 fpga_version = in_le16(&fpga->fpga_version); u16 fpga_version = in_le16(&fpga->fpga_version);
u16 fpga_features = in_le16(&fpga->fpga_features); u16 fpga_features = in_le16(&fpga->fpga_features);

2
board/gdsys/405ep/neo.c
View File

@ -70,7 +70,7 @@ int checkboard(void)
static void print_fpga_info(void) static void print_fpga_info(void)
{ {
ihs_fpga_t *fpga = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(0); struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(0);
u16 versions = in_le16(&fpga->versions); u16 versions = in_le16(&fpga->versions);
u16 fpga_version = in_le16(&fpga->fpga_version); u16 fpga_version = in_le16(&fpga->fpga_version);
u16 fpga_features = in_le16(&fpga->fpga_features); u16 fpga_features = in_le16(&fpga->fpga_features);

3
board/gdsys/405ex/405ex.c
View File

@ -219,7 +219,8 @@ int board_early_init_r(void)
gd405ex_set_fpga_reset(0); gd405ex_set_fpga_reset(0);
for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k) { for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k) {
ihs_fpga_t *fpga = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(k); struct ihs_fpga *fpga =
(struct ihs_fpga *)CONFIG_SYS_FPGA_BASE(k);
#ifdef CONFIG_SYS_FPGA_NO_RFL_HI #ifdef CONFIG_SYS_FPGA_NO_RFL_HI
u16 *reflection_target = &fpga->reflection_low; u16 *reflection_target = &fpga->reflection_low;
#else #else

6
board/gdsys/405ex/io64.c
View File

@ -100,7 +100,7 @@ int misc_init_r(void)
static void print_fpga_info(unsigned dev) static void print_fpga_info(unsigned dev)
{ {
ihs_fpga_t *fpga = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(dev); struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(dev);
u16 versions = in_le16(&fpga->versions); u16 versions = in_le16(&fpga->versions);
u16 fpga_version = in_le16(&fpga->fpga_version); u16 fpga_version = in_le16(&fpga->fpga_version);
u16 fpga_features = in_le16(&fpga->fpga_features); u16 fpga_features = in_le16(&fpga->fpga_features);
@ -242,8 +242,8 @@ int last_stage_init(void)
{ {
unsigned int k; unsigned int k;
unsigned int fpga; unsigned int fpga;
ihs_fpga_t *fpga0 = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(0); struct ihs_fpga *fpga0 = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(0);
ihs_fpga_t *fpga1 = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(1); struct ihs_fpga *fpga1 = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(1);
int failed = 0; int failed = 0;
char str_phys[] = "Setup PHYs -"; char str_phys[] = "Setup PHYs -";
char str_serdes[] = "Start SERDES blocks"; char str_serdes[] = "Start SERDES blocks";

18
board/gdsys/common/osd.c
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@ -70,8 +70,8 @@ enum {
#if defined(CONFIG_SYS_ICS8N3QV01) || defined(CONFIG_SYS_SIL1178) #if defined(CONFIG_SYS_ICS8N3QV01) || defined(CONFIG_SYS_SIL1178)
static void fpga_iic_write(unsigned screen, u8 slave, u8 reg, u8 data) static void fpga_iic_write(unsigned screen, u8 slave, u8 reg, u8 data)
{ {
ihs_fpga_t *fpga = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(screen); struct ihs_fpga *fpga = (struct ihs_fpga *)CONFIG_SYS_FPGA_BASE(screen);
ihs_i2c_t *i2c = &fpga->i2c; struct ihs_i2c *i2c = &fpga->i2c;
while (in_le16(&fpga->extended_interrupt) & (1 << 12)) while (in_le16(&fpga->extended_interrupt) & (1 << 12))
; ;
@ -81,8 +81,8 @@ static void fpga_iic_write(unsigned screen, u8 slave, u8 reg, u8 data)
static u8 fpga_iic_read(unsigned screen, u8 slave, u8 reg) static u8 fpga_iic_read(unsigned screen, u8 slave, u8 reg)
{ {
ihs_fpga_t *fpga = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(screen); struct ihs_fpga *fpga = (struct ihs_fpga *)CONFIG_SYS_FPGA_BASE(screen);
ihs_i2c_t *i2c = &fpga->i2c; struct ihs_i2c *i2c = &fpga->i2c;
unsigned int ctr = 0; unsigned int ctr = 0;
while (in_le16(&fpga->extended_interrupt) & (1 << 12)) while (in_le16(&fpga->extended_interrupt) & (1 << 12))
@ -129,7 +129,7 @@ static void mpc92469ac_calc_parameters(unsigned int fout,
static void mpc92469ac_set(unsigned screen, unsigned int fout) static void mpc92469ac_set(unsigned screen, unsigned int fout)
{ {
ihs_fpga_t *fpga = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(screen); struct ihs_fpga *fpga = (struct ihs_fpga *)CONFIG_SYS_FPGA_BASE(screen);
unsigned int n; unsigned int n;
unsigned int m; unsigned int m;
unsigned int bitval = 0; unsigned int bitval = 0;
@ -265,8 +265,8 @@ static void ics8n3qv01_set(unsigned screen, unsigned int fout)
static int osd_write_videomem(unsigned screen, unsigned offset, static int osd_write_videomem(unsigned screen, unsigned offset,
u16 *data, size_t charcount) u16 *data, size_t charcount)
{ {
ihs_fpga_t *fpga = struct ihs_fpga *fpga =
(ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(screen); (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(screen);
unsigned int k; unsigned int k;
for (k = 0; k < charcount; ++k) { for (k = 0; k < charcount; ++k) {
@ -318,8 +318,8 @@ static int osd_print(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
int osd_probe(unsigned screen) int osd_probe(unsigned screen)
{ {
ihs_fpga_t *fpga = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(screen); struct ihs_fpga *fpga = (struct ihs_fpga *)CONFIG_SYS_FPGA_BASE(screen);
ihs_osd_t *osd = &fpga->osd; struct ihs_osd *osd = &fpga->osd;
u16 version = in_le16(&osd->version); u16 version = in_le16(&osd->version);
u16 features = in_le16(&osd->features); u16 features = in_le16(&osd->features);
unsigned width; unsigned width;

40
include/gdsys_fpga.h
View File

@ -35,20 +35,20 @@ enum {
int get_fpga_state(unsigned dev); int get_fpga_state(unsigned dev);
void print_fpga_state(unsigned dev); void print_fpga_state(unsigned dev);
typedef struct ihs_gpio { struct ihs_gpio {
u16 read; u16 read;
u16 clear; u16 clear;
u16 set; u16 set;
} ihs_gpio_t; };
typedef struct ihs_i2c { struct ihs_i2c {
u16 write_mailbox; u16 write_mailbox;
u16 write_mailbox_ext; u16 write_mailbox_ext;
u16 read_mailbox; u16 read_mailbox;
u16 read_mailbox_ext; u16 read_mailbox_ext;
} ihs_i2c_t; };
typedef struct ihs_osd { struct ihs_osd {
u16 version; u16 version;
u16 features; u16 features;
u16 control; u16 control;
@ -56,21 +56,21 @@ typedef struct ihs_osd {
u16 xy_scale; u16 xy_scale;
u16 x_pos; u16 x_pos;
u16 y_pos; u16 y_pos;
} ihs_osd_t; };
#ifdef CONFIG_NEO #ifdef CONFIG_NEO
typedef struct ihs_fpga { struct ihs_fpga {
u16 reflection_low; /* 0x0000 */ u16 reflection_low; /* 0x0000 */
u16 versions; /* 0x0002 */ u16 versions; /* 0x0002 */
u16 fpga_features; /* 0x0004 */ u16 fpga_features; /* 0x0004 */
u16 fpga_version; /* 0x0006 */ u16 fpga_version; /* 0x0006 */
u16 reserved_0[8187]; /* 0x0008 */ u16 reserved_0[8187]; /* 0x0008 */
u16 reflection_high; /* 0x3ffe */ u16 reflection_high; /* 0x3ffe */
} ihs_fpga_t; };
#endif #endif
#ifdef CONFIG_IO #ifdef CONFIG_IO
typedef struct ihs_fpga { struct ihs_fpga {
u16 reflection_low; /* 0x0000 */ u16 reflection_low; /* 0x0000 */
u16 versions; /* 0x0002 */ u16 versions; /* 0x0002 */
u16 fpga_features; /* 0x0004 */ u16 fpga_features; /* 0x0004 */
@ -79,11 +79,11 @@ typedef struct ihs_fpga {
u16 quad_serdes_reset; /* 0x0012 */ u16 quad_serdes_reset; /* 0x0012 */
u16 reserved_1[8181]; /* 0x0014 */ u16 reserved_1[8181]; /* 0x0014 */
u16 reflection_high; /* 0x3ffe */ u16 reflection_high; /* 0x3ffe */
} ihs_fpga_t; };
#endif #endif
#ifdef CONFIG_IO64 #ifdef CONFIG_IO64
typedef struct ihs_fpga { struct ihs_fpga {
u16 reflection_low; /* 0x0000 */ u16 reflection_low; /* 0x0000 */
u16 versions; /* 0x0002 */ u16 versions; /* 0x0002 */
u16 fpga_features; /* 0x0004 */ u16 fpga_features; /* 0x0004 */
@ -98,30 +98,30 @@ typedef struct ihs_fpga {
u16 ch0_hicb_config_int;/* 0x0502 */ u16 ch0_hicb_config_int;/* 0x0502 */
u16 reserved_3[7549]; /* 0x0504 */ u16 reserved_3[7549]; /* 0x0504 */
u16 reflection_high; /* 0x3ffe */ u16 reflection_high; /* 0x3ffe */
} ihs_fpga_t; };
#endif #endif
#ifdef CONFIG_IOCON #ifdef CONFIG_IOCON
typedef struct ihs_fpga { struct ihs_fpga {
u16 reflection_low; /* 0x0000 */ u16 reflection_low; /* 0x0000 */
u16 versions; /* 0x0002 */ u16 versions; /* 0x0002 */
u16 fpga_version; /* 0x0004 */ u16 fpga_version; /* 0x0004 */
u16 fpga_features; /* 0x0006 */ u16 fpga_features; /* 0x0006 */
u16 reserved_0[6]; /* 0x0008 */ u16 reserved_0[6]; /* 0x0008 */
ihs_gpio_t gpio; /* 0x0014 */ struct ihs_gpio gpio; /* 0x0014 */
u16 mpc3w_control; /* 0x001a */ u16 mpc3w_control; /* 0x001a */
u16 reserved_1[19]; /* 0x001c */ u16 reserved_1[19]; /* 0x001c */
u16 videocontrol; /* 0x0042 */ u16 videocontrol; /* 0x0042 */
u16 reserved_2[93]; /* 0x0044 */ u16 reserved_2[93]; /* 0x0044 */
u16 reflection_high; /* 0x00fe */ u16 reflection_high; /* 0x00fe */
ihs_osd_t osd; /* 0x0100 */ struct ihs_osd osd; /* 0x0100 */
u16 reserved_3[889]; /* 0x010e */ u16 reserved_3[889]; /* 0x010e */
u16 videomem; /* 0x0800 */ u16 videomem; /* 0x0800 */
} ihs_fpga_t; };
#endif #endif
#ifdef CONFIG_DLVISION_10G #ifdef CONFIG_DLVISION_10G
typedef struct ihs_fpga { struct ihs_fpga {
u16 reflection_low; /* 0x0000 */ u16 reflection_low; /* 0x0000 */
u16 versions; /* 0x0002 */ u16 versions; /* 0x0002 */
u16 fpga_version; /* 0x0004 */ u16 fpga_version; /* 0x0004 */
@ -129,16 +129,16 @@ typedef struct ihs_fpga {
u16 reserved_0[10]; /* 0x0008 */ u16 reserved_0[10]; /* 0x0008 */
u16 extended_interrupt; /* 0x001c */ u16 extended_interrupt; /* 0x001c */
u16 reserved_1[9]; /* 0x001e */ u16 reserved_1[9]; /* 0x001e */
ihs_i2c_t i2c; /* 0x0030 */ struct ihs_i2c i2c; /* 0x0030 */
u16 reserved_2[16]; /* 0x0038 */ u16 reserved_2[16]; /* 0x0038 */
u16 mpc3w_control; /* 0x0058 */ u16 mpc3w_control; /* 0x0058 */
u16 reserved_3[34]; /* 0x005a */ u16 reserved_3[34]; /* 0x005a */
u16 videocontrol; /* 0x009e */ u16 videocontrol; /* 0x009e */
u16 reserved_4[176]; /* 0x00a0 */ u16 reserved_4[176]; /* 0x00a0 */
ihs_osd_t osd; /* 0x0200 */ struct ihs_osd osd; /* 0x0200 */
u16 reserved_5[761]; /* 0x020e */ u16 reserved_5[761]; /* 0x020e */
u16 videomem; /* 0x0800 */ u16 videomem; /* 0x0800 */
} ihs_fpga_t; };
#endif #endif
#endif #endif