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hw25: cleaned up board and mux

This commit is contained in:
Nicolas Gugger 2020-09-09 15:40:21 +02:00
parent 2bc5815cb6
commit 14cbc05115
2 changed files with 61 additions and 81 deletions
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97
board/nm/hw25/board.c
View File

@ -46,48 +46,62 @@ extern int console_init_f(void);
DECLARE_GLOBAL_DATA_PTR;
/*
* CPU GPIOs
*
* (A17) GPIO0_2: RST_GNSS~
* (A16) GPIO0_5: EXTINT_GNSS
* (C15) GPIO0_6: TIMEPULSE_GNSS
*
* (J18) GPIO0_16: RST_PHY~
* (U12) GPIO0_27: RST_SHIELD~
*
* (R14) GPIO1_20: BT_EN
* (V15) GPIO1_21: GSM_PWR_EN
* (U16) GPIO1_25: RST_GSM
* (T16) GPIO1_26: WLAN_EN
* (V17) GPIO1_27: WLAN_IRQ
*
* (C12) GPIO3_17: SIM_SEL
*/
* CPU GPIOs
*
* (J18) GPIO0_16: RST_PHY~
* (U10) GPIO0_22: SEL_RS232/RS485~
* (T10) GPIO0_23: EN_RS485_TERM~
* (T11) GPIO0_26: IO_OUT1
* (U12) GPIO0_27: IO_OUT2
*
* (T12) GPIO1_12: IO_IN0
* (T13) GPIO1_13: IO_IN1
* (T14) GPIO1_14: IO_IN2
* (T15) GPIO1_15: IO_IN3
*
* (T13) GPIO2_0: RST_SDCARD~
* (L17) GPIO2_18: GSM_PWR_EN
* (L16) GPIO2_19: RST_GSM
*
* (K18) GPIO3_9: WLAN_IRQ
* (L18) GPIO3_10: WLAN_EN
* (C12) GPIO3_17: SIM_SEL
*/
#define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio))
#define GPIO_RST_GSM GPIO_TO_PIN(1, 25)
#define GPIO_PWR_GSM GPIO_TO_PIN(1, 21)
#define GPIO_WLAN_EN GPIO_TO_PIN(1, 26)
#define GPIO_BT_EN GPIO_TO_PIN(1, 20)
#define GPIO_RST_GNSS GPIO_TO_PIN(0, 2)
#define GPIO_RST_ETH_N GPIO_TO_PIN(0, 16)
#define GPIO_RST_GSM GPIO_TO_PIN(2, 19)
#define GPIO_PWR_GSM GPIO_TO_PIN(2, 18)
#define GPIO_WLAN_EN GPIO_TO_PIN(3, 10)
#define GPIO_SIM_SEL GPIO_TO_PIN(3, 17)
#define GPIO_RST_SDCARD_N GPIO_TO_PIN(2, 0)
#define GPIO_SERIAL_SEL GPIO_TO_PIN(0, 22)
#define GPIO_RS485_TERM_EN GPIO_TO_PIN(0, 23)
#define GPIO_OUT1 GPIO_TO_PIN(0, 26)
#define GPIO_OUT2 GPIO_TO_PIN(0, 27)
#define GPIO_IN0 GPIO_TO_PIN(1, 12)
#define GPIO_IN1 GPIO_TO_PIN(1, 13)
#define GPIO_IN2 GPIO_TO_PIN(1, 14)
#define GPIO_IN3 GPIO_TO_PIN(1, 15)
/*
* PMIC GPIOs
*
* GPIO_7: EN_SUPPLY_GSM
* GPIO_8: EN_SUPPLY_WIFI
* GPIO_10: LED.LWR
* GPIO_11: LED.UPR
*/
#define PMIC_GSM_SUPPLY_EN_IO 7
#define PMIC_WIFI_SUPPLY_EN_IO 8
#define PMIC_LED0 10 /* Lower */
#define PMIC_LED1 11 /* Upper */
@ -243,7 +257,7 @@ struct serial_device *default_serial_console(void)
* Mux pins for selected UART properly.
* Note: UART indexes start at 0 while eserial indexes start at 1.
*
* Provide console on internal UART1 regardless of boot mode.
* Provide console on internal UART0 regardless of boot mode.
* This only has a side effect when using X-Modem boot
*/
if (spl_boot_device() == BOOT_DEVICE_UART) {
@ -251,8 +265,8 @@ struct serial_device *default_serial_console(void)
enable_uart0_pin_mux();
return &eserial1_device;
} else {
/* Regular and JTAG boot use internal UART1 */
enable_uart1_pin_mux();
/* Regular and JTAG boot use internal UART0 */
enable_uart0_pin_mux();
return &eserial2_device;
}
}
@ -325,10 +339,6 @@ static void init_pmic_spl(void)
bus = da9063_claim_i2c_bus();
/* Enable +3V3_GNSS (LDO6) */
(void)da9063_set_reg(PMIC_REG_LDO6_CONT, PMIC_LDOx_EN_MASK);
mdelay(2);
pmic_ignition_gate_on();
/* Enable charging of RTC backup capacitor (1mA, 3.1V) */
@ -438,7 +448,6 @@ const struct dpll_params *get_dpll_ddr_params(void)
void set_uart_mux_conf(void)
{
enable_uart0_pin_mux();
enable_uart1_pin_mux();
}
void set_mux_conf_regs(void)
@ -592,24 +601,7 @@ static void init_gsm(void)
#endif
}
static void init_gnss(void)
{
/*
* Release GNSS reset line, so that module starts up early
*/
REQUEST_AND_SET_GPIO(GPIO_RST_GNSS);
}
/* TODO: Double Check - WiFi is enabled by sequencer already */
static void init_wifi(void)
{
int bus;
/* Enable WiFi power supply */
bus = da9063_claim_i2c_bus();
da9063_set_gpio(PMIC_WIFI_SUPPLY_EN_IO, 1);
da9063_release_i2c_bus(bus);
}
#endif /* !defined(CONFIG_SPL_BUILD) */
@ -899,13 +891,10 @@ int board_late_init(void)
/* Initialize pins */
REQUEST_AND_CLEAR_GPIO(GPIO_WLAN_EN);
REQUEST_AND_CLEAR_GPIO(GPIO_BT_EN);
init_ethernet();
init_sim_mux();
init_gsm();
init_gnss();
init_wifi();
/*
* Check if a user action is requested

45
board/nm/hw25/mux.c
View File

@ -105,7 +105,7 @@ static struct module_pin_mux i2c2_pin_mux[] = {
static struct module_pin_mux rmii1_pin_mux[] = {
/* RMII */
{OFFSET(mii1_crs), MODE(1) | PULLUDDIS | RXACTIVE}, /* (H17) rmii1_crs */
{OFFSET(mii1_rxerr), MODE(7) | PULLUDEN | PULLDOWN_EN | RXACTIVE}, /* (J15) gpio */
{OFFSET(mii1_rxerr), MODE(7) | PULLUDEN | PULLDOWN_EN | RXACTIVE}, /* (J15) gpio (rxerr) */
{OFFSET(mii1_rxd0), MODE(1) | PULLUDDIS | RXACTIVE}, /* (M16) rmii1_rxd0 */
{OFFSET(mii1_rxd1), MODE(1) | PULLUDDIS | RXACTIVE}, /* (L15) rmii1_rxd1 */
{OFFSET(mii1_txen), MODE(1) | PULLUDDIS}, /* (J16) rmii1_txen */
@ -122,6 +122,20 @@ static struct module_pin_mux rmii1_pin_mux[] = {
{-1}
};
/* RMII2: Ethernet */
static struct module_pin_mux rmii2_pin_mux[] = {
/* RMII */
{OFFSET(gpmc_a9), MODE(3) | PULLUDDIS | RXACTIVE}, /* (U16) rmii2_crs */
{OFFSET(gpmc_wpn), MODE(7) | PULLUDEN | PULLDOWN_EN | RXACTIVE}, /* (U17) gpio (rxerr) */
{OFFSET(gpmc_a11), MODE(3) | PULLUDDIS | RXACTIVE}, /* (V17) rmii2_rxd0 */
{OFFSET(gpmc_a10), MODE(3) | PULLUDDIS | RXACTIVE}, /* (T16) rmii2_rxd1 */
{OFFSET(gpmc_a0), MODE(3) | PULLUDDIS}, /* (R13) rmii2_txen */
{OFFSET(gpmc_a5), MODE(3) | PULLUDDIS}, /* (V15) rmii2_txd0 */
{OFFSET(gpmc_a4), MODE(3) | PULLUDDIS}, /* (R14) rmii2_txd1 */
{OFFSET(mii1_col), MODE(1) | PULLUDDIS | RXACTIVE}, /* (H16) rmii2_refclk */
{-1},
};
/* MMC0: WiFi */
static struct module_pin_mux mmc0_sdio_pin_mux[] = {
{OFFSET(mmc0_clk), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (G17) MMC0_CLK */
@ -162,29 +176,12 @@ static struct module_pin_mux uart0_pin_mux[] = {
{-1},
};
/* UART0: RS232/RS485 shield mode */
static struct module_pin_mux uart0_pin_mux[] = {
{OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (E15) UART0_RXD */
{OFFSET(uart0_txd), (MODE(0) | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (E16) UART0_TXD */
{-1},
};
/* UART5: RS232/RS485 */
/* Leave UART5 unconfigured because we want to configure it as needed by Linux (serial) */
/* Mode 7 = GPIO */
static struct module_pin_mux uart0_disabled_pin_mux[] = {
{OFFSET(lcd_data9), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (E15) GPIO1_10 */
{OFFSET(lcd_data8), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (E16) GPIO1_11 */
{OFFSET(lcd_data14), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (E18) GPIO1_8 */
{OFFSET(lcd_data15), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (E17) GPIO1_9 */
{-1},
};
/* UART5: RS232/RS485 */
/* CTS is unused - set to GPIO mode */
static struct module_pin_mux uart5_pin_mux[] = {
{OFFSET(lcd_data9), (MODE(4) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (U2) UART5_RXD */
{OFFSET(lcd_data8), (MODE(4) | PULLUDEN | PULLUP_EN)}, /* (U1) UART5_TXD */
{OFFSET(lcd_data14), (MODE(6) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (V4) uart5_ctsn */
{OFFSET(lcd_data14), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* (V4) uart5_ctsn */
{OFFSET(lcd_data15), (MODE(6) | PULLUDEN | PULLUP_EN)}, /* (T5) uart5_rtsn */
{-1}
};
@ -207,7 +204,7 @@ void enable_board_pin_mux(void)
configure_module_pin_mux(gpio_pin_mux);
configure_module_pin_mux(rmii1_pin_mux);
//configure_module_pin_mux(rmii1_pin_mux);
configure_module_pin_mux(rmii2_pin_mux);
configure_module_pin_mux(mmc0_sdio_pin_mux);
configure_module_pin_mux(mmc1_emmc_pin_mux);
configure_module_pin_mux(usb_pin_mux);
@ -215,7 +212,6 @@ void enable_board_pin_mux(void)
configure_module_pin_mux(i2c0_pin_mux);
configure_module_pin_mux(i2c2_pin_mux);
//configure_module_pin_mux(uart3_pin_mux);
configure_module_pin_mux(uart5_pin_mux);
configure_module_pin_mux(unused_pin_mux);
@ -226,8 +222,3 @@ void enable_uart0_pin_mux(void)
configure_module_pin_mux(uart0_pin_mux);
}
void disable_uart0_pin_mux(void)
{
configure_module_pin_mux(uart0_disabled_pin_mux);
}