ADD: [hw16] added support for hw16 from separate branch
BugzId: 60637
This commit is contained in:
Marcel Reichmuth
parent
109c8ec9f6
commit
16d45768e4
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@ -374,16 +374,8 @@ config TARGET_AM335X_EVM
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select DM_GPIO
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select TI_I2C_BOARD_DETECT
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config TARGET_AM335X_NETBIRD
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bool "Support am335x_netbird"
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select CPU_V7
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select SUPPORT_SPL
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select DM
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select DM_SERIAL
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select DM_GPIO
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config TARGET_AM335X_NETBIRD_V2
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bool "Support am335x_netbird_v2"
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config TARGET_AM335X_NBHW16
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bool "Support am335x_nbhw16"
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select CPU_V7
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select SUPPORT_SPL
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select DM
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@ -918,8 +910,7 @@ source "board/hisilicon/hikey/Kconfig"
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source "board/imx31_phycore/Kconfig"
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source "board/isee/igep0033/Kconfig"
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source "board/mpl/vcma9/Kconfig"
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source "board/nm/netbird/Kconfig"
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source "board/nm/netbird_v2/Kconfig"
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source "board/nm/nbhw16/Kconfig"
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source "board/nm/nrhw20/Kconfig"
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source "board/nm/nmhw21/Kconfig"
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source "board/nm/nrhw22/Kconfig"
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@ -1,7 +1,7 @@
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if TARGET_AM335X_NETBIRD_V2
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if TARGET_AM335X_NBHW16
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config SYS_BOARD
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default "netbird_v2"
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default "nbhw16"
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config SYS_VENDOR
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default "nm"
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@ -10,7 +10,7 @@ config SYS_SOC
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default "am33xx"
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config SYS_CONFIG_NAME
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default "am335x_netbird_v2"
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default "am335x_nbhw16"
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config CONS_INDEX
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int "UART used for console"
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@ -10,4 +10,4 @@ ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
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obj-y := mux.o
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endif
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obj-y += board.o ../common/bdparser.o ../common/board_descriptor.o
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obj-y += board.o ../common/bdparser.o ../common/board_descriptor.o shield.o shield_can.o shield_comio.o shield_gnsscan.o fileaccess.o
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@ -40,6 +40,7 @@
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#include "shield.h"
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#include "shield_can.h"
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#include "shield_comio.h"
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#include "shield_gnsscan.h"
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#include "fileaccess.h"
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DECLARE_GLOBAL_DATA_PTR;
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@ -82,6 +83,7 @@ static BD_Context bdctx[3]; /* The descriptor context */
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#define SHIELD_COM_IO 0
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#define SHIELD_DUALCAN 1
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#define SHIELD_GNSSCAN 2
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static int _bd_init(void)
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{
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@ -102,6 +104,19 @@ static int _bd_init(void)
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return 0;
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}
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static bool is_jtag_boot(uint32_t address)
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{
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char* jtag_token = (char*)address;
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if (strcmp(jtag_token, "JTAGBOOT") == 0) {
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strcpy(jtag_token, "jtagboot");
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return true;
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}
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else {
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return false;
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}
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}
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/*
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* Read header information from EEPROM into global structure.
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*/
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@ -123,15 +138,15 @@ struct serial_device *default_serial_console(void)
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#ifndef CONFIG_SKIP_LOWLEVEL_INIT
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static const struct ddr_data ddr3_netbird_data = {
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static const struct ddr_data ddr3_data = {
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/* Ratios were optimized by DDR3 training software from TI */
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.datardsratio0 = 0x39,
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.datawdsratio0 = 0x3f,
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.datafwsratio0 = 0x98,
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.datawrsratio0 = 0x7d,
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.datardsratio0 = 0x39, /* 0x39 */
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.datawdsratio0 = 0x3f, /* 0x40 */ /* 3f */
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.datafwsratio0 = 0x98, /* 0x96 */ /* 98 */
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.datawrsratio0 = 0x7d, /* 0x7d */
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};
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static const struct cmd_control ddr3_netbird_cmd_ctrl_data = {
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static const struct cmd_control ddr3_cmd_ctrl_data = {
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.cmd0csratio = MT41K256M16HA125E_RATIO,
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.cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
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@ -142,7 +157,7 @@ static const struct cmd_control ddr3_netbird_cmd_ctrl_data = {
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.cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
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};
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static struct emif_regs ddr3_netbird_emif_reg_data = {
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static struct emif_regs ddr3_emif_reg_data = {
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.sdram_config = MT41K256M16HA125E_EMIF_SDCFG,
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.ref_ctrl = 0x61A, /* 32ms > 85°C */
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.sdram_tim1 = 0x0AAAE51B,
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@ -172,7 +187,7 @@ int spl_start_uboot(void)
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#endif
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#define OSC (V_OSCK/1000000)
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struct dpll_params dpll_ddr_nbhw16= {
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struct dpll_params dpll_ddr= {
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DDR3_CLOCK_FREQUENCY, OSC-1, 1, -1, -1, -1, -1};
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void am33xx_spl_board_init(void)
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@ -201,12 +216,20 @@ void am33xx_spl_board_init(void)
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if (read_eeprom() < 0)
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puts("Could not get board ID.\n");
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/* Debugger can place marker at end of SRAM to stop boot here */
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if (is_jtag_boot(CONFIG_JTAG_MARKER_SPL))
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{
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puts("Detected JTAG boot, executing bkpt #0\n");
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__asm__ __volatile__ ("bkpt #0");
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}
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}
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const struct dpll_params *get_dpll_ddr_params(void)
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{
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dpll_ddr_nbhw16.n = (get_osclk() / 1000000) - 1;
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return &dpll_ddr_nbhw16;
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dpll_ddr.n = (get_osclk() / 1000000) - 1;
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return &dpll_ddr;
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}
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void set_uart_mux_conf(void)
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@ -221,25 +244,59 @@ void set_mux_conf_regs(void)
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}
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const struct ctrl_ioregs ioregs_netbird = {
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.cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
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.cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
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.cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
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.dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
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.dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
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const struct ctrl_ioregs ioregs = {
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.cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
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.cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
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.cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
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.dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
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.dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE
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};
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void sdram_init(void)
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{
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config_ddr(DDR3_CLOCK_FREQUENCY, &ioregs_netbird,
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&ddr3_netbird_data,
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&ddr3_netbird_cmd_ctrl_data,
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&ddr3_netbird_emif_reg_data, 0);
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config_ddr(DDR3_CLOCK_FREQUENCY, &ioregs,
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&ddr3_data,
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&ddr3_cmd_ctrl_data,
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&ddr3_emif_reg_data, 0);
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}
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#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
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#if !defined(CONFIG_SPL_BUILD)
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/*
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* Override for Ethernet link timeout definition,
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* with option to specify via environment variable linktimeout
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*/
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int eth_phy_timeout(void)
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{
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const char* timeout_env = NULL;
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int timeout;
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timeout = PHY_ANEG_DEFAULT_TIMEOUT;
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/*
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* Check if timeout has been defined by environment.
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* Valid range: 1000..10000 milliseconds
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*/
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timeout_env = getenv("linktimeout");
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if (timeout_env != NULL) {
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timeout = simple_strtoul(timeout_env, NULL, 10);
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if (timeout == 0) {
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timeout = PHY_ANEG_DEFAULT_TIMEOUT;
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} else if (timeout < 1000) {
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timeout = 1000;
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} else if (timeout > 10000) {
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timeout = 10000;
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}
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}
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return timeout;
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}
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#endif /* !defined(CONFIG_SPL_BUILD) */
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static void request_and_set_gpio(int gpio, char *name, int value)
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{
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int ret;
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@ -493,33 +550,50 @@ static void enable_wlan_clock(void)
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void set_console(void)
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{
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char buf[8];
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char *defaultconsole = getenv("defaultconsole");
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const char *defaultconsole = getenv("defaultconsole");
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int shield_id = bd_get_shield(0);
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/* Set default console to ttyS1 if not yet defined in env */
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if (defaultconsole == 0) {
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/* Use the default console */
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setenv("defaultconsole", "ttyS1");
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}
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/* Don't allow changing to ttyS0 because ttyS0 is not available in the
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* kernel if no comio shield is available */
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if (shield_id != SHIELD_COM_IO) {
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return;
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}
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/*
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* Always use internal console for u-boot
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* as COM/IO shield is not ready at that time.
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* (Needs to be initialized first using the
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* shieldcmd that is run by bootcmd.)
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*/
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serial_set_console_index(1);
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/* With comio shield the defaultconsole should be ttyS0 and not ttyS1 */
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setenv("defaultconsole", "ttyS0");
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#if defined(CONFIG_PRE_CONSOLE_BUFFER)
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serial_init(); /* serial communications setup */
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console_init_f(); /* stage 1 init of console */
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#endif
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/* If consoldev is set take this as productive conosle instead of default console */
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if (read_file("/root/boot/consoledev", buf, 5) != 5) {
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puts("Invalid file consoledev\n");
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return;
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}
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if (shield_id == SHIELD_COM_IO) {
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char buf[20];
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if (strstr(buf, "tty")==buf) {
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buf[5] = 0;
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setenv("defaultconsole", buf);
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/*
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* With COM/IO shield the defaultconsole for the kernel should
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* be ttyS0 (external port).
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* If consoledev file is present, take the tty defined in it as console
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*/
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setenv("defaultconsole", "ttyS0");
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if (read_file("/root/boot/consoledev",buf, sizeof(buf)) > 3) {
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if (strstr(buf, "tty") == buf) {
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int i;
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buf[sizeof(buf)-1] = 0;
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for (i=0; i<sizeof(buf); i++) {
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if (buf[i] <= ' ') {
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buf[i] = 0;
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break;
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}
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}
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setenv("defaultconsole", buf);
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}
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}
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}
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}
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@ -558,6 +632,16 @@ static void check_fct(void)
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}
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}
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static void check_jtag_boot(void)
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{
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if (is_jtag_boot(CONFIG_JTAG_MARKER_UBOOT)) {
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char *bootcmd = getenv("bootcmd");
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setenv ("bootcmd", "");
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/* Save original bootcmd in "bootcmd_orig" to allow manual boot */
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setenv ("bootcmd_orig", bootcmd);
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puts("Detected JTAG boot. Waiting on command line\n");
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}
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}
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static void set_fdtshieldcmd(const char *fdt_cmd)
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{
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@ -578,7 +662,9 @@ static struct shield_command known_shield_commands[] = {
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"comio",
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"shield comio mode rs232",
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"fdt get value serial0 /aliases serial0;" \
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"fdt set $serial0 status okay",
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"fdt get value dio0 /aliases dio0;" \
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"fdt set $serial0 status okay;" \
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"fdt set $dio0 status okay;",
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comio_shield_init
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},
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{
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@ -591,6 +677,22 @@ static struct shield_command known_shield_commands[] = {
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"fdt set $can1 status okay;",
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can_shield_init
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},
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{
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SHIELD_GNSSCAN,
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"gnsscan",
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"shield gnsscan termination off",
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"fdt get value serial0 /aliases serial0;" \
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"fdt get value can1 /aliases d_can1;" \
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"fdt set $serial0 status okay;" \
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"fdt set $can1 status okay;" \
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/* fix uart0 pinctrl: */ \
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"fdt get value dt_path /aliases uart0_pins_gnss_can;" \
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"fdt get value dt_phandle $dt_path phandle;" \
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"fdt get value dt_path /aliases serial0;" \
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"fdt set $dt_path pinctrl-0 <$dt_phandle>;" \
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,
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gnsscan_shield_init
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},
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};
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static const struct shield_command* get_shield_command(int shield_id)
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@ -650,7 +752,6 @@ static void shield_init(void)
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}
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#endif
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#ifdef CONFIG_BOARD_LATE_INIT
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int board_late_init(void)
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{
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#if !defined(CONFIG_SPL_BUILD)
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@ -690,12 +791,11 @@ int board_late_init(void)
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shield_init();
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check_fct();
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check_jtag_boot();
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#endif
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return 0;
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}
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#endif
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#ifndef CONFIG_DM_ETH
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@ -67,7 +67,8 @@ static int do_shieldmode(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv
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U_BOOT_CMD(
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shield, 6, 1, do_shieldmode,
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"Set the shield mode",
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"dualcan termination [on|off] [on|off]\n"
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"shield comio mode [rs232|rs485] termination [on|off]\n"
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"shield dualcan termination on|off on|off\n"
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"shield comio mode rs232|rs485 [termination on|off]\n"
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"shield gnsscan termination on|off\n"
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);
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@ -0,0 +1,143 @@
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#undef DEBUG
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#include <common.h>
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#include <asm/gpio.h>
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#include <asm/arch/mux.h>
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#include "shield.h"
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#include "board.h"
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#define NETBIRD_GPIO_RST_SHIELD_N GPIO_TO_PIN(0, 27)
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#define NETBIRD_GPIO_EN_CAN_TERM_N GPIO_TO_PIN(0, 7)
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static int shield_slot_initialized = 0;
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static struct module_pin_mux gnsscan_shield_netbird_pin_mux_final[] = {
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/* Leave UART0 unconfigured because we want to configure it as needed by linux (can/spi/uart/etc) */
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{OFFSET(uart0_rxd), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (E15) UART0_RXD */
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{OFFSET(uart0_txd), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (E16) UART0_TXD */
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{OFFSET(uart0_ctsn), (MODE(2) | PULLUDEN | PULLUP_EN)}, /* CAN1 tx */
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{OFFSET(uart0_rtsn), (MODE(2) | PULLUDDIS | RXACTIVE)}, /* CAN1 rx */
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{OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* EN_CAN1_TERM_N */
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{-1},
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};
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static int request_gpios(void)
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{
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int ret;
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debug("Shield configure gpios\n");
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ret = shield_gpio_request_as_input(NETBIRD_GPIO_RST_SHIELD_N, "shield-rst");
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if ((ret < 0))
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return -1;
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ret = shield_gpio_request_as_input(NETBIRD_GPIO_EN_CAN_TERM_N, "shield-can-term-n");
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if ((ret < 0))
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return -1;
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shield_slot_initialized = 1;
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return 0;
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}
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static int configure_shieldmode(int mode)
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{
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int ret;
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if (mode < 0 || mode > 1) {
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debug("Invalid shield mode %d\n", mode);
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return -1;
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}
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debug("Shield type gnsscan\n");
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debug ("Set shield mode to %d\n", mode);
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if (!shield_slot_initialized) {
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if (request_gpios()) {
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puts("Failed to request gpios\n");
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return -1;
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}
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}
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debug("Set final gnsscan shield muxing\n");
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configure_module_pin_mux(gnsscan_shield_netbird_pin_mux_final);
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debug("Make sure shield module is in reset\n");
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ret = gpio_direction_output(NETBIRD_GPIO_RST_SHIELD_N, 0);
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if (ret < 0) {
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puts("Can not set shield-rst as output\n");
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return -1;
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}
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udelay(10);
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debug("Set termination on/off\n");
|
||||
ret = gpio_direction_output(NETBIRD_GPIO_EN_CAN_TERM_N, mode);
|
||||
if (ret < 0) {
|
||||
puts("Can not set shield-can-term as output\n");
|
||||
return -1;
|
||||
}
|
||||
udelay(10);
|
||||
|
||||
debug("Take shield out of reset\n");
|
||||
gpio_set_value(NETBIRD_GPIO_RST_SHIELD_N, 1);
|
||||
udelay(10);
|
||||
|
||||
return 0;
|
||||
|
||||
}
|
||||
|
||||
static int get_termination(const char* termination)
|
||||
{
|
||||
if (strcmp("on", termination) == 0) {
|
||||
return 1;
|
||||
}
|
||||
else if (strcmp("off", termination) == 0) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
debug ("Invalid termination mode %s (falling back to off)", termination);
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int get_mode_from_args(char * const argv[], int argc)
|
||||
{
|
||||
#define CAN_PORTS 1
|
||||
int terminations[CAN_PORTS];
|
||||
int i;
|
||||
|
||||
assert(argc == (CAN_PORTS + 1));
|
||||
|
||||
if (strcmp ("termination", argv[0])) {
|
||||
debug("The only option for dualcan is terminations\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
for (i = 0; i < CAN_PORTS; i ++) {
|
||||
terminations[i] = get_termination(argv[i + 1]);
|
||||
if (terminations[i] < 0) {
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
/* Termination is inverse */
|
||||
return (!terminations[0] << 0);
|
||||
}
|
||||
|
||||
static int set_shieldmode(char * const argv[], int argc)
|
||||
{
|
||||
if (argc != 2) {
|
||||
debug("Too few arguments for gnsscan\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
return configure_shieldmode(get_mode_from_args(argv, argc));
|
||||
}
|
||||
|
||||
struct shield_t gnsscan_shield = {
|
||||
"gnsscan", set_shieldmode
|
||||
};
|
||||
|
||||
void gnsscan_shield_init(void)
|
||||
{
|
||||
shield_register(&gnsscan_shield);
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
#ifndef SHIELD_GNSSCAN_H
|
||||
#define SHIELD_GNSSCAN_H
|
||||
|
||||
int shield_gnsscan_init(void);
|
||||
int shield_gnscan_setmode(int mode);
|
||||
|
||||
void gnsscan_shield_init(void);
|
||||
|
||||
#endif // SHIELD_CAN_H
|
||||
|
|
@ -36,7 +36,7 @@ SECTIONS
|
|||
*(.__image_copy_start)
|
||||
*(.vectors)
|
||||
CPUDIR/start.o (.text*)
|
||||
board/nm/netbird/built-in.o (.text*)
|
||||
board/nm/nbhw16/built-in.o (.text*)
|
||||
*(.text*)
|
||||
}
|
||||
|
||||
|
|
@ -1,26 +0,0 @@
|
|||
if TARGET_AM335X_NETBIRD
|
||||
|
||||
config SYS_BOARD
|
||||
default "netbird"
|
||||
|
||||
config SYS_VENDOR
|
||||
default "nm"
|
||||
|
||||
config SYS_SOC
|
||||
default "am33xx"
|
||||
|
||||
config SYS_CONFIG_NAME
|
||||
default "am335x_netbird"
|
||||
|
||||
config CONS_INDEX
|
||||
int "UART used for console"
|
||||
range 1 6
|
||||
default 1
|
||||
help
|
||||
The AM335x SoC has a total of 6 UARTs (UART0 to UART5 as referenced
|
||||
in documentation, etc) available to it. Depending on your specific
|
||||
board you may want something other than UART0 as for example the IDK
|
||||
uses UART3 so enter 4 here.
|
||||
|
||||
endif
|
||||
|
||||
|
|
@ -1,550 +0,0 @@
|
|||
/*
|
||||
* board.c
|
||||
*
|
||||
* Board functions for TI AM335X based boards
|
||||
*
|
||||
* Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <errno.h>
|
||||
#include <spl.h>
|
||||
#include <serial.h>
|
||||
#include <asm/arch/cpu.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/arch/omap.h>
|
||||
#include <asm/arch/ddr_defs.h>
|
||||
#include <asm/arch/clock.h>
|
||||
#include <asm/arch/clk_synthesizer.h>
|
||||
#include <asm/arch/gpio.h>
|
||||
#include <asm/arch/mmc_host_def.h>
|
||||
#include <asm/arch/sys_proto.h>
|
||||
#include <asm/arch/mem.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/emif.h>
|
||||
#include <asm/gpio.h>
|
||||
#include <i2c.h>
|
||||
#include <miiphy.h>
|
||||
#include <cpsw.h>
|
||||
#include <power/tps65217.h>
|
||||
#include <power/tps65218.h>
|
||||
#include <power/tps65910.h>
|
||||
#include <environment.h>
|
||||
#include <watchdog.h>
|
||||
#include <environment.h>
|
||||
#include "../common/bdparser.h"
|
||||
#include "../common/board_descriptor.h"
|
||||
#include "board.h"
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
/* GPIO that controls power to DDR on EVM-SK */
|
||||
#define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio))
|
||||
#define GPIO_DDR_VTT_EN GPIO_TO_PIN(0, 7)
|
||||
#define ICE_GPIO_DDR_VTT_EN GPIO_TO_PIN(0, 18)
|
||||
#define GPIO_PR1_MII_CTRL GPIO_TO_PIN(3, 4)
|
||||
#define GPIO_MUX_MII_CTRL GPIO_TO_PIN(3, 10)
|
||||
#define GPIO_FET_SWITCH_CTRL GPIO_TO_PIN(0, 7)
|
||||
#define GPIO_PHY_RESET GPIO_TO_PIN(2, 5)
|
||||
|
||||
#define NETBIRD_GPIO_RST_PHY_N GPIO_TO_PIN(0, 16)
|
||||
#define NETBIRD_GPIO_PWR_GSM GPIO_TO_PIN(1, 22)
|
||||
#define NETBIRD_GPIO_RST_GSM GPIO_TO_PIN(1, 24)
|
||||
#define NETBIRD_GPIO_WLAN_EN GPIO_TO_PIN(3, 10)
|
||||
#define NETBIRD_GPIO_BT_EN GPIO_TO_PIN(3, 4)
|
||||
#define NETBIRD_GPIO_EN_GPS_ANT GPIO_TO_PIN(2, 24)
|
||||
#define NETBIRD_GPIO_LED_A GPIO_TO_PIN(1, 14)
|
||||
#define NETBIRD_GPIO_LED_B GPIO_TO_PIN(1, 15)
|
||||
#define NETBIRD_GPIO_RESET_BUTTON GPIO_TO_PIN(1, 13)
|
||||
|
||||
#define DDR3_CLOCK_FREQUENCY (400)
|
||||
|
||||
#if defined(CONFIG_SPL_BUILD) || \
|
||||
(defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_DM_ETH))
|
||||
static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
|
||||
#endif
|
||||
|
||||
#define BD_EEPROM_ADDR (0x50) /* CPU BD EEPROM (8kByte) is at 50 (A0) */
|
||||
#define BD_ADDRESS (0x0000) /* Board descriptor at beginning of EEPROM */
|
||||
#define PD_ADDRESS (0x0200) /* Product descriptor */
|
||||
#define PARTITION_ADDRESS (0x0600) /* Partition Table */
|
||||
|
||||
static BD_Context bdctx[3]; /* The descriptor context */
|
||||
|
||||
static int _bd_init(void)
|
||||
{
|
||||
if (bd_get_context(&bdctx[0], BD_EEPROM_ADDR, BD_ADDRESS) != 0) {
|
||||
printf("%s() no valid bd found\n", __func__);
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (bd_get_context(&bdctx[1], BD_EEPROM_ADDR, PD_ADDRESS) != 0) {
|
||||
printf("%s() no valid pd found (legacy support)\n", __func__);
|
||||
}
|
||||
|
||||
if (bd_get_context(&bdctx[2], BD_EEPROM_ADDR, PARTITION_ADDRESS) != 0) {
|
||||
printf("%s() no valid partition table found\n", __func__);
|
||||
}
|
||||
|
||||
bd_register_context_list(bdctx, ARRAY_SIZE(bdctx));
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Read header information from EEPROM into global structure.
|
||||
*/
|
||||
static inline int __maybe_unused read_eeprom(void)
|
||||
{
|
||||
return _bd_init();
|
||||
}
|
||||
|
||||
struct serial_device *default_serial_console(void)
|
||||
{
|
||||
return &eserial1_device;
|
||||
}
|
||||
|
||||
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
|
||||
|
||||
static const struct ddr_data ddr3_netbird_data = {
|
||||
/* Ratios were optimized by DDR3 training software from TI */
|
||||
.datardsratio0 = 0x37,
|
||||
.datawdsratio0 = 0x42,
|
||||
.datafwsratio0 = 0x98,
|
||||
.datawrsratio0 = 0x7a,
|
||||
};
|
||||
|
||||
static const struct cmd_control ddr3_netbird_cmd_ctrl_data = {
|
||||
.cmd0csratio = MT41K256M16HA125E_RATIO,
|
||||
.cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
|
||||
|
||||
.cmd1csratio = MT41K256M16HA125E_RATIO,
|
||||
.cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
|
||||
|
||||
.cmd2csratio = MT41K256M16HA125E_RATIO,
|
||||
.cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
|
||||
};
|
||||
|
||||
static struct emif_regs ddr3_netbird_emif_reg_data = {
|
||||
.sdram_config = MT41K256M16HA125E_EMIF_SDCFG,
|
||||
.ref_ctrl = 0x61A, /* 32ms > 85°C */
|
||||
.sdram_tim1 = 0x0AAAE51B,
|
||||
.sdram_tim2 = 0x246B7FDA,
|
||||
.sdram_tim3 = 0x50FFE67F,
|
||||
.zq_config = MT41K256M16HA125E_ZQ_CFG,
|
||||
.emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY,
|
||||
};
|
||||
|
||||
|
||||
#ifdef CONFIG_SPL_OS_BOOT
|
||||
int spl_start_uboot(void)
|
||||
{
|
||||
/* break into full u-boot on 'c' */
|
||||
if (serial_tstc() && serial_getc() == 'c')
|
||||
return 1;
|
||||
|
||||
#ifdef CONFIG_SPL_ENV_SUPPORT
|
||||
env_init();
|
||||
env_relocate_spec();
|
||||
if (getenv_yesno("boot_os") != 1)
|
||||
return 1;
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#define OSC (V_OSCK/1000000)
|
||||
struct dpll_params dpll_ddr_nbhw16= {
|
||||
DDR3_CLOCK_FREQUENCY, OSC-1, 1, -1, -1, -1, -1};
|
||||
|
||||
void am33xx_spl_board_init(void)
|
||||
{
|
||||
/* Get the frequency */
|
||||
dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
|
||||
|
||||
/* Set CPU speed to 600 MHZ */
|
||||
dpll_mpu_opp100.m = MPUPLL_M_600;
|
||||
|
||||
/* Set CORE Frequencies to OPP100 */
|
||||
do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
|
||||
|
||||
/* Clear th PFM Flag on DCDC4 */
|
||||
if (tps65218_reg_write(TPS65218_PROT_LEVEL_2, TPS65218_DCDC4, 0x00, 0x80)) {
|
||||
puts ("tps65218_reg_write failure\n");
|
||||
};
|
||||
|
||||
/* Set MPU Frequency to what we detected now that voltages are set */
|
||||
do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100);
|
||||
|
||||
if (read_eeprom() < 0)
|
||||
puts("Could not get board ID.\n");
|
||||
}
|
||||
|
||||
const struct dpll_params *get_dpll_ddr_params(void)
|
||||
{
|
||||
dpll_ddr_nbhw16.n = (get_osclk() / 1000000) - 1;
|
||||
return &dpll_ddr_nbhw16;
|
||||
}
|
||||
|
||||
void set_uart_mux_conf(void)
|
||||
{
|
||||
enable_uart0_pin_mux();
|
||||
}
|
||||
|
||||
void set_mux_conf_regs(void)
|
||||
{
|
||||
enable_board_pin_mux();
|
||||
}
|
||||
|
||||
|
||||
const struct ctrl_ioregs ioregs_netbird = {
|
||||
.cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
|
||||
.cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
|
||||
.cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
|
||||
.dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
|
||||
.dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
|
||||
};
|
||||
|
||||
|
||||
void sdram_init(void)
|
||||
{
|
||||
config_ddr(DDR3_CLOCK_FREQUENCY, &ioregs_netbird,
|
||||
&ddr3_netbird_data,
|
||||
&ddr3_netbird_cmd_ctrl_data,
|
||||
&ddr3_netbird_emif_reg_data, 0);
|
||||
}
|
||||
|
||||
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
|
||||
|
||||
static void request_and_set_gpio(int gpio, char *name, int value)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = gpio_request(gpio, name);
|
||||
if (ret < 0) {
|
||||
printf("%s: Unable to request %s\n", __func__, name);
|
||||
return;
|
||||
}
|
||||
|
||||
ret = gpio_direction_output(gpio, 0);
|
||||
if (ret < 0) {
|
||||
printf("%s: Unable to set %s as output\n", __func__, name);
|
||||
goto err_free_gpio;
|
||||
}
|
||||
|
||||
gpio_set_value(gpio, value);
|
||||
|
||||
return;
|
||||
|
||||
err_free_gpio:
|
||||
gpio_free(gpio);
|
||||
}
|
||||
|
||||
#define REQUEST_AND_SET_GPIO(N) request_and_set_gpio(N, #N, 1);
|
||||
#define REQUEST_AND_CLEAR_GPIO(N) request_and_set_gpio(N, #N, 0);
|
||||
|
||||
|
||||
int check_reset_button(void)
|
||||
{
|
||||
int counter = 0;
|
||||
int ret;
|
||||
|
||||
ret = gpio_request(NETBIRD_GPIO_RESET_BUTTON, "reset button");
|
||||
if (ret < 0) {
|
||||
printf("Unable to request reset button gpio\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
ret = gpio_direction_input(NETBIRD_GPIO_RESET_BUTTON);
|
||||
if (ret < 0) {
|
||||
printf("Unable to set reset button as input\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* Check if reset button is pressed for at least 3 seconds */
|
||||
do {
|
||||
if (gpio_get_value(NETBIRD_GPIO_RESET_BUTTON) != 0) break;
|
||||
udelay(100000); /* 100ms */
|
||||
counter++;
|
||||
|
||||
if (counter==30) {/* Indicate factory reset threshold */
|
||||
/* let LED blink up once */
|
||||
gpio_set_value(NETBIRD_GPIO_LED_B, 1);
|
||||
udelay(400000); /* 400ms */
|
||||
gpio_set_value(NETBIRD_GPIO_LED_B, 0);
|
||||
} else if (counter==150) { /* Indicate recovery boot threshold */
|
||||
/* let LED blink up twice */
|
||||
gpio_set_value(NETBIRD_GPIO_LED_B, 1);
|
||||
udelay(400000); /* 400ms */
|
||||
gpio_set_value(NETBIRD_GPIO_LED_B, 0);
|
||||
udelay(400000); /* 400ms */
|
||||
gpio_set_value(NETBIRD_GPIO_LED_B, 1);
|
||||
udelay(400000); /* 400ms */
|
||||
gpio_set_value(NETBIRD_GPIO_LED_B, 0);
|
||||
}
|
||||
} while (counter<150);
|
||||
|
||||
if (counter < 30) return 0; /* Don't do anything for duration < 3s */
|
||||
|
||||
if (counter < 150) /* Do factory reset for duration between 3s and 15s */
|
||||
{
|
||||
char new_bootargs[512];
|
||||
char *bootargs = getenv("bootargs");
|
||||
|
||||
if (bootargs==0) bootargs="";
|
||||
|
||||
printf("Do factory reset during boot...\n");
|
||||
|
||||
strncpy(new_bootargs, bootargs, sizeof(new_bootargs));
|
||||
strncat(new_bootargs, " factory-reset", sizeof(new_bootargs));
|
||||
|
||||
setenv("bootargs", new_bootargs);
|
||||
|
||||
printf("bootargs = %s\n", new_bootargs);
|
||||
|
||||
return 1;
|
||||
} else { /* Boot into recovery for duration > 15s */
|
||||
|
||||
/* set consoledev to external port */
|
||||
setenv("consoledev", "ttyO0");
|
||||
|
||||
printf("Booting recovery image...\n");
|
||||
|
||||
/* Set bootcmd to run recovery */
|
||||
setenv("bootcmd", "run recovery");
|
||||
|
||||
return 0;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Basic board specific setup. Pinmux has been handled already.
|
||||
*/
|
||||
int board_init(void)
|
||||
{
|
||||
#if defined(CONFIG_HW_WATCHDOG)
|
||||
hw_watchdog_init();
|
||||
#endif
|
||||
|
||||
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
|
||||
#if defined(CONFIG_NOR) || defined(CONFIG_NAND)
|
||||
gpmc_init();
|
||||
#endif
|
||||
|
||||
REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_RST_GSM);
|
||||
udelay(10000);
|
||||
REQUEST_AND_SET_GPIO(NETBIRD_GPIO_PWR_GSM);
|
||||
mdelay(1200);
|
||||
gpio_set_value(NETBIRD_GPIO_PWR_GSM, 0);
|
||||
/* Enable debug LED to troubleshoot hw problems */
|
||||
REQUEST_AND_SET_GPIO(NETBIRD_GPIO_LED_A);
|
||||
REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_LED_B);
|
||||
REQUEST_AND_SET_GPIO(NETBIRD_GPIO_RST_PHY_N);
|
||||
REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_WLAN_EN);
|
||||
REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_BT_EN);
|
||||
/* There are two funcions on the same mux mode for MMC2_DAT7 we want
|
||||
* to use RMII2_CRS_DV so we need to set SMA2 Register to 1
|
||||
* See SPRS717J site 49 (10)*/
|
||||
#define SMA2_REGISTER (CTRL_BASE + 0x1320)
|
||||
writel(0x01, SMA2_REGISTER); /* Select RMII2_CRS_DV instead of MMC2_DAT7 */
|
||||
|
||||
printf("OSC: %lu Hz\n", get_osclk());
|
||||
|
||||
return 0;
|
||||
}
|
||||
#if !defined(CONFIG_SPL_BUILD)
|
||||
|
||||
static void set_devicetree_name(void)
|
||||
{
|
||||
char devicetreename[64];
|
||||
/* add hardware versions to environment */
|
||||
if (bd_get_devicetree(devicetreename, sizeof(devicetreename)) != 0) {
|
||||
printf("Devicetree name not found, use legacy name\n");
|
||||
strcpy(devicetreename, "am335x-nbhw16.dtb");
|
||||
}
|
||||
|
||||
setenv("fdt_image", devicetreename);
|
||||
}
|
||||
|
||||
static void get_hw_version(void)
|
||||
{
|
||||
int hw_ver, hw_rev;
|
||||
char hw_versions[16];
|
||||
char new_env[256];
|
||||
|
||||
/* add hardware versions to environment */
|
||||
bd_get_hw_version(&hw_ver, &hw_rev);
|
||||
printf("HW16: V%d.%d\n", hw_ver, hw_rev);
|
||||
snprintf(hw_versions, sizeof(hw_versions), "CP=%d.%d", hw_ver, hw_rev);
|
||||
snprintf(new_env, sizeof(new_env), "setenv bootargs $bootargs %s", hw_versions);
|
||||
setenv("add_version_bootargs", new_env);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BOARD_LATE_INIT
|
||||
int board_late_init(void)
|
||||
{
|
||||
#if !defined(CONFIG_SPL_BUILD)
|
||||
int boot_partition;
|
||||
|
||||
if (read_eeprom() < 0)
|
||||
puts("Could not get board ID.\n");
|
||||
|
||||
/* add active root partition to environment */
|
||||
boot_partition = bd_get_boot_partition();
|
||||
if (boot_partition > 1) {
|
||||
boot_partition = 0;
|
||||
}
|
||||
|
||||
/* mmcblk1p1 => root0, mmcblk1p2 => root1 so +1 */
|
||||
setenv_ulong("root_part", boot_partition + 1);
|
||||
|
||||
check_reset_button();
|
||||
|
||||
get_hw_version();
|
||||
|
||||
set_devicetree_name();
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
|
||||
int rc;
|
||||
char *name = NULL;
|
||||
|
||||
set_board_info_env(name);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_DM_ETH
|
||||
|
||||
#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
|
||||
(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
|
||||
static void cpsw_control(int enabled)
|
||||
{
|
||||
/* VTP can be added here */
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
static struct cpsw_slave_data cpsw_slaves[] = {
|
||||
{
|
||||
.slave_reg_ofs = 0x208,
|
||||
.sliver_reg_ofs = 0xd80,
|
||||
.phy_addr = 0,
|
||||
},
|
||||
{
|
||||
.slave_reg_ofs = 0x308,
|
||||
.sliver_reg_ofs = 0xdc0,
|
||||
.phy_addr = 1,
|
||||
},
|
||||
};
|
||||
|
||||
static struct cpsw_platform_data cpsw_data = {
|
||||
.mdio_base = CPSW_MDIO_BASE,
|
||||
.cpsw_base = CPSW_BASE,
|
||||
.mdio_div = 0xff,
|
||||
.channels = 8,
|
||||
.cpdma_reg_ofs = 0x800,
|
||||
.slaves = 1,
|
||||
.slave_data = cpsw_slaves,
|
||||
.ale_reg_ofs = 0xd00,
|
||||
.ale_entries = 1024,
|
||||
.host_port_reg_ofs = 0x108,
|
||||
.hw_stats_reg_ofs = 0x900,
|
||||
.bd_ram_ofs = 0x2000,
|
||||
.mac_control = (1 << 5),
|
||||
.control = cpsw_control,
|
||||
.host_port_num = 0,
|
||||
.version = CPSW_CTRL_VERSION_2,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if ((defined(CONFIG_SPL_ETH_SUPPORT) || defined(CONFIG_SPL_USBETH_SUPPORT)) &&\
|
||||
defined(CONFIG_SPL_BUILD)) || \
|
||||
((defined(CONFIG_DRIVER_TI_CPSW) || \
|
||||
defined(CONFIG_USB_ETHER) && defined(CONFIG_MUSB_GADGET)) && \
|
||||
!defined(CONFIG_SPL_BUILD))
|
||||
|
||||
static void set_mac_address(int index, uchar mac[6])
|
||||
{
|
||||
/* Then take mac from bd */
|
||||
if (is_valid_ethaddr(mac)) {
|
||||
eth_setenv_enetaddr_by_index("eth", index, mac);
|
||||
}
|
||||
else {
|
||||
printf("Trying to set invalid MAC address");
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* This function will:
|
||||
* Read the eFuse for MAC addresses, and set ethaddr/eth1addr/usbnet_devaddr
|
||||
* in the environment
|
||||
* Perform fixups to the PHY present on certain boards. We only need this
|
||||
* function in:
|
||||
* - SPL with either CPSW or USB ethernet support
|
||||
* - Full U-Boot, with either CPSW or USB ethernet
|
||||
* Build in only these cases to avoid warnings about unused variables
|
||||
* when we build an SPL that has neither option but full U-Boot will.
|
||||
*/
|
||||
int board_eth_init(bd_t *bis)
|
||||
{
|
||||
int rv, n = 0;
|
||||
uint8_t mac_addr0[6] = {02,00,00,00,00,01};
|
||||
uint8_t mac_addr1[6] = {02,00,00,00,00,02};
|
||||
__maybe_unused struct ti_am_eeprom *header;
|
||||
|
||||
#if !defined(CONFIG_SPL_BUILD)
|
||||
#ifdef CONFIG_DRIVER_TI_CPSW
|
||||
|
||||
cpsw_data.mdio_div = 0x3E;
|
||||
|
||||
bd_get_mac(0, mac_addr0, sizeof(mac_addr0));
|
||||
set_mac_address(0, mac_addr0);
|
||||
|
||||
bd_get_mac(1, mac_addr1, sizeof(mac_addr1));
|
||||
set_mac_address(1, mac_addr1);
|
||||
|
||||
writel(RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE, &cdev->miisel);
|
||||
cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RMII;
|
||||
cpsw_slaves[1].phy_if = PHY_INTERFACE_MODE_RMII;
|
||||
cpsw_slaves[0].phy_addr = 0;
|
||||
cpsw_slaves[1].phy_addr = 1;
|
||||
|
||||
rv = cpsw_register(&cpsw_data);
|
||||
if (rv < 0)
|
||||
printf("Error %d registering CPSW switch\n", rv);
|
||||
else
|
||||
n += rv;
|
||||
#endif
|
||||
|
||||
#endif
|
||||
#if defined(CONFIG_USB_ETHER) && \
|
||||
(!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_USBETH_SUPPORT))
|
||||
if (is_valid_ethaddr(mac_addr0))
|
||||
eth_setenv_enetaddr("usbnet_devaddr", mac_addr0);
|
||||
|
||||
rv = usb_eth_initialize(bis);
|
||||
if (rv < 0)
|
||||
printf("Error %d registering USB_ETHER\n", rv);
|
||||
else
|
||||
n += rv;
|
||||
#endif
|
||||
return n;
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_DM_ETH */
|
||||
|
||||
#ifdef CONFIG_SPL_LOAD_FIT
|
||||
int board_fit_config_name_match(const char *name)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
|
@ -1,27 +0,0 @@
|
|||
/*
|
||||
* board.h
|
||||
*
|
||||
* TI AM335x boards information header
|
||||
*
|
||||
* Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#ifndef _BOARD_H_
|
||||
#define _BOARD_H_
|
||||
/*
|
||||
* We have three pin mux functions that must exist. We must be able to enable
|
||||
* uart0, for initial output and i2c0 to read the main EEPROM. We then have a
|
||||
* main pinmux function that can be overridden to enable all other pinmux that
|
||||
* is required on the board.
|
||||
*/
|
||||
void enable_uart0_pin_mux(void);
|
||||
void enable_uart1_pin_mux(void);
|
||||
void enable_uart2_pin_mux(void);
|
||||
void enable_uart3_pin_mux(void);
|
||||
void enable_uart4_pin_mux(void);
|
||||
void enable_uart5_pin_mux(void);
|
||||
void enable_i2c0_pin_mux(void);
|
||||
void enable_board_pin_mux(void);
|
||||
#endif
|
||||
|
|
@ -1,227 +0,0 @@
|
|||
/*
|
||||
* mux.c
|
||||
*
|
||||
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation version 2.
|
||||
*
|
||||
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
|
||||
* kind, whether express or implied; without even the implied warranty
|
||||
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/arch/sys_proto.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/arch/mux.h>
|
||||
#include <asm/io.h>
|
||||
#include <i2c.h>
|
||||
#include "board.h"
|
||||
|
||||
static struct module_pin_mux uart2_pin_mux[] = {
|
||||
{OFFSET(spi0_sclk), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART2_RXD */
|
||||
{OFFSET(spi0_d0), (MODE(1) | PULLUDEN)}, /* UART2_TXD */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux uart3_pin_mux[] = {
|
||||
{OFFSET(spi0_cs1), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART3_RXD */
|
||||
{OFFSET(ecap0_in_pwm0_out), (MODE(1) | PULLUDEN)}, /* UART3_TXD */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux uart4_pin_mux[] = {
|
||||
{OFFSET(gpmc_wait0), (MODE(6) | PULLUP_EN | RXACTIVE)}, /* UART4_RXD */
|
||||
{OFFSET(gpmc_wpn), (MODE(6) | PULLUDEN)}, /* UART4_TXD */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux uart5_pin_mux[] = {
|
||||
{OFFSET(lcd_data9), (MODE(4) | PULLUP_EN | RXACTIVE)}, /* UART5_RXD */
|
||||
{OFFSET(lcd_data8), (MODE(4) | PULLUDEN)}, /* UART5_TXD */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux i2c0_pin_mux[] = {
|
||||
{OFFSET(i2c0_sda), (MODE(0) | RXACTIVE |
|
||||
PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* I2C_DATA */
|
||||
{OFFSET(i2c0_scl), (MODE(0) | RXACTIVE |
|
||||
PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* I2C_SCLK */
|
||||
{-1},
|
||||
};
|
||||
|
||||
|
||||
|
||||
static struct module_pin_mux uart0_netbird_pin_mux[] = {
|
||||
{OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */
|
||||
{OFFSET(uart0_txd), (MODE(0) | PULLUDEN | PULLUP_EN)}, /* UART0_TXD */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux uart1_netbird_pin_mux[] = {
|
||||
{OFFSET(uart1_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (D16) uart1_rxd.uart1_rxd */
|
||||
{OFFSET(uart1_txd), (MODE(0) | PULLUDEN | PULLUP_EN)}, /* (D15) uart1_txd.uart1_txd */
|
||||
{OFFSET(uart1_ctsn), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (D18) uart1_ctsn.uart1_ctsn */
|
||||
{OFFSET(uart1_rtsn), (MODE(0) | PULLUDEN | PULLUP_EN)}, /* (D17) uart1_rtsn.uart1_rtsn */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux rmii0_netbird_pin_mux[] = {
|
||||
{OFFSET(mii1_crs), MODE(1) | PULLUDDIS | RXACTIVE}, /* MII1_CRS */
|
||||
{OFFSET(mii1_rxerr), MODE(1) | PULLUDDIS | RXACTIVE}, /* MII1_RXERR */
|
||||
{OFFSET(mii1_txen), MODE(1) | PULLUDDIS }, /* MII1_TXEN */
|
||||
{OFFSET(mii1_txd0), MODE(1) | PULLUDDIS }, /* MII1_TXD0 */
|
||||
{OFFSET(mii1_txd1), MODE(1) | PULLUDDIS }, /* MII1_TXD1 */
|
||||
{OFFSET(mii1_rxd0), MODE(1) | PULLUDDIS | RXACTIVE }, /* MII1_RXD0 */
|
||||
{OFFSET(mii1_rxd1), MODE(1) | PULLUDDIS | RXACTIVE }, /* MII1_RXD1 */
|
||||
{OFFSET(rmii1_refclk), MODE(0) | PULLUDDIS | RXACTIVE}, /* RMII1_REFCLK */
|
||||
{OFFSET(mdio_clk), MODE(0) | PULLUDDIS }, /* MDIO_CLK */
|
||||
{OFFSET(mdio_data), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE }, /* MDIO_DATA */
|
||||
{OFFSET(xdma_event_intr0), MODE(3) }, /* CLK_OUT1 for MDIO (design option) */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux rmii1_netbird_pin_mux[] = {
|
||||
{OFFSET(gpmc_a9), MODE(3) | PULLUDDIS | RXACTIVE}, /* MII2_CRS */
|
||||
{OFFSET(gpmc_wpn), MODE(3) | PULLUDDIS | RXACTIVE}, /* MII2_RXERR */
|
||||
{OFFSET(gpmc_a0), MODE(3) | PULLUDDIS}, /* MII2_TXEN */
|
||||
{OFFSET(gpmc_a5), MODE(3) | PULLUDDIS}, /* MII2_TXD0 */
|
||||
{OFFSET(gpmc_a4), MODE(3) | PULLUDDIS}, /* MII2_TXD1 */
|
||||
{OFFSET(gpmc_a11), MODE(3) | PULLUDDIS | RXACTIVE}, /* MII1_RXD0 */
|
||||
{OFFSET(gpmc_a10), MODE(3) | PULLUDDIS | RXACTIVE}, /* MII1_RXD1 */
|
||||
{OFFSET(mii1_col), MODE(1) | PULLUDDIS | RXACTIVE}, /* RMII1_REFCLK */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux mmc0_sdio_netbird_pin_mux[] = {
|
||||
{OFFSET(mmc0_clk), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* MMC0_CLK */
|
||||
{OFFSET(mmc0_cmd), (MODE(0) | PULLUDEN | PULLUP_EN)}, /* MMC0_CMD */
|
||||
{OFFSET(mmc0_dat0), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC0_DAT0 */
|
||||
{OFFSET(mmc0_dat1), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC0_DAT1 */
|
||||
{OFFSET(mmc0_dat2), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC0_DAT2 */
|
||||
{OFFSET(mmc0_dat3), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC0_DAT3 */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux mmc1_emmc_netbird_pin_mux[] = {
|
||||
{OFFSET(gpmc_csn1), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* MMC1_CLK */
|
||||
{OFFSET(gpmc_csn2), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* MMC1_CMD */
|
||||
{OFFSET(gpmc_ad0), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT0 */
|
||||
{OFFSET(gpmc_ad1), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT1 */
|
||||
{OFFSET(gpmc_ad2), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT2 */
|
||||
{OFFSET(gpmc_ad3), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT3 */
|
||||
{OFFSET(gpmc_ad4), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT3 */
|
||||
{OFFSET(gpmc_ad5), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT3 */
|
||||
{OFFSET(gpmc_ad6), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT3 */
|
||||
{OFFSET(gpmc_ad7), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT3 */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux gpio_netbird_pin_mux[] = {
|
||||
/* Bank 0 */
|
||||
{OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (C18) eCAP0_in_PWM0_out.gpio0[7] */ /* PWM */
|
||||
{OFFSET(mii1_txd3), (MODE(7) | PULLUDDIS)}, /* (J18) gmii1_txd3.gpio0[16] */ /* RST_PHY~ */
|
||||
{OFFSET(gpmc_ad11), (MODE(7) | PULLUDDIS)}, /* (U12) gpmc_ad11.gpio0[27] */ /* RST_EXT~ */
|
||||
/* Bank 1 */
|
||||
{OFFSET(gpmc_ad13), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (R12) gpmc_ad13.gpio1[13] */ /* BUTTON */
|
||||
{OFFSET(gpmc_ad14), (MODE(7) | PULLUDDIS)}, /* (V13) gpmc_ad14.gpio1[14] */ /* LED_A */
|
||||
{OFFSET(gpmc_ad15), (MODE(7) | PULLUDDIS)}, /* (U13) gpmc_ad15.gpio1[15] */ /* LED_B */
|
||||
{OFFSET(gpmc_a6), (MODE(7) | PULLUDDIS)}, /* (U15) gpmc_a6.gpio1[22] */ /* GSM_PWR_EN */
|
||||
{OFFSET(gpmc_a8), (MODE(7) | PULLUDDIS)}, /* (V16) gpmc_a8.gpio1[24] */ /* RST_GSM~ */
|
||||
/* Bank 2 */
|
||||
{OFFSET(lcd_pclk), (MODE(7) | PULLUDDIS)}, /* (V5) lcd_pclk.gpio2[24] */ /* EN_GPS_ANT */
|
||||
{OFFSET(lcd_data3), (MODE(7) | PULLUDEN| PULLUP_EN)}, /* (V5) lcd_pclk.gpio2[9] */ /* SYSBOOT */
|
||||
{OFFSET(lcd_data4), (MODE(7) | PULLUDEN| PULLUP_EN)}, /* (V5) lcd_pclk.gpio2[10] */ /* SYSBOOT */
|
||||
/* Bank 3 */
|
||||
{OFFSET(mii1_rxdv), (MODE(7) | PULLUDDIS)}, /* (J17) gmii1_rxdv.gpio3[4] */ /* BT_EN */
|
||||
{OFFSET(mii1_rxdv), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (K18) gmii1_txclk.gpio3[9] */ /* WLAN_IRQ */
|
||||
{OFFSET(mii1_rxdv), (MODE(7) | PULLUDDIS)}, /* (L18) gmii1_rxclk.gpio3[10] */ /* WLAN_EN */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux usb_netbird_pin_mux[] = {
|
||||
{OFFSET(usb0_drvvbus), (MODE(0) | PULLUDEN | PULLDOWN_EN)}, /* (F16) USB0_DRVVBUS.USB0_DRVVBUS */ /* PWM */
|
||||
{OFFSET(usb1_drvvbus), (MODE(0) | PULLUDDIS | PULLDOWN_EN)}, /* (F15) USB1_DRVVBUS.USB1_DRVVBUS */ /* RST_PHY~ */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux unused_netbird_pin_mux[] = {
|
||||
{OFFSET(lcd_data6), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* SYSBOOT6 is not used bulldown active, receiver disabled */
|
||||
{OFFSET(lcd_data7), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* SYSBOOT7 is not used bulldown active, receiver disabled */
|
||||
{OFFSET(lcd_data10), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* SYSBOOT10 is not used bulldown active, receiver disabled */
|
||||
{OFFSET(lcd_data11), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* SYSBOOT11 is not used bulldown active, receiver disabled */
|
||||
{-1},
|
||||
};
|
||||
|
||||
void enable_uart0_pin_mux(void)
|
||||
{
|
||||
configure_module_pin_mux(uart0_netbird_pin_mux);
|
||||
}
|
||||
|
||||
void enable_uart1_pin_mux(void)
|
||||
{
|
||||
configure_module_pin_mux(uart1_netbird_pin_mux);
|
||||
}
|
||||
|
||||
void enable_uart2_pin_mux(void)
|
||||
{
|
||||
configure_module_pin_mux(uart2_pin_mux);
|
||||
}
|
||||
|
||||
void enable_uart3_pin_mux(void)
|
||||
{
|
||||
configure_module_pin_mux(uart3_pin_mux);
|
||||
}
|
||||
|
||||
void enable_uart4_pin_mux(void)
|
||||
{
|
||||
configure_module_pin_mux(uart4_pin_mux);
|
||||
}
|
||||
|
||||
void enable_uart5_pin_mux(void)
|
||||
{
|
||||
configure_module_pin_mux(uart5_pin_mux);
|
||||
}
|
||||
|
||||
void enable_i2c0_pin_mux(void)
|
||||
{
|
||||
configure_module_pin_mux(i2c0_pin_mux);
|
||||
}
|
||||
|
||||
/*
|
||||
* The AM335x GP EVM, if daughter card(s) are connected, can have 8
|
||||
* different profiles. These profiles determine what peripherals are
|
||||
* valid and need pinmux to be configured.
|
||||
*/
|
||||
#define PROFILE_NONE 0x0
|
||||
#define PROFILE_0 (1 << 0)
|
||||
#define PROFILE_1 (1 << 1)
|
||||
#define PROFILE_2 (1 << 2)
|
||||
#define PROFILE_3 (1 << 3)
|
||||
#define PROFILE_4 (1 << 4)
|
||||
#define PROFILE_5 (1 << 5)
|
||||
#define PROFILE_6 (1 << 6)
|
||||
#define PROFILE_7 (1 << 7)
|
||||
#define PROFILE_MASK 0x7
|
||||
#define PROFILE_ALL 0xFF
|
||||
|
||||
/* CPLD registers */
|
||||
#define I2C_CPLD_ADDR 0x35
|
||||
#define CFG_REG 0x10
|
||||
|
||||
void enable_board_pin_mux(void)
|
||||
{
|
||||
/* Netbird board */
|
||||
configure_module_pin_mux(gpio_netbird_pin_mux);
|
||||
configure_module_pin_mux(rmii0_netbird_pin_mux);
|
||||
configure_module_pin_mux(rmii1_netbird_pin_mux);
|
||||
configure_module_pin_mux(mmc0_sdio_netbird_pin_mux);
|
||||
configure_module_pin_mux(mmc1_emmc_netbird_pin_mux);
|
||||
configure_module_pin_mux(usb_netbird_pin_mux);
|
||||
configure_module_pin_mux(usb_netbird_pin_mux);
|
||||
configure_module_pin_mux(i2c0_pin_mux);
|
||||
configure_module_pin_mux(unused_netbird_pin_mux);
|
||||
}
|
||||
|
|
@ -1,13 +0,0 @@
|
|||
#
|
||||
# Makefile
|
||||
#
|
||||
# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
|
||||
obj-y := mux.o
|
||||
endif
|
||||
|
||||
obj-y += board.o ../common/bdparser.o ../common/board_descriptor.o shield.o shield_can.o shield_comio.o fileaccess.o
|
||||
|
|
@ -1,158 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2004-2008 Texas Instruments
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(_start)
|
||||
SECTIONS
|
||||
{
|
||||
. = 0x00000000;
|
||||
|
||||
. = ALIGN(4);
|
||||
.text :
|
||||
{
|
||||
*(.__image_copy_start)
|
||||
*(.vectors)
|
||||
CPUDIR/start.o (.text*)
|
||||
board/nm/netbird_v2/built-in.o (.text*)
|
||||
*(.text*)
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
|
||||
|
||||
. = ALIGN(4);
|
||||
.data : {
|
||||
*(.data*)
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
. = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
.u_boot_list : {
|
||||
KEEP(*(SORT(.u_boot_list*)));
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
.__efi_runtime_start : {
|
||||
*(.__efi_runtime_start)
|
||||
}
|
||||
|
||||
.efi_runtime : {
|
||||
*(efi_runtime_text)
|
||||
*(efi_runtime_data)
|
||||
}
|
||||
|
||||
.__efi_runtime_stop : {
|
||||
*(.__efi_runtime_stop)
|
||||
}
|
||||
|
||||
.efi_runtime_rel_start :
|
||||
{
|
||||
*(.__efi_runtime_rel_start)
|
||||
}
|
||||
|
||||
.efi_runtime_rel : {
|
||||
*(.relefi_runtime_text)
|
||||
*(.relefi_runtime_data)
|
||||
}
|
||||
|
||||
.efi_runtime_rel_stop :
|
||||
{
|
||||
*(.__efi_runtime_rel_stop)
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
.image_copy_end :
|
||||
{
|
||||
*(.__image_copy_end)
|
||||
}
|
||||
|
||||
.rel_dyn_start :
|
||||
{
|
||||
*(.__rel_dyn_start)
|
||||
}
|
||||
|
||||
.rel.dyn : {
|
||||
*(.rel*)
|
||||
}
|
||||
|
||||
.rel_dyn_end :
|
||||
{
|
||||
*(.__rel_dyn_end)
|
||||
}
|
||||
|
||||
.hash : { *(.hash*) }
|
||||
|
||||
.end :
|
||||
{
|
||||
*(.__end)
|
||||
}
|
||||
|
||||
_image_binary_end = .;
|
||||
|
||||
/*
|
||||
* Deprecated: this MMU section is used by pxa at present but
|
||||
* should not be used by new boards/CPUs.
|
||||
*/
|
||||
. = ALIGN(4096);
|
||||
.mmutable : {
|
||||
*(.mmutable)
|
||||
}
|
||||
|
||||
/*
|
||||
* Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
|
||||
* __bss_base and __bss_limit are for linker only (overlay ordering)
|
||||
*/
|
||||
|
||||
.bss_start __rel_dyn_start (OVERLAY) : {
|
||||
KEEP(*(.__bss_start));
|
||||
__bss_base = .;
|
||||
}
|
||||
|
||||
.bss __bss_base (OVERLAY) : {
|
||||
*(.bss*)
|
||||
. = ALIGN(4);
|
||||
__bss_limit = .;
|
||||
}
|
||||
|
||||
.bss_end __bss_limit (OVERLAY) : {
|
||||
KEEP(*(.__bss_end));
|
||||
}
|
||||
|
||||
.dynsym _image_binary_end : { *(.dynsym) }
|
||||
.dynbss : { *(.dynbss) }
|
||||
.dynstr : { *(.dynstr*) }
|
||||
.dynamic : { *(.dynamic*) }
|
||||
.gnu.hash : { *(.gnu.hash) }
|
||||
.plt : { *(.plt*) }
|
||||
.interp : { *(.interp*) }
|
||||
.gnu : { *(.gnu*) }
|
||||
.ARM.exidx : { *(.ARM.exidx*) }
|
||||
}
|
||||
|
|
@ -1,5 +1,5 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_TARGET_AM335X_NETBIRD=y
|
||||
CONFIG_TARGET_AM335X_NBHW16=y
|
||||
CONFIG_SPL_STACK_R_ADDR=0x82000000
|
||||
CONFIG_SPL=y
|
||||
CONFIG_SPL_STACK_R=y
|
||||
|
|
@ -14,12 +14,8 @@ CONFIG_CMD_BOOTZ=y
|
|||
CONFIG_CMD_ASKENV=y
|
||||
# CONFIG_CMD_FLASH is not set
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_SF=y
|
||||
CONFIG_CMD_SPI=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_DFU=y
|
||||
CONFIG_CMD_GPIO=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
|
|
@ -30,8 +26,6 @@ CONFIG_CMD_EXT4_WRITE=y
|
|||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_FS_GENERIC=y
|
||||
CONFIG_DFU_TFTP=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_MUSB_HOST=y
|
||||
|
|
@ -42,3 +36,14 @@ CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
|
|||
CONFIG_G_DNL_VENDOR_NUM=0x0451
|
||||
CONFIG_G_DNL_PRODUCT_NUM=0xd022
|
||||
CONFIG_OF_LIBFDT=y
|
||||
# CONFIG_BOOTP_PXE_CLIENTARCH is not set
|
||||
# CONFIG_CMD_PXE is not set
|
||||
# CONFIG_CMD_BOOTEFI is not set
|
||||
# CONFIG_CMD_XIMG is not set
|
||||
# CONFIG_CMD_ELF is not set
|
||||
# CONFIG_FPGA is not set
|
||||
# CONFIG_CMD_FPGA is not set
|
||||
# CONFIG_CMD_PMIC is not set
|
||||
# CONFIG_EFI_LOADER is not set
|
||||
# CONFIG_CMD_LOADB is not set
|
||||
# CONFIG_CMD_LOADS is not set
|
||||
|
|
|
|||
|
|
@ -1,631 +0,0 @@
|
|||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
# U-Boot 2016.05 Configuration
|
||||
#
|
||||
CONFIG_CREATE_ARCH_SYMLINK=y
|
||||
# CONFIG_ARC is not set
|
||||
CONFIG_ARM=y
|
||||
# CONFIG_AVR32 is not set
|
||||
# CONFIG_BLACKFIN is not set
|
||||
# CONFIG_M68K is not set
|
||||
# CONFIG_MICROBLAZE is not set
|
||||
# CONFIG_MIPS is not set
|
||||
# CONFIG_NDS32 is not set
|
||||
# CONFIG_NIOS2 is not set
|
||||
# CONFIG_OPENRISC is not set
|
||||
# CONFIG_PPC is not set
|
||||
# CONFIG_SANDBOX is not set
|
||||
# CONFIG_SH is not set
|
||||
# CONFIG_SPARC is not set
|
||||
# CONFIG_X86 is not set
|
||||
CONFIG_SYS_ARCH="arm"
|
||||
CONFIG_SYS_CPU="armv7"
|
||||
CONFIG_SYS_SOC="am33xx"
|
||||
CONFIG_SYS_VENDOR="nm"
|
||||
CONFIG_SYS_BOARD="netbird_v2"
|
||||
CONFIG_SYS_CONFIG_NAME="am335x_netbird_v2"
|
||||
|
||||
#
|
||||
# ARM architecture
|
||||
#
|
||||
CONFIG_HAS_VBAR=y
|
||||
CONFIG_HAS_THUMB2=y
|
||||
CONFIG_CPU_V7=y
|
||||
# CONFIG_SEMIHOSTING is not set
|
||||
# CONFIG_SYS_L2CACHE_OFF is not set
|
||||
# CONFIG_ARCH_AT91 is not set
|
||||
# CONFIG_TARGET_EDB93XX is not set
|
||||
# CONFIG_TARGET_VCMA9 is not set
|
||||
# CONFIG_TARGET_SMDK2410 is not set
|
||||
# CONFIG_TARGET_ASPENITE is not set
|
||||
# CONFIG_TARGET_GPLUGD is not set
|
||||
# CONFIG_ARCH_DAVINCI is not set
|
||||
# CONFIG_KIRKWOOD is not set
|
||||
# CONFIG_ARCH_MVEBU is not set
|
||||
# CONFIG_TARGET_DEVKIT3250 is not set
|
||||
# CONFIG_TARGET_WORK_92105 is not set
|
||||
# CONFIG_TARGET_MX25PDK is not set
|
||||
# CONFIG_TARGET_ZMX25 is not set
|
||||
# CONFIG_TARGET_APF27 is not set
|
||||
# CONFIG_TARGET_APX4DEVKIT is not set
|
||||
# CONFIG_TARGET_XFI3 is not set
|
||||
# CONFIG_TARGET_M28EVK is not set
|
||||
# CONFIG_TARGET_MX23EVK is not set
|
||||
# CONFIG_TARGET_MX28EVK is not set
|
||||
# CONFIG_TARGET_MX23_OLINUXINO is not set
|
||||
# CONFIG_TARGET_BG0900 is not set
|
||||
# CONFIG_TARGET_SANSA_FUZE_PLUS is not set
|
||||
# CONFIG_TARGET_SC_SPS_1 is not set
|
||||
# CONFIG_ORION5X is not set
|
||||
# CONFIG_TARGET_SPEAR300 is not set
|
||||
# CONFIG_TARGET_SPEAR310 is not set
|
||||
# CONFIG_TARGET_SPEAR320 is not set
|
||||
# CONFIG_TARGET_SPEAR600 is not set
|
||||
# CONFIG_TARGET_STV0991 is not set
|
||||
# CONFIG_TARGET_X600 is not set
|
||||
# CONFIG_TARGET_IMX31_PHYCORE is not set
|
||||
# CONFIG_TARGET_MX31ADS is not set
|
||||
# CONFIG_TARGET_MX31PDK is not set
|
||||
# CONFIG_TARGET_WOODBURN is not set
|
||||
# CONFIG_TARGET_WOODBURN_SD is not set
|
||||
# CONFIG_TARGET_FLEA3 is not set
|
||||
# CONFIG_TARGET_MX35PDK is not set
|
||||
# CONFIG_ARCH_BCM283X is not set
|
||||
# CONFIG_TARGET_VEXPRESS_CA15_TC2 is not set
|
||||
# CONFIG_TARGET_VEXPRESS_CA5X2 is not set
|
||||
# CONFIG_TARGET_VEXPRESS_CA9X4 is not set
|
||||
# CONFIG_TARGET_KWB is not set
|
||||
# CONFIG_TARGET_TSERIES is not set
|
||||
# CONFIG_TARGET_CM_T335 is not set
|
||||
# CONFIG_TARGET_PEPPER is not set
|
||||
# CONFIG_TARGET_AM335X_IGEP0033 is not set
|
||||
# CONFIG_TARGET_PCM051 is not set
|
||||
# CONFIG_TARGET_DRACO is not set
|
||||
# CONFIG_TARGET_THUBAN is not set
|
||||
# CONFIG_TARGET_RASTABAN is not set
|
||||
# CONFIG_TARGET_PXM2 is not set
|
||||
# CONFIG_TARGET_RUT is not set
|
||||
# CONFIG_TARGET_PENGWYN is not set
|
||||
# CONFIG_TARGET_AM335X_BALTOS is not set
|
||||
# CONFIG_TARGET_AM335X_EVM is not set
|
||||
# CONFIG_TARGET_AM335X_NETBIRD is not set
|
||||
CONFIG_TARGET_AM335X_NETBIRD_V2=y
|
||||
# CONFIG_TARGET_AM335X_SL50 is not set
|
||||
# CONFIG_TARGET_BAV335X is not set
|
||||
# CONFIG_TARGET_TI814X_EVM is not set
|
||||
# CONFIG_TARGET_TI816X_EVM is not set
|
||||
# CONFIG_TARGET_BCM28155_AP is not set
|
||||
# CONFIG_TARGET_BCMCYGNUS is not set
|
||||
# CONFIG_TARGET_BCMNSP is not set
|
||||
# CONFIG_ARCH_EXYNOS is not set
|
||||
# CONFIG_ARCH_S5PC1XX is not set
|
||||
# CONFIG_ARCH_HIGHBANK is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_KEYSTONE is not set
|
||||
# CONFIG_ARCH_MESON is not set
|
||||
# CONFIG_ARCH_MX7 is not set
|
||||
# CONFIG_ARCH_MX6 is not set
|
||||
# CONFIG_ARCH_MX5 is not set
|
||||
# CONFIG_TARGET_M53EVK is not set
|
||||
# CONFIG_TARGET_MX51EVK is not set
|
||||
# CONFIG_TARGET_MX53ARD is not set
|
||||
# CONFIG_TARGET_MX53EVK is not set
|
||||
# CONFIG_TARGET_MX53LOCO is not set
|
||||
# CONFIG_TARGET_MX53SMD is not set
|
||||
# CONFIG_OMAP34XX is not set
|
||||
# CONFIG_OMAP44XX is not set
|
||||
# CONFIG_OMAP54XX is not set
|
||||
# CONFIG_AM43XX is not set
|
||||
# CONFIG_RMOBILE is not set
|
||||
# CONFIG_ARCH_SNAPDRAGON is not set
|
||||
# CONFIG_ARCH_SOCFPGA is not set
|
||||
# CONFIG_TARGET_CM_T43 is not set
|
||||
# CONFIG_ARCH_SUNXI is not set
|
||||
# CONFIG_TARGET_TS4800 is not set
|
||||
# CONFIG_TARGET_VF610TWR is not set
|
||||
# CONFIG_TARGET_COLIBRI_VF is not set
|
||||
# CONFIG_TARGET_PCM052 is not set
|
||||
# CONFIG_ARCH_ZYNQ is not set
|
||||
# CONFIG_ARCH_ZYNQMP is not set
|
||||
# CONFIG_TEGRA is not set
|
||||
# CONFIG_TARGET_VEXPRESS64_AEMV8A is not set
|
||||
# CONFIG_TARGET_VEXPRESS64_BASE_FVP is not set
|
||||
# CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM is not set
|
||||
# CONFIG_TARGET_VEXPRESS64_JUNO is not set
|
||||
# CONFIG_TARGET_LS2080A_EMU is not set
|
||||
# CONFIG_TARGET_LS2080A_SIMU is not set
|
||||
# CONFIG_TARGET_LS2080AQDS is not set
|
||||
# CONFIG_TARGET_LS2080ARDB is not set
|
||||
# CONFIG_TARGET_HIKEY is not set
|
||||
# CONFIG_TARGET_LS1021AQDS is not set
|
||||
# CONFIG_TARGET_LS1021ATWR is not set
|
||||
# CONFIG_TARGET_LS1043AQDS is not set
|
||||
# CONFIG_TARGET_LS1043ARDB is not set
|
||||
# CONFIG_TARGET_H2200 is not set
|
||||
# CONFIG_TARGET_ZIPITZ2 is not set
|
||||
# CONFIG_TARGET_COLIBRI_PXA270 is not set
|
||||
# CONFIG_ARCH_UNIPHIER is not set
|
||||
# CONFIG_STM32 is not set
|
||||
# CONFIG_ARCH_ROCKCHIP is not set
|
||||
# CONFIG_TARGET_THUNDERX_88XX is not set
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x400
|
||||
CONFIG_CONS_INDEX=2
|
||||
CONFIG_SYS_MALLOC_F=y
|
||||
# CONFIG_SPL_SYS_MALLOC_SIMPLE is not set
|
||||
# CONFIG_SPL_DM is not set
|
||||
CONFIG_DM_SERIAL=y
|
||||
# CONFIG_DM_SPI is not set
|
||||
# CONFIG_DM_I2C is not set
|
||||
CONFIG_DM_GPIO=y
|
||||
# CONFIG_BLK is not set
|
||||
# CONFIG_ARMV7_LPAE is not set
|
||||
CONFIG_SPL_STACK_R_ADDR=0x82000000
|
||||
|
||||
#
|
||||
# ARM debug
|
||||
#
|
||||
# CONFIG_DEBUG_LL is not set
|
||||
# CONFIG_DM_KEYBOARD is not set
|
||||
# CONFIG_AHCI is not set
|
||||
|
||||
#
|
||||
# General setup
|
||||
#
|
||||
CONFIG_LOCALVERSION=""
|
||||
CONFIG_LOCALVERSION_AUTO=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
CONFIG_EXPERT=y
|
||||
CONFIG_SYS_MALLOC_CLEAR_ON_INIT=y
|
||||
|
||||
#
|
||||
# Boot images
|
||||
#
|
||||
CONFIG_SUPPORT_SPL=y
|
||||
CONFIG_SPL=y
|
||||
CONFIG_SPL_STACK_R=y
|
||||
# CONFIG_SPL_SEPARATE_BSS is not set
|
||||
CONFIG_FIT=y
|
||||
# CONFIG_FIT_VERBOSE is not set
|
||||
# CONFIG_FIT_SIGNATURE is not set
|
||||
# CONFIG_FIT_BEST_MATCH is not set
|
||||
# CONFIG_OF_BOARD_SETUP is not set
|
||||
# CONFIG_OF_SYSTEM_SETUP is not set
|
||||
# CONFIG_OF_STDOUT_VIA_ALIAS is not set
|
||||
CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT"
|
||||
# CONFIG_SPL_LOAD_FIT is not set
|
||||
|
||||
#
|
||||
# Boot timing
|
||||
#
|
||||
# CONFIG_BOOTSTAGE is not set
|
||||
CONFIG_BOOTSTAGE_USER_COUNT=20
|
||||
CONFIG_BOOTSTAGE_STASH_ADDR=0
|
||||
CONFIG_BOOTSTAGE_STASH_SIZE=4096
|
||||
# CONFIG_CONSOLE_RECORD is not set
|
||||
|
||||
#
|
||||
# Command line interface
|
||||
#
|
||||
CONFIG_CMDLINE=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_SYS_HUSH_PARSER=y
|
||||
CONFIG_SYS_PROMPT="=> "
|
||||
|
||||
#
|
||||
# Autoboot options
|
||||
#
|
||||
CONFIG_AUTOBOOT_KEYED=y
|
||||
CONFIG_AUTOBOOT_PROMPT="Press s to abort autoboot in %d seconds\n"
|
||||
# CONFIG_AUTOBOOT_ENCRYPTION is not set
|
||||
CONFIG_AUTOBOOT_DELAY_STR=""
|
||||
CONFIG_AUTOBOOT_STOP_STR="s"
|
||||
# CONFIG_AUTOBOOT_KEYED_CTRLC is not set
|
||||
|
||||
#
|
||||
# Commands
|
||||
#
|
||||
|
||||
#
|
||||
# Info commands
|
||||
#
|
||||
CONFIG_CMD_BDI=y
|
||||
CONFIG_CMD_CONSOLE=y
|
||||
# CONFIG_CMD_CPU is not set
|
||||
# CONFIG_CMD_LICENSE is not set
|
||||
|
||||
#
|
||||
# Boot commands
|
||||
#
|
||||
CONFIG_CMD_BOOTD=y
|
||||
CONFIG_CMD_BOOTM=y
|
||||
CONFIG_CMD_BOOTZ=y
|
||||
# CONFIG_CMD_ELF is not set
|
||||
CONFIG_CMD_FDT=y
|
||||
CONFIG_CMD_GO=y
|
||||
CONFIG_CMD_RUN=y
|
||||
CONFIG_CMD_IMI=y
|
||||
# CONFIG_CMD_IMLS is not set
|
||||
# CONFIG_CMD_XIMG is not set
|
||||
|
||||
#
|
||||
# Environment commands
|
||||
#
|
||||
CONFIG_CMD_ASKENV=y
|
||||
CONFIG_CMD_EXPORTENV=y
|
||||
CONFIG_CMD_IMPORTENV=y
|
||||
CONFIG_CMD_EDITENV=y
|
||||
# CONFIG_CMD_GREPENV is not set
|
||||
CONFIG_CMD_SAVEENV=y
|
||||
CONFIG_CMD_ENV_EXISTS=y
|
||||
|
||||
#
|
||||
# Memory commands
|
||||
#
|
||||
CONFIG_CMD_MEMORY=y
|
||||
CONFIG_CMD_CRC32=y
|
||||
# CONFIG_LOOPW is not set
|
||||
# CONFIG_CMD_MEMTEST is not set
|
||||
# CONFIG_CMD_MX_CYCLIC is not set
|
||||
# CONFIG_CMD_MEMINFO is not set
|
||||
|
||||
#
|
||||
# Device access commands
|
||||
#
|
||||
CONFIG_CMD_DM=y
|
||||
# CONFIG_CMD_DEMO is not set
|
||||
# CONFIG_CMD_LOADB is not set
|
||||
# CONFIG_CMD_LOADS is not set
|
||||
# CONFIG_CMD_FLASH is not set
|
||||
# CONFIG_CMD_ARMFLASH is not set
|
||||
CONFIG_CMD_MMC=y
|
||||
# CONFIG_CMD_NAND is not set
|
||||
# CONFIG_CMD_SF is not set
|
||||
# CONFIG_CMD_SPI is not set
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_DFU is not set
|
||||
# CONFIG_CMD_USB_MASS_STORAGE is not set
|
||||
# CONFIG_CMD_FPGA is not set
|
||||
# CONFIG_CMD_GPIO is not set
|
||||
|
||||
#
|
||||
# Shell scripting commands
|
||||
#
|
||||
CONFIG_CMD_ECHO=y
|
||||
CONFIG_CMD_ITEST=y
|
||||
CONFIG_CMD_SOURCE=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
|
||||
#
|
||||
# Network commands
|
||||
#
|
||||
CONFIG_CMD_NET=y
|
||||
# CONFIG_CMD_TFTPPUT is not set
|
||||
# CONFIG_CMD_TFTPSRV is not set
|
||||
# CONFIG_CMD_RARP is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_NFS=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
# CONFIG_CMD_CDP is not set
|
||||
# CONFIG_CMD_SNTP is not set
|
||||
# CONFIG_CMD_DNS is not set
|
||||
# CONFIG_CMD_LINK_LOCAL is not set
|
||||
|
||||
#
|
||||
# Misc commands
|
||||
#
|
||||
# CONFIG_CMD_CACHE is not set
|
||||
# CONFIG_CMD_TIME is not set
|
||||
CONFIG_CMD_MISC=y
|
||||
# CONFIG_CMD_TIMER is not set
|
||||
# CONFIG_CMD_QFW is not set
|
||||
|
||||
#
|
||||
# Power commands
|
||||
#
|
||||
|
||||
#
|
||||
# Security commands
|
||||
#
|
||||
|
||||
#
|
||||
# Filesystem commands
|
||||
#
|
||||
CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_EXT4=y
|
||||
CONFIG_CMD_EXT4_WRITE=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_FS_GENERIC=y
|
||||
CONFIG_SUPPORT_OF_CONTROL=y
|
||||
|
||||
#
|
||||
# Device Tree Control
|
||||
#
|
||||
# CONFIG_OF_CONTROL is not set
|
||||
CONFIG_NET=y
|
||||
# CONFIG_NET_RANDOM_ETHADDR is not set
|
||||
# CONFIG_NETCONSOLE is not set
|
||||
CONFIG_NET_TFTP_VARS=y
|
||||
CONFIG_BOOTP_PXE_CLIENTARCH=0x15
|
||||
CONFIG_BOOTP_VCI_STRING="U-Boot.armv7"
|
||||
|
||||
#
|
||||
# Device Drivers
|
||||
#
|
||||
|
||||
#
|
||||
# Generic Driver Options
|
||||
#
|
||||
CONFIG_DM=y
|
||||
CONFIG_DM_WARN=y
|
||||
CONFIG_DM_DEVICE_REMOVE=y
|
||||
CONFIG_DM_STDIO=y
|
||||
CONFIG_DM_SEQ_ALIAS=y
|
||||
# CONFIG_SPL_DM_SEQ_ALIAS is not set
|
||||
# CONFIG_REGMAP is not set
|
||||
# CONFIG_SPL_REGMAP is not set
|
||||
# CONFIG_DEVRES is not set
|
||||
# CONFIG_ADC is not set
|
||||
# CONFIG_ADC_EXYNOS is not set
|
||||
# CONFIG_ADC_SANDBOX is not set
|
||||
# CONFIG_BLOCK_CACHE is not set
|
||||
|
||||
#
|
||||
# Clock
|
||||
#
|
||||
# CONFIG_CLK is not set
|
||||
# CONFIG_CPU is not set
|
||||
|
||||
#
|
||||
# Hardware crypto devices
|
||||
#
|
||||
# CONFIG_FSL_CAAM is not set
|
||||
|
||||
#
|
||||
# Demo for driver model
|
||||
#
|
||||
# CONFIG_DM_DEMO is not set
|
||||
|
||||
#
|
||||
# DFU support
|
||||
#
|
||||
CONFIG_DFU_TFTP=y
|
||||
|
||||
#
|
||||
# DMA Support
|
||||
#
|
||||
# CONFIG_DMA is not set
|
||||
# CONFIG_TI_EDMA3 is not set
|
||||
|
||||
#
|
||||
# GPIO Support
|
||||
#
|
||||
# CONFIG_ALTERA_PIO is not set
|
||||
# CONFIG_DWAPB_GPIO is not set
|
||||
# CONFIG_ATMEL_PIO4 is not set
|
||||
# CONFIG_INTEL_BROADWELL_GPIO is not set
|
||||
# CONFIG_LPC32XX_GPIO is not set
|
||||
# CONFIG_MSM_GPIO is not set
|
||||
# CONFIG_ROCKCHIP_GPIO is not set
|
||||
# CONFIG_VYBRID_GPIO is not set
|
||||
# CONFIG_DM_74X164 is not set
|
||||
# CONFIG_DM_PCA953X is not set
|
||||
|
||||
#
|
||||
# I2C support
|
||||
#
|
||||
# CONFIG_DM_I2C_COMPAT is not set
|
||||
# CONFIG_SYS_I2C_DW is not set
|
||||
# CONFIG_CROS_EC_KEYB is not set
|
||||
|
||||
#
|
||||
# LED Support
|
||||
#
|
||||
# CONFIG_LED is not set
|
||||
|
||||
#
|
||||
# Mailbox Controller Support
|
||||
#
|
||||
|
||||
#
|
||||
# Memory Controller drivers
|
||||
#
|
||||
|
||||
#
|
||||
# Multifunction device drivers
|
||||
#
|
||||
# CONFIG_MISC is not set
|
||||
# CONFIG_CROS_EC is not set
|
||||
# CONFIG_FSL_SEC_MON is not set
|
||||
# CONFIG_MXC_OCOTP is not set
|
||||
# CONFIG_PWRSEQ is not set
|
||||
# CONFIG_PCA9551_LED is not set
|
||||
# CONFIG_SYSRESET is not set
|
||||
# CONFIG_WINBOND_W83627 is not set
|
||||
|
||||
#
|
||||
# MMC Host controller Support
|
||||
#
|
||||
# CONFIG_DM_MMC is not set
|
||||
|
||||
#
|
||||
# MTD Support
|
||||
#
|
||||
# CONFIG_MTD is not set
|
||||
|
||||
#
|
||||
# NAND Device Support
|
||||
#
|
||||
# CONFIG_NAND_DENALI is not set
|
||||
# CONFIG_NAND_VF610_NFC is not set
|
||||
# CONFIG_NAND_PXA3XX is not set
|
||||
# CONFIG_NAND_ARASAN is not set
|
||||
|
||||
#
|
||||
# Generic NAND options
|
||||
#
|
||||
# CONFIG_SPL_NAND_DENALI is not set
|
||||
|
||||
#
|
||||
# SPI Flash Support
|
||||
#
|
||||
# CONFIG_SPI_FLASH is not set
|
||||
# CONFIG_DM_ETH is not set
|
||||
# CONFIG_PHYLIB is not set
|
||||
# CONFIG_NETDEVICES is not set
|
||||
|
||||
#
|
||||
# PCI
|
||||
#
|
||||
# CONFIG_DM_PCI is not set
|
||||
|
||||
#
|
||||
# Pin controllers
|
||||
#
|
||||
# CONFIG_PINCTRL is not set
|
||||
|
||||
#
|
||||
# Power
|
||||
#
|
||||
# CONFIG_DM_PMIC is not set
|
||||
# CONFIG_DM_REGULATOR is not set
|
||||
# CONFIG_DM_PWM is not set
|
||||
# CONFIG_RAM is not set
|
||||
|
||||
#
|
||||
# Remote Processor drivers
|
||||
#
|
||||
|
||||
#
|
||||
# Real Time Clock
|
||||
#
|
||||
# CONFIG_DM_RTC is not set
|
||||
|
||||
#
|
||||
# Serial drivers
|
||||
#
|
||||
CONFIG_REQUIRE_SERIAL_CONSOLE=y
|
||||
CONFIG_SERIAL_PRESENT=y
|
||||
CONFIG_SPL_SERIAL_PRESENT=y
|
||||
# CONFIG_DEBUG_UART is not set
|
||||
# CONFIG_DEBUG_UART_SKIP_INIT is not set
|
||||
# CONFIG_ALTERA_JTAG_UART is not set
|
||||
# CONFIG_ALTERA_UART is not set
|
||||
# CONFIG_FSL_LPUART is not set
|
||||
CONFIG_SYS_NS16550=y
|
||||
# CONFIG_MSM_SERIAL is not set
|
||||
|
||||
#
|
||||
# Sound support
|
||||
#
|
||||
# CONFIG_SOUND is not set
|
||||
|
||||
#
|
||||
# SPI Support
|
||||
#
|
||||
# CONFIG_FSL_ESPI is not set
|
||||
# CONFIG_TI_QSPI is not set
|
||||
|
||||
#
|
||||
# SPMI support
|
||||
#
|
||||
# CONFIG_SPMI is not set
|
||||
# CONFIG_DM_THERMAL is not set
|
||||
|
||||
#
|
||||
# Timer Support
|
||||
#
|
||||
# CONFIG_TIMER is not set
|
||||
|
||||
#
|
||||
# TPM support
|
||||
#
|
||||
CONFIG_USB=y
|
||||
# CONFIG_DM_USB is not set
|
||||
|
||||
#
|
||||
# USB Host Controller Drivers
|
||||
#
|
||||
# CONFIG_USB_XHCI_HCD is not set
|
||||
# CONFIG_USB_XHCI is not set
|
||||
# CONFIG_USB_EHCI_HCD is not set
|
||||
# CONFIG_USB_EHCI is not set
|
||||
# CONFIG_USB_DWC3 is not set
|
||||
|
||||
#
|
||||
# MUSB Controller Driver
|
||||
#
|
||||
CONFIG_USB_MUSB_HOST=y
|
||||
CONFIG_USB_MUSB_GADGET=y
|
||||
|
||||
#
|
||||
# ULPI drivers
|
||||
#
|
||||
|
||||
#
|
||||
# USB peripherals
|
||||
#
|
||||
# CONFIG_USB_STORAGE is not set
|
||||
# CONFIG_USB_KEYBOARD is not set
|
||||
CONFIG_USB_GADGET=y
|
||||
# CONFIG_USB_GADGET_ATMEL_USBA is not set
|
||||
# CONFIG_USB_GADGET_DWC2_OTG is not set
|
||||
# CONFIG_CI_UDC is not set
|
||||
CONFIG_USB_GADGET_VBUS_DRAW=2
|
||||
CONFIG_USB_GADGET_DUALSPEED=y
|
||||
CONFIG_USB_GADGET_DOWNLOAD=y
|
||||
CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
|
||||
CONFIG_G_DNL_VENDOR_NUM=0x0451
|
||||
CONFIG_G_DNL_PRODUCT_NUM=0xd022
|
||||
|
||||
#
|
||||
# Graphics support
|
||||
#
|
||||
# CONFIG_DM_VIDEO is not set
|
||||
|
||||
#
|
||||
# TrueType Fonts
|
||||
#
|
||||
# CONFIG_VIDEO_VESA is not set
|
||||
# CONFIG_VIDEO_LCD_ANX9804 is not set
|
||||
# CONFIG_VIDEO_LCD_SSD2828 is not set
|
||||
# CONFIG_VIDEO_MVEBU is not set
|
||||
# CONFIG_DISPLAY is not set
|
||||
# CONFIG_VIDEO_BRIDGE is not set
|
||||
# CONFIG_PHYS_TO_BUS is not set
|
||||
|
||||
#
|
||||
# File systems
|
||||
#
|
||||
|
||||
#
|
||||
# Library routines
|
||||
#
|
||||
# CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED is not set
|
||||
CONFIG_HAVE_PRIVATE_LIBGCC=y
|
||||
# CONFIG_USE_PRIVATE_LIBGCC is not set
|
||||
CONFIG_SYS_HZ=1000
|
||||
# CONFIG_USE_TINY_PRINTF is not set
|
||||
CONFIG_REGEX=y
|
||||
# CONFIG_LIB_RAND is not set
|
||||
# CONFIG_CMD_DHRYSTONE is not set
|
||||
# CONFIG_RSA is not set
|
||||
# CONFIG_TPM is not set
|
||||
|
||||
#
|
||||
# Hashing Support
|
||||
#
|
||||
# CONFIG_SHA1 is not set
|
||||
# CONFIG_SHA256 is not set
|
||||
# CONFIG_SHA_HW_ACCEL is not set
|
||||
|
||||
#
|
||||
# Compression Support
|
||||
#
|
||||
# CONFIG_LZ4 is not set
|
||||
# CONFIG_ERRNO_STR is not set
|
||||
CONFIG_OF_LIBFDT=y
|
||||
# CONFIG_SPL_OF_LIBFDT is not set
|
||||
# CONFIG_EFI_LOADER is not set
|
||||
# CONFIG_UNIT_TEST is not set
|
||||
|
|
@ -13,12 +13,18 @@
|
|||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_AM335X_NETBIRD_V2_H
|
||||
#define __CONFIG_AM335X_NETBIRD_V2_H
|
||||
#ifndef __CONFIG_AM335X_NBHW16_H
|
||||
#define __CONFIG_AM335X_NBHW16_H
|
||||
|
||||
#include <configs/ti_am335x_common.h>
|
||||
|
||||
/* Disable U-Boot load from filesystems, to save around 10 kB SPL image size */
|
||||
#ifdef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
|
||||
# undef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
|
||||
#endif
|
||||
|
||||
#undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
|
||||
|
||||
#undef CONFIG_HW_WATCHDOG
|
||||
#undef CONFIG_OMPAP_WATCHDOG
|
||||
#undef CONFIG_SPL_WATCHDOG_SUPPORT
|
||||
|
|
@ -40,59 +46,118 @@
|
|||
|
||||
#include <config_distro_bootcmd.h>
|
||||
|
||||
#define CONFIG_ARP_TIMEOUT 200
|
||||
/* Dynamic override for PHY_ANEG_TIMEOUT value */
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
# ifndef __ASSEMBLER__
|
||||
int eth_phy_timeout(void);
|
||||
# endif
|
||||
#endif
|
||||
#define PHY_ANEG_TIMEOUT eth_phy_timeout()
|
||||
#define PHY_ANEG_DEFAULT_TIMEOUT 5000
|
||||
|
||||
#define CONFIG_ARP_TIMEOUT 200
|
||||
#undef CONFIG_NET_RETRY_COUNT
|
||||
#define CONFIG_NET_RETRY_COUNT 5
|
||||
#define CONFIG_NET_RETRY_COUNT 5
|
||||
#define CONFIG_BOOTP_MAY_FAIL
|
||||
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
#define KERNEL_ADDR "0x80000000"
|
||||
#define LOAD_ADDR "0x83000000"
|
||||
#define FDT_ADDR "0x82000000"
|
||||
#define PXE_ADDR "0x82800000"
|
||||
|
||||
/*
|
||||
* Memory map for booting Linux
|
||||
*
|
||||
* 0x80000000 32MB KERNEL_ADDR (kernel_addr), kernel execution address
|
||||
* 0x82000000 190MB KERNEL_ADDR_R (kernel_addr_r), FIT image/kernel loading address
|
||||
* kernel will be relocated kernel_addr
|
||||
* for FIT images, ramdisc and dtb will be relocated to
|
||||
* top of bootmemory (0x8e000000 downwards)
|
||||
* 0x8BE00000 1MB FDT_ADDR_R (fdt_addr_r), device tree if separate from kernel/FIT
|
||||
* 0x8BF00000 1MB PXE_ADDR (pxefile_addr_r), pxe configuration file (pxe get command)
|
||||
* 0x8C000000 32MB LOAD_ADDR (load_addr), loading address for generic files
|
||||
* <end of boot memory>
|
||||
* 0x8E000000 4B NRSW reset reason
|
||||
* 32MB <>, Free space
|
||||
* 0x90000000 256MB <>, Free space, 512MB systems
|
||||
* 0xA0000000 512MB <>, Free space, 1GB systems only
|
||||
* 0xC0000000 End of RAM
|
||||
*/
|
||||
|
||||
#define KERNEL_ADDR "0x80000000"
|
||||
#define KERNEL_ADDR_R "0x82000000"
|
||||
#define FDT_ADDR_R "0x8BE00000"
|
||||
#define PXE_ADDR "0x8BF00000"
|
||||
#define LOAD_ADDR "0x8C000000"
|
||||
|
||||
/*
|
||||
* Limit boot memory to 256 MBytes to comply with kernel initial memory layout
|
||||
* This is the official way to restrict image load addresses.
|
||||
* Don't use xx_high_addr variables.
|
||||
*/
|
||||
#define BOOTM_SIZE "0x0E000000"
|
||||
|
||||
#define MAIN_BOOTCMD "run sdboot"
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"kernel_image=kernel.bin\0" \
|
||||
"fdt_image=openwrt-nbhw16-nb800.dtb\0" \
|
||||
"modeboot=sdboot\0" \
|
||||
"fdt_addr=" FDT_ADDR "\0" \
|
||||
"kernel_addr=" KERNEL_ADDR "\0" \
|
||||
/* Memory Adresses */ \
|
||||
"fdt_addr_r=" FDT_ADDR_R "\0" \
|
||||
"kernel_addr=" KERNEL_ADDR "\0" /* NRSW only */ \
|
||||
"kernel_addr_r=" KERNEL_ADDR_R "\0" \
|
||||
"load_addr=" LOAD_ADDR "\0" \
|
||||
"root_part=1\0" /* Default root partition, overwritte in board file */ \
|
||||
"defaultconsole=ttyS1\0" /* Default output console */ \
|
||||
"add_sd_bootargs=setenv bootargs $bootargs root=/dev/mmcblk1p$root_part rootfstype=ext4 console=$defaultconsole,115200 rootwait loglevel=4\0" \
|
||||
"add_version_bootargs=setenv bootargs $bootargs\0" \
|
||||
"pxefile_addr_r=" PXE_ADDR "\0" \
|
||||
"bootm_size=" BOOTM_SIZE "\0" \
|
||||
\
|
||||
/* Misc */ \
|
||||
"defaultconsole=ttyS1\0" \
|
||||
"fdt_skip_update=yes\0" \
|
||||
"bootdelay=0\0" \
|
||||
\
|
||||
/* Networking */ \
|
||||
"ethprime=cpsw\0" \
|
||||
"sdbringup=echo Try bringup boot && ext4load mmc 1:$root_part $kernel_addr /boot/zImage && " \
|
||||
"ext4load mmc 1:$root_part $fdt_addr /boot/$fdt_image && setenv bootargs $bootargs rw;\0" \
|
||||
"sdprod=ext4load mmc 1:$root_part $kernel_addr /boot/$kernel_image && " \
|
||||
"ext4load mmc 1:$root_part $fdt_addr /boot/$fdt_image && setenv bootargs $bootargs ro;\0" \
|
||||
"sdboot=if mmc dev 1; then echo Copying Linux from SD to RAM...; "\
|
||||
"if test -e mmc 1:$root_part /boot/$kernel_image; then run sdprod; " \
|
||||
"else run sdbringup; fi; " \
|
||||
"run add_sd_bootargs; run add_version_bootargs; run shieldcmd; run modifyfdtcmd; " \
|
||||
"bootz $kernel_addr - $fdt_addr; fi\0" \
|
||||
"bootcmd=run sdboot\0" \
|
||||
"ethopts=ti_cpsw.rx_packet_max=1526\0" \
|
||||
"ipaddr=192.168.1.1\0" \
|
||||
"serverip=192.168.1.254\0" \
|
||||
"pxefile_addr_r=" PXE_ADDR "\0" \
|
||||
"fdt_addr_r=" FDT_ADDR "\0" \
|
||||
"kernel_addr_r=" KERNEL_ADDR "\0" \
|
||||
"ramdisk_addr_r=" LOAD_ADDR "\0" \
|
||||
"bootpretryperiod=1000\0" \
|
||||
"tftptimeout=2000\0" \
|
||||
"tftptimeoutcountmax=5\0" \
|
||||
"bootpretryperiod=2000\0" \
|
||||
"autoload=false\0" \
|
||||
"shieldcmd=\0" \
|
||||
"fdtshieldcmd=\0" \
|
||||
"modifyfdtcmd=fdt addr $fdt_addr; run fdtshieldcmd;\0" \
|
||||
"tftp_recovery=tftpboot $kernel_addr recovery-image; tftpboot $fdt_addr recovery-dtb; setenv bootargs rdinit=/etc/preinit console=$defaultconsole,115200 debug; run shieldcmd; run modifyfdtcmd; bootz $kernel_addr - $fdt_addr\0" \
|
||||
"pxe_recovery=sleep 3 && dhcp && pxe get && pxe boot\0" \
|
||||
"recovery=run pxe_recovery || setenv ipaddr $ipaddr; setenv serverip $serverip; run tftp_recovery\0" /* setenv ipaddr and serverip is necessary, because dhclient can destroy the IPs inernally */
|
||||
\
|
||||
/* NRSW boot */ \
|
||||
"root_part=1\0" /* from NRSW, required here? set from board.c */ \
|
||||
"kernel_image=kernel.bin\0" \
|
||||
"fdt_image=openwrt-nbhw16-nb800.dtb\0" \
|
||||
"add_sd_bootargs=setenv bootargs $bootargs root=/dev/${mmc_dev}p$root_part rootfstype=ext4 " \
|
||||
"console=$defaultconsole,115200 rootwait loglevel=4 ti_cpsw.rx_packet_max=1526\0" \
|
||||
"add_version_bootargs=setenv bootargs $bootargs\0" \
|
||||
"sdbringup=echo Try bringup boot && ext4load mmc 1:$root_part $kernel_addr /boot/zImage && " \
|
||||
"ext4load mmc 1:$root_part $fdt_addr /boot/$fdt_image && setenv bootargs $bootargs rw;\0" \
|
||||
"sdprod=ext4load mmc 1:$root_part $kernel_addr /boot/$kernel_image && " \
|
||||
"ext4load mmc 1:$root_part $fdt_addr /boot/$fdt_image && setenv bootargs $bootargs ro;\0" \
|
||||
"sdboot=env set fdt_addr " FDT_ADDR_R "; "\
|
||||
"if mmc dev 1; then echo Copying Linux from SD to RAM...; "\
|
||||
"if test -e mmc 1:$root_part /boot/$kernel_image; then run sdprod; " \
|
||||
"else run sdbringup; fi; " \
|
||||
/* For v4.19 kernel $mmc_dev should be "mmcblk1" (read from DT), for v3.18 kernel: "mmcblk0" */ \
|
||||
"fdt addr $fdt_addr;run fdtshieldcmd;if fdt get value mmc_dev /nm_env nm,mmc-dev;then;else setenv mmc_dev mmcblk0;fi;" \
|
||||
"run add_sd_bootargs; run add_version_bootargs; run shieldcmd; " \
|
||||
"bootz $kernel_addr - $fdt_addr; fi\0" \
|
||||
\
|
||||
/* Boot command */ \
|
||||
"bootcmd=" MAIN_BOOTCMD "\0" \
|
||||
\
|
||||
/* Recovery boot (same for OSTree and NRSW) */ \
|
||||
"recovery=run pxe_recovery || setenv ipaddr $ipaddr; setenv serverip $serverip; run tftp_recovery\0" \
|
||||
/* setenv ipaddr and serverip is necessary, because dhclient destroys the IPs internally */ \
|
||||
"pxe_recovery=mdio up $ethprime && dhcp && pxe get && pxe boot\0" \
|
||||
"tftp_recovery=tftpboot $kernel_addr_r recovery-image; tftpboot $fdt_addr_r recovery-dtb; " \
|
||||
"fdt addr $fdt_addr_r; run fdtshieldcmd; " \
|
||||
"setenv bootargs rdinit=/etc/preinit console=$defaultconsole,115200 " \
|
||||
"debug $ethopts; run shieldcmd; " \
|
||||
"bootz $kernel_addr_r - $fdt_addr_r\0" /* kernel_addr_r */
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
/* TODO: Check if ok for NRSW? */
|
||||
#define CONFIG_ZERO_BOOTDELAY_CHECK
|
||||
|
||||
/* NS16550 Configuration */
|
||||
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
|
||||
#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */
|
||||
|
|
@ -108,22 +173,20 @@
|
|||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
|
||||
#define CONFIG_SYS_I2C_SPEED 100000
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 50
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 50 /* TODO: Can this be reduced to 20ms */
|
||||
|
||||
#define CONFIG_ENV_IS_IN_EEPROM
|
||||
#define CONFIG_ENV_OFFSET 0x1000 /* The Environment is located at 4k */
|
||||
#define CONFIG_ENV_SIZE 0x800 /* The maximum size is 2k */
|
||||
#undef CONFIG_SPL_ENV_SUPPORT
|
||||
#undef CONFIG_SPL_ENV_SUPPORT
|
||||
#undef CONFIG_SPL_NAND_SUPPORT
|
||||
#undef CONFIG_SPL_ONENAND_SUPPORT
|
||||
|
||||
|
||||
/* We need to disable SPI to not confuse the eeprom env driver */
|
||||
#undef CONFIG_SPI
|
||||
#undef CONFIG_SPI_BOOT
|
||||
#undef CONFIG_SPL_OS_BOOT
|
||||
|
||||
#define CONFIG_SPL_POWER_SUPPORT
|
||||
#define CONFIG_SPL_YMODEM_SUPPORT
|
||||
|
||||
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
|
||||
|
|
@ -142,14 +205,7 @@
|
|||
#define CONFIG_USB_MUSB_PIO_ONLY
|
||||
#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT
|
||||
#define CONFIG_AM335X_USB0
|
||||
#define CONFIG_AM335X_USB0_MODE MUSB_HOST
|
||||
|
||||
/* Fastboot */
|
||||
#define CONFIG_USB_FUNCTION_FASTBOOT
|
||||
#define CONFIG_CMD_FASTBOOT
|
||||
#define CONFIG_ANDROID_BOOT_IMAGE
|
||||
#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
|
||||
#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000
|
||||
#define CONFIG_AM335X_USB0_MODE MUSB_HOST
|
||||
|
||||
/* To support eMMC booting */
|
||||
#define CONFIG_STORAGE_EMMC
|
||||
|
|
@ -168,6 +224,7 @@
|
|||
#endif /* CONFIG_DM_ETH */
|
||||
#endif /* CONFIG_USB_MUSB_GADGET */
|
||||
|
||||
|
||||
/*
|
||||
* Disable MMC DM for SPL build and can be re-enabled after adding
|
||||
* DM support in SPL
|
||||
|
|
@ -217,7 +274,6 @@
|
|||
#endif
|
||||
|
||||
/* Network. */
|
||||
#define CONFIG_PHY_GIGE
|
||||
#define CONFIG_PHYLIB
|
||||
#define CONFIG_PHY_SMSC
|
||||
|
||||
|
|
@ -237,9 +293,25 @@
|
|||
#define CONFIG_POWER_TPS65217
|
||||
#define CONFIG_POWER_TPS62362
|
||||
|
||||
#ifdef CONFIG_NRSW_BUILD
|
||||
/* support for NM packed bootloader */
|
||||
#define CONFIG_NM_BOOTLOADER_FORMAT
|
||||
|
||||
/* password protected login */
|
||||
#define CONFIG_CRYPT
|
||||
#define CONFIG_NM_LOGIN
|
||||
#define CONFIG_NM_LOGIN_PART "1:3" /* TODO: Define location of file for OSTree/Yocto */
|
||||
#define CONFIG_NM_LOGIN_PASSWD "/root/boot/bootpass"
|
||||
#endif
|
||||
#define CONFIG_CMD_PXE
|
||||
|
||||
/* Never enable ISO it is broaken and can lead to a crash */
|
||||
#define CONFIG_JTAG_MARKER_SPL 0x402FFF00
|
||||
#define CONFIG_JTAG_MARKER_UBOOT 0x807FFF00
|
||||
|
||||
/* SPL command is not needed */
|
||||
#undef CONFIG_CMD_SPL
|
||||
|
||||
/* Never enable ISO it is broken and can lead to a crash */
|
||||
#undef CONFIG_ISO_PARTITION
|
||||
|
||||
#endif /* ! __CONFIG_AM335X_NETBIRD_V2_H */
|
||||
#endif /* ! __CONFIG_AM335X_NBHW16_H */
|
||||
|
|
@ -1,219 +0,0 @@
|
|||
/*
|
||||
* am335x_evm.h
|
||||
*
|
||||
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation version 2.
|
||||
*
|
||||
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
|
||||
* kind, whether express or implied; without even the implied warranty
|
||||
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_AM335X_EVM_H
|
||||
#define __CONFIG_AM335X_EVM_H
|
||||
|
||||
#include <configs/ti_am335x_common.h>
|
||||
|
||||
#undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
|
||||
#undef CONFIG_HW_WATCHDOG
|
||||
#undef CONFIG_OMPAP_WATCHDOG
|
||||
#undef CONFIG_SPL_WATCHDOG_SUPPORT
|
||||
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
# define CONFIG_TIMESTAMP
|
||||
# define CONFIG_LZO
|
||||
#endif
|
||||
|
||||
#define CONFIG_SYS_BOOTM_LEN (16 << 20)
|
||||
|
||||
#define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */
|
||||
#define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM
|
||||
#define CONFIG_BOARD_LATE_INIT
|
||||
|
||||
/* Clock Defines */
|
||||
#define V_OSCK 0 /* 0 means detect from sysboot1 config */
|
||||
#define V_SCLK (V_OSCK)
|
||||
|
||||
#include <config_distro_bootcmd.h>
|
||||
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"kernel_image=kernel.bin\0" \
|
||||
"fdt_image=openwrt-nbhw16.dtb\0" \
|
||||
"modeboot=sdboot\0" \
|
||||
"fdt_addr=0x82000000\0" \
|
||||
"kernel_addr=0x80000000\0" \
|
||||
"load_addr=0x83000000\0" \
|
||||
"root_part=1\0" /* Default root partition, overwritte in board/mv_ebu/a38x/nbhw14_env.c */ \
|
||||
"add_sd_bootargs=setenv bootargs $bootargs root=/dev/mmcblk1p$root_part rootfstype=ext4 console=ttyO0,115200 rootwait earlyprintk\0" \
|
||||
"add_version_bootargs=setenv bootargs $bootargs\0" \
|
||||
"fdt_skip_update=yes\0" \
|
||||
"ethprime=cpsw\0" \
|
||||
"sdbringup=echo Try bringup boot && ext4load mmc 1:$root_part $kernel_addr /boot/zImage && " \
|
||||
"ext4load mmc 1:$root_part $fdt_addr /boot/$fdt_image && setenv bootargs $bootargs rw;\0" \
|
||||
"sdprod=ext4load mmc 1:$root_part $kernel_addr /boot/$kernel_image && " \
|
||||
"ext4load mmc 1:$root_part $fdt_addr /boot/$fdt_image && setenv bootargs $bootargs ro;\0" \
|
||||
"sdboot=if mmc dev 1; then echo Copying Linux from SD to RAM...; "\
|
||||
"if test -e mmc 1:$root_part /boot/$kernel_image; then run sdprod; " \
|
||||
"else run sdbringup; fi; " \
|
||||
"run add_sd_bootargs; run add_version_bootargs; " \
|
||||
"bootz $kernel_addr - $fdt_addr; fi\0" \
|
||||
"bootcmd=run sdboot\0" \
|
||||
"ipaddr=192.168.1.1\0" \
|
||||
"serverip=192.168.1.254\0" \
|
||||
"recovery=tftpboot $kernel_addr recovery-image; tftpboot $fdt_addr recovery-dtb; setenv bootargs rdinit=/etc/preinit console=ttyO0,115200 debug; bootz $kernel_addr - $fdt_addr\0"
|
||||
#endif
|
||||
|
||||
/* NS16550 Configuration */
|
||||
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
|
||||
#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */
|
||||
#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */
|
||||
#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */
|
||||
#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
|
||||
#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
|
||||
#define CONFIG_CMD_EEPROM
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
|
||||
#define CONFIG_SYS_I2C_SPEED 100000
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 50
|
||||
|
||||
#define CONFIG_ENV_IS_IN_EEPROM
|
||||
#define CONFIG_ENV_OFFSET 0x1000 /* The Environment is located at 4k */
|
||||
#define CONFIG_ENV_SIZE 0x800 /* The maximum size is 2k */
|
||||
#undef CONFIG_SPL_ENV_SUPPORT
|
||||
#undef CONFIG_SPL_NAND_SUPPORT
|
||||
#undef CONFIG_SPL_ONENAND_SUPPORT
|
||||
|
||||
|
||||
/* We need to disable SPI to not confuse the eeprom env driver */
|
||||
#undef CONFIG_SPI
|
||||
#undef CONFIG_SPI_BOOT
|
||||
#undef CONFIG_SPL_OS_BOOT
|
||||
|
||||
#define CONFIG_SPL_POWER_SUPPORT
|
||||
#define CONFIG_SPL_YMODEM_SUPPORT
|
||||
|
||||
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
|
||||
|
||||
#define CONFIG_SUPPORT_EMMC_BOOT
|
||||
|
||||
/*
|
||||
* USB configuration. We enable MUSB support, both for host and for
|
||||
* gadget. We set USB0 as peripheral and USB1 as host, based on the
|
||||
* board schematic and physical port wired to each. Then for host we
|
||||
* add mass storage support and for gadget we add both RNDIS ethernet
|
||||
* and DFU.
|
||||
*/
|
||||
#define CONFIG_USB_MUSB_DSPS
|
||||
#define CONFIG_ARCH_MISC_INIT
|
||||
#define CONFIG_USB_MUSB_PIO_ONLY
|
||||
#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT
|
||||
#define CONFIG_AM335X_USB0
|
||||
#define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL
|
||||
#define CONFIG_AM335X_USB1
|
||||
#define CONFIG_AM335X_USB1_MODE MUSB_HOST
|
||||
|
||||
/* Fastboot */
|
||||
#define CONFIG_USB_FUNCTION_FASTBOOT
|
||||
#define CONFIG_CMD_FASTBOOT
|
||||
#define CONFIG_ANDROID_BOOT_IMAGE
|
||||
#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
|
||||
#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000
|
||||
|
||||
/* To support eMMC booting */
|
||||
#define CONFIG_STORAGE_EMMC
|
||||
#define CONFIG_FASTBOOT_FLASH_MMC_DEV 1
|
||||
|
||||
#ifdef CONFIG_USB_MUSB_HOST
|
||||
#define CONFIG_USB_STORAGE
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USB_MUSB_GADGET
|
||||
/* Removing USB gadget and can be enabled adter adding support usb DM */
|
||||
#ifndef CONFIG_DM_ETH
|
||||
#define CONFIG_USB_ETHER
|
||||
#define CONFIG_USB_ETH_RNDIS
|
||||
#define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00"
|
||||
#endif /* CONFIG_DM_ETH */
|
||||
#endif /* CONFIG_USB_MUSB_GADGET */
|
||||
|
||||
/*
|
||||
* Disable MMC DM for SPL build and can be re-enabled after adding
|
||||
* DM support in SPL
|
||||
*/
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
#undef CONFIG_DM_MMC
|
||||
#undef CONFIG_TIMER
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SPL_BUILD)
|
||||
/* Remove other SPL modes. */
|
||||
#undef CONFIG_SPL_NAND_SUPPORT
|
||||
#define CONFIG_ENV_IS_NOWHERE
|
||||
#undef CONFIG_PARTITION_UUIDS
|
||||
#undef CONFIG_EFI_PARTITION
|
||||
#endif
|
||||
|
||||
/* USB Device Firmware Update support */
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
#define CONFIG_USB_FUNCTION_DFU
|
||||
#define CONFIG_DFU_MMC
|
||||
#define DFU_ALT_INFO_MMC \
|
||||
"dfu_alt_info_mmc=" \
|
||||
"boot part 0 1;" \
|
||||
"rootfs part 0 2;" \
|
||||
"MLO fat 0 1;" \
|
||||
"MLO.raw raw 0x100 0x100;" \
|
||||
"u-boot.img.raw raw 0x300 0x400;" \
|
||||
"spl-os-args.raw raw 0x80 0x80;" \
|
||||
"spl-os-image.raw raw 0x900 0x2000;" \
|
||||
"spl-os-args fat 0 1;" \
|
||||
"spl-os-image fat 0 1;" \
|
||||
"u-boot.img fat 0 1;" \
|
||||
"uEnv.txt fat 0 1\0"
|
||||
#define DFU_ALT_INFO_NAND ""
|
||||
#define CONFIG_DFU_RAM
|
||||
#define DFU_ALT_INFO_RAM \
|
||||
"dfu_alt_info_ram=" \
|
||||
"kernel ram 0x80200000 0xD80000;" \
|
||||
"fdt ram 0x80F80000 0x80000;" \
|
||||
"ramdisk ram 0x81000000 0x4000000\0"
|
||||
#define DFUARGS \
|
||||
"dfu_alt_info_emmc=rawemmc raw 0 3751936\0" \
|
||||
DFU_ALT_INFO_MMC \
|
||||
DFU_ALT_INFO_RAM \
|
||||
DFU_ALT_INFO_NAND
|
||||
#endif
|
||||
|
||||
/* Network. */
|
||||
#define CONFIG_PHY_GIGE
|
||||
#define CONFIG_PHYLIB
|
||||
#define CONFIG_PHY_SMSC
|
||||
|
||||
#ifdef CONFIG_DRIVER_TI_CPSW
|
||||
#define CONFIG_CLOCK_SYNTHESIZER
|
||||
#define CLK_SYNTHESIZER_I2C_ADDR 0x65
|
||||
#endif
|
||||
|
||||
#define CONFIG_SYS_MEMTEST_START 0x80000000
|
||||
#define CONFIG_SYS_MEMTEST_END 0x87900000
|
||||
|
||||
/* Enable support for TPS 65218 */
|
||||
#define CONFIG_POWER
|
||||
#define CONFIG_POWER_I2C
|
||||
#define CONFIG_POWER_TPS65218
|
||||
/* For compatibility reasons (BeagleBone) */
|
||||
#define CONFIG_POWER_TPS65217
|
||||
#define CONFIG_POWER_TPS62362
|
||||
|
||||
/* Never enable ISO it is broaken and can lead to a crash */
|
||||
#undef CONFIG_ISO_PARTITION
|
||||
|
||||
#endif /* ! __CONFIG_AM335X_EVM_H */
|
||||
Loading…
Reference in New Issue