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Merge branch 'master' of git://git.denx.de/u-boot-microblaze

This commit is contained in:
Wolfgang Denk 2009-01-23 22:47:25 +01:00
parent 4d0b54685c e7f325be9e
commit 1ca1d3c866
12 changed files with 120 additions and 63 deletions
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2
MAINTAINERS
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@ -707,7 +707,7 @@ Yasushi Shoji <yashi@atmark-techno.com>
Michal Simek <monstr@monstr.eu> Michal Simek <monstr@monstr.eu>
ML401 MicroBlaze microblaze-generic MicroBlaze
######################################################################### #########################################################################
# Coldfire Systems: # # Coldfire Systems: #

6
MAKEALL
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@ -697,9 +697,9 @@ LIST_nios2=" \
## MicroBlaze Systems ## MicroBlaze Systems
######################################################################### #########################################################################
LIST_microblaze=" \ LIST_microblaze=" \
ml401 \ microblaze-generic \
suzaku \ suzaku \
" "
######################################################################### #########################################################################

5
Makefile
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@ -3170,10 +3170,9 @@ PCI5441_config : unconfig
## Microblaze ## Microblaze
#======================================================================== #========================================================================
ml401_config: unconfig microblaze-generic_config: unconfig
@mkdir -p $(obj)include @mkdir -p $(obj)include
@echo "#define CONFIG_ML401 1" > $(obj)include/config.h @$(MKCONFIG) -a $(@:_config=) microblaze microblaze microblaze-generic xilinx
@$(MKCONFIG) -a $(@:_config=) microblaze microblaze ml401 xilinx
suzaku_config: unconfig suzaku_config: unconfig
@mkdir -p $(obj)include @mkdir -p $(obj)include

0
board/xilinx/ml401/Makefile → board/xilinx/microblaze-generic/Makefile
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0
board/xilinx/ml401/config.mk → board/xilinx/microblaze-generic/config.mk
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0
board/xilinx/ml401/ml401.c → board/xilinx/microblaze-generic/microblaze-generic.c
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0
board/xilinx/ml401/u-boot.lds → board/xilinx/microblaze-generic/u-boot.lds
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2
board/xilinx/ml401/xparameters.h → board/xilinx/microblaze-generic/xparameters.h
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@ -25,6 +25,8 @@
* Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4 * Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4
*/ */
#define XILINX_BOARD_NAME microblaze-generic
/* System Clock Frequency */ /* System Clock Frequency */
#define XILINX_CLOCK_FREQ 100000000 #define XILINX_CLOCK_FREQ 100000000

3
cpu/microblaze/cache.c
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@ -25,8 +25,6 @@
#include <common.h> #include <common.h>
#include <asm/asm.h> #include <asm/asm.h>
#if defined(CONFIG_CMD_CACHE)
int dcache_status (void) int dcache_status (void)
{ {
int i = 0; int i = 0;
@ -62,4 +60,3 @@ void dcache_enable (void) {
void dcache_disable(void) { void dcache_disable(void) {
MSRCLR(0x80); MSRCLR(0x80);
} }
#endif

119
include/configs/ml401.h → include/configs/microblaze-generic.h
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@ -25,32 +25,33 @@
#ifndef __CONFIG_H #ifndef __CONFIG_H
#define __CONFIG_H #define __CONFIG_H
#include "../board/xilinx/ml401/xparameters.h" #include "../board/xilinx/microblaze-generic/xparameters.h"
#define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */ #define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */
#define MICROBLAZE_V5 1 #define MICROBLAZE_V5 1
#define CONFIG_ML401 1 /* ML401 Board */
/* uart */ /* uart */
#ifdef XILINX_UARTLITE_BASEADDR #ifdef XILINX_UARTLITE_BASEADDR
#define CONFIG_XILINX_UARTLITE #define CONFIG_XILINX_UARTLITE
#define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR #define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR
#define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE #define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE
#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } #define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
#define CONSOLE_ARG "console=console=ttyUL0,115200\0"
#elif XILINX_UART16550_BASEADDR #elif XILINX_UART16550_BASEADDR
#define CONFIG_SYS_NS16550 1 #define CONFIG_SYS_NS16550 1
#define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE -4 #define CONFIG_SYS_NS16550_REG_SIZE -4
#define CONFIG_CONS_INDEX 1 #define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_COM1 (XILINX_UART16550_BASEADDR + 0x1000 + 0x3) #define CONFIG_SYS_NS16550_COM1 (XILINX_UART16550_BASEADDR + 0x1000 + 0x3)
#define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ #define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ
#define CONFIG_BAUDRATE 115200 #define CONFIG_BAUDRATE 115200
/* The following table includes the supported baudrates */ /* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE \ #define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
#define CONSOLE_ARG "console=console=ttyS0,115200\0"
#else #else
#error Undefined uart #error Undefined uart
#endif #endif
/* setting reset address */ /* setting reset address */
@ -58,44 +59,44 @@
/* ethernet */ /* ethernet */
#ifdef XILINX_EMAC_BASEADDR #ifdef XILINX_EMAC_BASEADDR
#define CONFIG_XILINX_EMAC 1 #define CONFIG_XILINX_EMAC 1
#define CONFIG_SYS_ENET #define CONFIG_SYS_ENET
#else #elif XILINX_EMACLITE_BASEADDR
#ifdef XILINX_EMACLITE_BASEADDR #define CONFIG_XILINX_EMACLITE 1
#define CONFIG_XILINX_EMACLITE 1 #define CONFIG_SYS_ENET
#define CONFIG_SYS_ENET #elif XILINX_LLTEMAC_BASEADDR
#endif #define CONFIG_XILINX_LL_TEMAC 1
#define CONFIG_SYS_ENET
#endif #endif
#undef ET_DEBUG #undef ET_DEBUG
/* gpio */ /* gpio */
#ifdef XILINX_GPIO_BASEADDR #ifdef XILINX_GPIO_BASEADDR
#define CONFIG_SYS_GPIO_0 1 #define CONFIG_SYS_GPIO_0 1
#define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR #define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR
#endif #endif
/* interrupt controller */ /* interrupt controller */
#ifdef XILINX_INTC_BASEADDR #ifdef XILINX_INTC_BASEADDR
#define CONFIG_SYS_INTC_0 1 #define CONFIG_SYS_INTC_0 1
#define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR #define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR
#define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS #define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS
#endif #endif
/* timer */ /* timer */
#ifdef XILINX_TIMER_BASEADDR #ifdef XILINX_TIMER_BASEADDR
#if (XILINX_TIMER_IRQ != -1) #if (XILINX_TIMER_IRQ != -1)
#define CONFIG_SYS_TIMER_0 1 #define CONFIG_SYS_TIMER_0 1
#define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR #define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR
#define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ #define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ
#define FREQUENCE XILINX_CLOCK_FREQ #define FREQUENCE XILINX_CLOCK_FREQ
#define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 ) #define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 )
#endif #endif
#elif XILINX_CLOCK_FREQ
#define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ
#else #else
#ifdef XILINX_CLOCK_FREQ #error BAD CLOCK FREQ
#define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ
#else
#error BAD CLOCK FREQ
#endif
#endif #endif
/* FSL */ /* FSL */
/* #define CONFIG_SYS_FSL_2 */ /* #define CONFIG_SYS_FSL_2 */
@ -160,7 +161,7 @@
#define CONFIG_FLASH_CFI_DRIVER 1 #define CONFIG_FLASH_CFI_DRIVER 1
#define CONFIG_SYS_FLASH_EMPTY_INFO 1 /* ?empty sector */ #define CONFIG_SYS_FLASH_EMPTY_INFO 1 /* ?empty sector */
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
#define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */ #define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */
#ifdef RAMENV #ifdef RAMENV
@ -170,9 +171,9 @@
#else /* !RAMENV */ #else /* !RAMENV */
#define CONFIG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_IS_IN_FLASH 1
#define CONFIG_ENV_SECT_SIZE 0x40000 /* 256K(one sector) for env */ #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
#define CONFIG_ENV_SIZE 0x40000 #define CONFIG_ENV_SIZE 0x20000
#endif /* !RAMBOOT */ #endif /* !RAMBOOT */
#else /* !FLASH */ #else /* !FLASH */
/* ENV in RAM */ /* ENV in RAM */
@ -193,6 +194,18 @@
#define CONFIG_DOS_PARTITION #define CONFIG_DOS_PARTITION
#endif #endif
#if defined(XILINX_USE_ICACHE)
#define CONFIG_ICACHE
#else
#undef CONFIG_ICACHE
#endif
#if defined(XILINX_USE_DCACHE)
#define CONFIG_DCACHE
#else
#undef CONFIG_DCACHE
#endif
/* /*
* BOOTP options * BOOTP options
*/ */
@ -207,9 +220,15 @@
#include <config_cmd_default.h> #include <config_cmd_default.h>
#define CONFIG_CMD_ASKENV #define CONFIG_CMD_ASKENV
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_IRQ #define CONFIG_CMD_IRQ
#define CONFIG_CMD_MFSL #define CONFIG_CMD_MFSL
#define CONFIG_CMD_ECHO
#if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE)
#define CONFIG_CMD_CACHE
#else
#undef CONFIG_CMD_CACHE
#endif
#ifndef CONFIG_SYS_ENET #ifndef CONFIG_SYS_ENET
#undef CONFIG_CMD_NET #undef CONFIG_CMD_NET
@ -233,7 +252,9 @@
#define CONFIG_CMD_SAVES #define CONFIG_CMD_SAVES
#endif #endif
#else #else
#undef CONFIG_CMD_IMLS
#undef CONFIG_CMD_FLASH #undef CONFIG_CMD_FLASH
#undef CONFIG_CMD_JFFS2
#endif #endif
#if defined(CONFIG_CMD_JFFS2) #if defined(CONFIG_CMD_JFFS2)
@ -253,11 +274,11 @@
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */
#define CONFIG_SYS_MAXARGS 15 /* max number of command args */ #define CONFIG_SYS_MAXARGS 15 /* max number of command args */
#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_LOAD_ADDR 0x12000000 /* default load address */ #define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START /* default load address */
#define CONFIG_BOOTDELAY 30 #define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */
#define CONFIG_BOOTARGS "root=romfs" #define CONFIG_BOOTARGS "root=romfs"
#define CONFIG_HOSTNAME "ml401" #define CONFIG_HOSTNAME XILINX_BOARD_NAME
#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
#define CONFIG_IPADDR 192.168.0.3 #define CONFIG_IPADDR 192.168.0.3
#define CONFIG_SERVERIP 192.168.0.5 #define CONFIG_SERVERIP 192.168.0.5
@ -268,7 +289,7 @@
#define CONFIG_SYS_USR_EXCEP /* user exception */ #define CONFIG_SYS_USR_EXCEP /* user exception */
#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_HZ 1000
#define CONFIG_PREBOOT "echo U-BOOT for ML401;setenv preboot;echo" #define CONFIG_PREBOOT "echo U-BOOT for $(hostname);setenv preboot;echo"
#define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\ #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\
"nor0=ml401-0\0"\ "nor0=ml401-0\0"\

30
lib_microblaze/board.c
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@ -111,6 +111,10 @@ void board_init (void)
gd = (gd_t *) CONFIG_SYS_GBL_DATA_OFFSET; gd = (gd_t *) CONFIG_SYS_GBL_DATA_OFFSET;
#if defined(CONFIG_CMD_FLASH) #if defined(CONFIG_CMD_FLASH)
ulong flash_size = 0; ulong flash_size = 0;
#endif
#if defined(CONFIG_CMD_NET)
char *s, *e;
int i;
#endif #endif
asm ("nop"); /* FIXME gd is not initialize - wait */ asm ("nop"); /* FIXME gd is not initialize - wait */
memset ((void *)gd, 0, CONFIG_SYS_GBL_DATA_SIZE); memset ((void *)gd, 0, CONFIG_SYS_GBL_DATA_SIZE);
@ -132,11 +136,34 @@ void board_init (void)
} }
} }
puts ("SDRAM :\n");
printf ("\t\tIcache:%s\n", icache_status() ? "OK" : "FAIL");
printf ("\t\tDcache:%s\n", dcache_status() ? "OK" : "FAIL");
printf ("\tU-Boot Start:0x%08x\n", TEXT_BASE);
#if defined(CONFIG_CMD_FLASH) #if defined(CONFIG_CMD_FLASH)
puts ("FLASH: ");
bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
if (0 < (flash_size = flash_init ())) { if (0 < (flash_size = flash_init ())) {
bd->bi_flashsize = flash_size; bd->bi_flashsize = flash_size;
bd->bi_flashoffset = CONFIG_SYS_FLASH_BASE + flash_size; bd->bi_flashoffset = CONFIG_SYS_FLASH_BASE + flash_size;
# ifdef CONFIG_SYS_FLASH_CHECKSUM
print_size (flash_size, "");
/*
* Compute and print flash CRC if flashchecksum is set to 'y'
*
* NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
*/
s = getenv ("flashchecksum");
if (s && (*s == 'y')) {
printf (" CRC: %08X",
crc32 (0, (const unsigned char *) CONFIG_SYS_FLASH_BASE, flash_size)
);
}
putc ('\n');
# else /* !CONFIG_SYS_FLASH_CHECKSUM */
print_size (flash_size, "\n");
# endif /* CONFIG_SYS_FLASH_CHECKSUM */
} else { } else {
puts ("Flash init FAILED"); puts ("Flash init FAILED");
bd->bi_flashstart = 0; bd->bi_flashstart = 0;
@ -146,10 +173,9 @@ void board_init (void)
#endif #endif
#if defined(CONFIG_CMD_NET) #if defined(CONFIG_CMD_NET)
char *s, *e;
int i;
/* board MAC address */ /* board MAC address */
s = getenv ("ethaddr"); s = getenv ("ethaddr");
printf ("MAC:%s\n",s);
for (i = 0; i < 6; ++i) { for (i = 0; i < 6; ++i) {
bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0; bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0;
if (s) if (s)

16
lib_microblaze/cache.c
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@ -26,6 +26,18 @@
void flush_cache (ulong addr, ulong size) void flush_cache (ulong addr, ulong size)
{ {
/* MicroBlaze have write thruough cache. nothing to do. */ int i;
return; for (i = 0; i < size; i += 4)
asm volatile (
#ifdef CONFIG_ICACHE
"wic %0, r0;"
#endif
"nop;"
#ifdef CONFIG_DCACHE
"wdc %0, r0;"
#endif
"nop;"
:
: "r" (addr + i)
: "memory");
} }