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Convert CONFIG_FSL_USDHC to Kconfig 

This converts the following to Kconfig:
   CONFIG_FSL_USDHC

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2021-11-07 22:59:37 -05:00
parent 75c995a1be
commit 1ed68f9204
21 changed files with 11 additions and 22 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
configs/imx8mm-cl-iot-gate-optee_defconfig
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@ -81,7 +81,7 @@ CONFIG_DM_I2C=y
CONFIG_DM_KEYBOARD=y CONFIG_DM_KEYBOARD=y
CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_ESDHC_IMX=y CONFIG_FSL_USDHC=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_PHYLIB=y CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y CONFIG_PHY_ATHEROS=y

2
configs/imx8mm-cl-iot-gate_defconfig
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@ -84,7 +84,7 @@ CONFIG_DM_I2C=y
CONFIG_DM_KEYBOARD=y CONFIG_DM_KEYBOARD=y
CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_ESDHC_IMX=y CONFIG_FSL_USDHC=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_PHYLIB=y CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y CONFIG_PHY_ATHEROS=y

2
configs/imx8mm_evk_defconfig
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@ -60,7 +60,7 @@ CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_ESDHC_IMX=y CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y CONFIG_PHY_ATHEROS=y
CONFIG_DM_ETH=y CONFIG_DM_ETH=y

2
configs/imx8mn_ddr4_evk_defconfig
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@ -63,7 +63,7 @@ CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_ESDHC_IMX=y CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y CONFIG_PHYLIB=y
CONFIG_DM_ETH=y CONFIG_DM_ETH=y
CONFIG_PINCTRL=y CONFIG_PINCTRL=y

2
configs/imx8mn_evk_defconfig
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@ -65,7 +65,7 @@ CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_ESDHC_IMX=y CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y CONFIG_PHYLIB=y
CONFIG_DM_ETH=y CONFIG_DM_ETH=y
CONFIG_PINCTRL=y CONFIG_PINCTRL=y

2
configs/imx8mp_evk_defconfig
View File

@ -71,7 +71,7 @@ CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_ESDHC_IMX=y CONFIG_FSL_USDHC=y
CONFIG_PHY_REALTEK=y CONFIG_PHY_REALTEK=y
CONFIG_DM_ETH=y CONFIG_DM_ETH=y
CONFIG_DM_ETH_PHY=y CONFIG_DM_ETH_PHY=y

2
configs/imx8qm_rom7720_a1_4G_defconfig
View File

@ -60,7 +60,7 @@ CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y CONFIG_I2C_MUX_PCA954x=y
CONFIG_MISC=y CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_ESDHC_IMX=y CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y CONFIG_PHYLIB=y
CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_ADDR_ENABLE=y
CONFIG_PHY_ATHEROS=y CONFIG_PHY_ATHEROS=y

2
configs/kontron-sl-mx8mm_defconfig
View File

@ -79,7 +79,7 @@ CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_ESDHC_IMX=y CONFIG_FSL_USDHC=y
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_DM_MTD=y CONFIG_DM_MTD=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y

2
configs/phycore-imx8mm_defconfig
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@ -80,7 +80,7 @@ CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_ESDHC_IMX=y CONFIG_FSL_USDHC=y
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_DM_MTD=y CONFIG_DM_MTD=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y

2
configs/phycore-imx8mp_defconfig
View File

@ -81,7 +81,7 @@ CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_ESDHC_IMX=y CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y CONFIG_PHYLIB=y
CONFIG_PHY_TI_DP83867=y CONFIG_PHY_TI_DP83867=y
CONFIG_DM_ETH=y CONFIG_DM_ETH=y

2
configs/verdin-imx8mm_defconfig
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@ -76,7 +76,7 @@ CONFIG_DM_I2C=y
CONFIG_MISC=y CONFIG_MISC=y
CONFIG_I2C_EEPROM=y CONFIG_I2C_EEPROM=y
CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_ESDHC_IMX=y CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y CONFIG_PHYLIB=y
CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_ADDR_ENABLE=y
CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL=y

1
include/configs/brppt2.h
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@ -21,7 +21,6 @@
#define CONFIG_MXC_GPT_HCLK #define CONFIG_MXC_GPT_HCLK
/* MMC */ /* MMC */
#define CONFIG_FSL_USDHC
/* Boot */ /* Boot */

1
include/configs/imx8mm-cl-iot-gate.h
View File

@ -165,7 +165,6 @@
sizeof(CONFIG_SYS_PROMPT) + 16) sizeof(CONFIG_SYS_PROMPT) + 16)
/* USDHC */ /* USDHC */
#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_ESDHC_ADDR 0

1
include/configs/imx8mm_evk.h
View File

@ -81,7 +81,6 @@
sizeof(CONFIG_SYS_PROMPT) + 16) sizeof(CONFIG_SYS_PROMPT) + 16)
/* USDHC */ /* USDHC */
#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_ESDHC_ADDR 0

1
include/configs/imx8mn_evk.h
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@ -80,7 +80,6 @@
sizeof(CONFIG_SYS_PROMPT) + 16) sizeof(CONFIG_SYS_PROMPT) + 16)
/* USDHC */ /* USDHC */
#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_ESDHC_ADDR 0

2
include/configs/imx8mp_evk.h
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@ -97,8 +97,6 @@
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16) sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_ESDHC_ADDR 0

1
include/configs/imx8qm_rom7720.h
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@ -15,7 +15,6 @@
#define CONFIG_SPL_BSS_START_ADDR 0x00128000 #define CONFIG_SPL_BSS_START_ADDR 0x00128000
#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */ #define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */
#define CONFIG_FSL_USDHC
#define CONFIG_SYS_BOOTMAPSZ (256 << 20) #define CONFIG_SYS_BOOTMAPSZ (256 << 20)
#define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define USDHC1_BASE_ADDR 0x5B010000 #define USDHC1_BASE_ADDR 0x5B010000

1
include/configs/kontron-sl-mx8mm.h
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@ -54,7 +54,6 @@
#define CONFIG_SYS_BOOTM_LEN SZ_64M #define CONFIG_SYS_BOOTM_LEN SZ_64M
#define CONFIG_SPL_MAX_SIZE (148 * SZ_1K) #define CONFIG_SPL_MAX_SIZE (148 * SZ_1K)
#define CONFIG_FSL_USDHC
#ifdef CONFIG_SPL_BUILD #ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_STACK 0x91fff0 #define CONFIG_SPL_STACK 0x91fff0

1
include/configs/phycore_imx8mm.h
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@ -103,7 +103,6 @@
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* USDHC */ /* USDHC */
#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1

1
include/configs/phycore_imx8mp.h
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@ -103,7 +103,6 @@
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* USDHC */ /* USDHC */
#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1

1
include/configs/verdin-imx8mm.h
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@ -101,7 +101,6 @@
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16) sizeof(CONFIG_SYS_PROMPT) + 16)
/* USDHC */ /* USDHC */
#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1