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sf: Add support for MX66U51235F, MX66L1G45G, MT25QU02G, MT25QL02G 

This commit adds support for the Macronix MX66U51235F,
MX66L1G45G and Micron MT25QU02G, MT25QL02G flash parts.

Signed-off-by: Radu Bacrau <dumitru.bacrau@intel.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Radu Bacrau <radu.bacrau@gmail.com>
[Update proper commit header and 80-line cut on body]
Reviewed-by: Jagan Teki <jagan@openedev.com>
This commit is contained in:
Radu Bacrau 2016-11-21 18:27:19 -06:00 committed by Jagan Teki
parent 2334c4e705
commit 1f3232d2a1
1 changed files with 4 additions and 0 deletions
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4
drivers/mtd/spi/spi_flash_ids.c
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@ -82,6 +82,8 @@ const struct spi_flash_info spi_flash_ids[] = {
{"mx25l25635f", INFO(0xc22019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP) }, {"mx25l25635f", INFO(0xc22019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP) },
{"mx25l51235f", INFO(0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP) }, {"mx25l51235f", INFO(0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP) },
{"mx25l12855e", INFO(0xc22618, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) }, {"mx25l12855e", INFO(0xc22618, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
{"mx66u51235f", INFO(0xc2253a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP) },
{"mx66l1g45g", INFO(0xc2201b, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP) },
#endif #endif
#ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */ #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
{"s25fl008a", INFO(0x010213, 0x0, 64 * 1024, 16, 0) }, {"s25fl008a", INFO(0x010213, 0x0, 64 * 1024, 16, 0) },
@ -129,6 +131,8 @@ const struct spi_flash_info spi_flash_ids[] = {
{"n25q512a", INFO(0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, {"n25q512a", INFO(0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
{"n25q1024", INFO(0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, {"n25q1024", INFO(0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
{"n25q1024a", INFO(0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, {"n25q1024a", INFO(0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
{"mt25qu02g", INFO(0x20bb22, 0x0, 64 * 1024, 4096, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
{"mt25ql02g", INFO(0x20ba22, 0x0, 64 * 1024, 4096, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
#endif #endif
#ifdef CONFIG_SPI_FLASH_SST /* SST */ #ifdef CONFIG_SPI_FLASH_SST /* SST */
{"sst25vf040b", INFO(0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) }, {"sst25vf040b", INFO(0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) },