x86: Move P2SB from Apollo Lake to a more generic location

The Primary to Sideband Bridge (P2SB) is not specific to Apollo Lake, so
move its driver to a common location within arch/x86.

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

arch/x86/Kconfig

@@ -715,6 +715,13 @@ config HAVE_ITSS
 	  Select this to include the driver for the Interrupt Timer
 	  Subsystem (ITSS) which is found on several Intel devices.
 
+config HAVE_P2SB
+	bool "Enable P2SB"
+	help
+	  Select this to include the driver for the Primary to
+	  Sideband Bridge (P2SB) which is found on several Intel
+	  devices.
+
 menu "System tables"
 	depends on !EFI && !SYS_COREBOOT
 

arch/x86/cpu/apollolake/Kconfig

@@ -40,6 +40,7 @@ config INTEL_APOLLOLAKE
 	imply INTEL_GPIO
 	imply SMP
 	imply HAVE_ITSS
+	imply HAVE_P2SB
 
 if INTEL_APOLLOLAKE
 

arch/x86/cpu/apollolake/Makefile

@@ -20,7 +20,6 @@ endif
 
 obj-y += hostbridge.o
 obj-y += lpc.o
-obj-y += p2sb.o
 obj-y += pch.o
 obj-y += pmc.o
 obj-y += uart.o

arch/x86/cpu/intel_common/Makefile

@@ -28,6 +28,7 @@ endif
 endif
 obj-y += pch.o
 obj-$(CONFIG_HAVE_ITSS) += itss.o
+obj-$(CONFIG_HAVE_P2SB) += p2sb.o
 
 ifdef CONFIG_SPL
 ifndef CONFIG_SPL_BUILD