davinci: Fix omapl138_lcdk builds
The omapl138_lcdk platform is not a DA850 SoC so we need to select
SOC_DA8XX and not SOC_DA850, as it was before.  It does however point
out a bit of a misnomer in how all of these PLL defines are named as
they are generic to DA8xx, not DA850 centric.  Remove the 'if SOC_DA850'
under the defaults as these are simply the defaults.  As SOC_DA8XX will
select SYS_DA850_DDR_INIT when needed, we do not need it under both SOC
options.
Fixes: 76e22222d3 ("Convert CONFIG_SYS_DV_CLKMODE et al to Kconfig")
Signed-off-by: Tom Rini <trini@konsulko.com>
			
			
This commit is contained in:
		
							parent
							
								
									ab21ecef7a
								
							
						
					
					
						commit
						2e87980580
					
				|  | @ -24,7 +24,7 @@ config TARGET_EA20 | ||||||
| 
 | 
 | ||||||
| config TARGET_OMAPL138_LCDK | config TARGET_OMAPL138_LCDK | ||||||
| 	bool "OMAPL138 LCDK" | 	bool "OMAPL138 LCDK" | ||||||
| 	select SOC_DA850 | 	select SOC_DA8XX | ||||||
| 	select SUPPORT_SPL | 	select SUPPORT_SPL | ||||||
| 
 | 
 | ||||||
| config TARGET_CALIMAIN | config TARGET_CALIMAIN | ||||||
|  | @ -54,7 +54,6 @@ config SYS_DA850_DDR_INIT | ||||||
| config SOC_DA850 | config SOC_DA850 | ||||||
| 	bool | 	bool | ||||||
| 	select SOC_DA8XX | 	select SOC_DA8XX | ||||||
| 	select SYS_DA850_DDR_INIT if SUPPORT_SPL || DA850_LOWLEVEL |  | ||||||
| 
 | 
 | ||||||
| config SOC_DA8XX | config SOC_DA8XX | ||||||
| 	bool | 	bool | ||||||
|  | @ -68,79 +67,79 @@ comment "DA850 PLL Initialization Parameters" | ||||||
| 
 | 
 | ||||||
| config SYS_DV_CLKMODE | config SYS_DV_CLKMODE | ||||||
| 	int "PLLCTL Clock Mode" | 	int "PLLCTL Clock Mode" | ||||||
| 	default 0 if SOC_DA850 | 	default 0 | ||||||
| 	help | 	help | ||||||
| 	  Set PLLCTL Clock Mode bit as External Clock or On Chip oscillator | 	  Set PLLCTL Clock Mode bit as External Clock or On Chip oscillator | ||||||
| 
 | 
 | ||||||
| config SYS_DA850_PLL0_POSTDIV | config SYS_DA850_PLL0_POSTDIV | ||||||
| 	int "PLLC0 PLL Post-Divider" | 	int "PLLC0 PLL Post-Divider" | ||||||
| 	default 1 if SOC_DA850 | 	default 1 | ||||||
| 	help | 	help | ||||||
| 	  Value written to PLLC0 PLL Post-Divider Control Register | 	  Value written to PLLC0 PLL Post-Divider Control Register | ||||||
| 
 | 
 | ||||||
| config SYS_DA850_PLL0_PLLDIV1 | config SYS_DA850_PLL0_PLLDIV1 | ||||||
| 	hex "PLLC0 Divider 1" | 	hex "PLLC0 Divider 1" | ||||||
| 	default 0x8000 if SOC_DA850 | 	default 0x8000 | ||||||
| 	help | 	help | ||||||
| 	  Value written to PLLC0 Divider 1 register | 	  Value written to PLLC0 Divider 1 register | ||||||
| 
 | 
 | ||||||
| config SYS_DA850_PLL0_PLLDIV2 | config SYS_DA850_PLL0_PLLDIV2 | ||||||
| 	hex "PLLC0 Divider 2" | 	hex "PLLC0 Divider 2" | ||||||
| 	default 0x8001 if SOC_DA850 | 	default 0x8001 | ||||||
| 	help | 	help | ||||||
| 	  Value written to PLLC0 Divider 2 register | 	  Value written to PLLC0 Divider 2 register | ||||||
| 
 | 
 | ||||||
| config SYS_DA850_PLL0_PLLDIV3 | config SYS_DA850_PLL0_PLLDIV3 | ||||||
| 	hex "PLLC0 Divider 3" | 	hex "PLLC0 Divider 3" | ||||||
| 	default 0x8002 if SOC_DA850 | 	default 0x8002 | ||||||
| 	help | 	help | ||||||
| 	  Value written to PLLC0 Divider 3 register | 	  Value written to PLLC0 Divider 3 register | ||||||
| 
 | 
 | ||||||
| config SYS_DA850_PLL0_PLLDIV4 | config SYS_DA850_PLL0_PLLDIV4 | ||||||
| 	hex "PLLC0 Divider 4" | 	hex "PLLC0 Divider 4" | ||||||
| 	default 0x8003 if SOC_DA850 | 	default 0x8003 | ||||||
| 	help | 	help | ||||||
| 	  Value written to PLLC0 Divider 4 register | 	  Value written to PLLC0 Divider 4 register | ||||||
| 
 | 
 | ||||||
| config SYS_DA850_PLL0_PLLDIV5 | config SYS_DA850_PLL0_PLLDIV5 | ||||||
| 	hex "PLLC0 Divider 5" | 	hex "PLLC0 Divider 5" | ||||||
| 	default 0x8002 if SOC_DA850 | 	default 0x8002 | ||||||
| 	help | 	help | ||||||
| 	  Value written to PLLC0 Divider 5 register | 	  Value written to PLLC0 Divider 5 register | ||||||
| 
 | 
 | ||||||
| config SYS_DA850_PLL0_PLLDIV6 | config SYS_DA850_PLL0_PLLDIV6 | ||||||
| 	hex "PLLC0 Divider 6" | 	hex "PLLC0 Divider 6" | ||||||
| 	default 0x8000 if SOC_DA850 | 	default 0x8000 | ||||||
| 	help | 	help | ||||||
| 	  Value written to PLLC0 Divider 6 register | 	  Value written to PLLC0 Divider 6 register | ||||||
| 
 | 
 | ||||||
| config SYS_DA850_PLL0_PLLDIV7 | config SYS_DA850_PLL0_PLLDIV7 | ||||||
| 	hex "PLLC0 Divider 7" | 	hex "PLLC0 Divider 7" | ||||||
| 	default 0x8005 if SOC_DA850 | 	default 0x8005 | ||||||
| 	help | 	help | ||||||
| 	  Value written to PLLC0 Divider 7 register | 	  Value written to PLLC0 Divider 7 register | ||||||
| 
 | 
 | ||||||
| config SYS_DA850_PLL1_POSTDIV | config SYS_DA850_PLL1_POSTDIV | ||||||
| 	hex "PLLC1 PLL Post-Divider" | 	hex "PLLC1 PLL Post-Divider" | ||||||
| 	default 1 if SOC_DA850 | 	default 1 | ||||||
| 	help | 	help | ||||||
| 	  Value written to PLLC1 PLL Post-Divider Control Register | 	  Value written to PLLC1 PLL Post-Divider Control Register | ||||||
| 
 | 
 | ||||||
| config SYS_DA850_PLL1_PLLDIV1 | config SYS_DA850_PLL1_PLLDIV1 | ||||||
| 	hex "PLLC1 Divider 2" | 	hex "PLLC1 Divider 2" | ||||||
| 	default 0x8000 if SOC_DA850 | 	default 0x8000 | ||||||
| 	help | 	help | ||||||
| 	  Value written to PLLC1 Divider 1 register | 	  Value written to PLLC1 Divider 1 register | ||||||
| 
 | 
 | ||||||
| config SYS_DA850_PLL1_PLLDIV2 | config SYS_DA850_PLL1_PLLDIV2 | ||||||
| 	hex "PLLC1 Divider 2" | 	hex "PLLC1 Divider 2" | ||||||
| 	default 0x8001 if SOC_DA850 | 	default 0x8001 | ||||||
| 	help | 	help | ||||||
| 	  Value written to PLLC1 Divider 2 register | 	  Value written to PLLC1 Divider 2 register | ||||||
| 
 | 
 | ||||||
| config SYS_DA850_PLL1_PLLDIV3 | config SYS_DA850_PLL1_PLLDIV3 | ||||||
| 	hex "PLLC1 Divider 3" | 	hex "PLLC1 Divider 3" | ||||||
| 	default 0x8002 if SOC_DA850 | 	default 0x8002 | ||||||
| 	help | 	help | ||||||
| 	  Value written to PLLC1 Divider 3 register | 	  Value written to PLLC1 Divider 3 register | ||||||
| 
 | 
 | ||||||
|  |  | ||||||
		Loading…
	
		Reference in New Issue