diff --git a/board/nm/nmhw21/board.c b/board/nm/nmhw21/board.c
index d827ae78b0..3a7edf2fc1 100644
--- a/board/nm/nmhw21/board.c
+++ b/board/nm/nmhw21/board.c
@@ -142,6 +142,13 @@ DECLARE_GLOBAL_DATA_PTR;
 #error Recovery boot time must be larger than factory reset + 1 second
 #endif
 
+/*
+ * CPU Reset Reason
+ */
+
+#define CPU_GLOBAL_COLD_RST		0x01
+#define CPU_GLOBAL_WARM_SW_RST		0x02
+#define CPU_WDT1_RESET			0x10
 
 
 #if !defined(CONFIG_SPL_BUILD)
@@ -469,6 +476,7 @@ static void check_reset_reason(unsigned int reset_reason_shm_location)
 	volatile struct reset_registers* reset_regs = (struct reset_registers*)reset_reason_shm_location;
 	uint32_t start_reason = 0;
 	uint32_t reset_reason = 0;
+	uint32_t cpu_reset_reason = 0;
 	uint8_t state = 0x00;
 	int bus;
 	int ret;
@@ -507,13 +515,18 @@ static void check_reset_reason(unsigned int reset_reason_shm_location)
 		}
 	}
 
-	/* CPU reset reason -> PRM_RSTST ; watchdog reset = 0x00000010*/
-	int cpu_reset_reason = readl(PRM_RSTST);
-	if (cpu_reset_reason & 0x10) {
+	/*
+	 * Check CPU reset reason register as the device can be reset
+	 * by a CPU watchdog
+	 */
+	cpu_reset_reason = readl(PRM_RSTST);
+	if (cpu_reset_reason & CPU_WDT1_RESET) {
 		start_reason |= SR_WATCHDOG;
 	}
-	/* reset the reset reason register */
-	writel(0x13, PRM_RSTST);
+
+	/* clear the CPU reset reason register */
+	writel((CPU_WDT1_RESET | CPU_GLOBAL_COLD_RST | CPU_GLOBAL_WARM_SW_RST), PRM_RSTST);
+
 
 	/*
 	 * Check Wakeup Events