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hw20,22,24,26(21): disable pull-down on timepulse 

The pull-down enabled on the timepulse signal causes newer gnss modules
to fail to boot. Therefore this patch disables this pull-down on
all sitara designs that have a timepulse signal.
The patch also disables the pull-ups on the gnss uart rx/tx lines as those
are also not needed.

(The initial fix for this for hw26 was done on the U-Boot for oem linux in
commit f47237771c)

id: 508571
This commit is contained in:
Marcel Reichmuth 2024-02-29 08:49:52 +01:00
parent 66fb8f8532
commit 3134deeab7
4 changed files with 27 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
board/nm/nmhw21/mux.c
View File

@ -40,7 +40,7 @@ static struct module_pin_mux gpio_pin_mux[] = {
* (V17) GPIO1_27: WLAN_IRQ * (V17) GPIO1_27: WLAN_IRQ
* (U18) GPIO1_28: LED0.RD * (U18) GPIO1_28: LED0.RD
* *
* (U3) GPIO2_16: TIMEPULSE (HW26) * (U3) GPIO2_16: TIMEPULSE (HW26), see note [1]
* (R6) GPIO2_25: RST_ETH~ * (R6) GPIO2_25: RST_ETH~
* *
* (J17) GPIO3_4: GNSS_EXTINT * (J17) GPIO3_4: GNSS_EXTINT
@ -48,6 +48,9 @@ static struct module_pin_mux gpio_pin_mux[] = {
* (L18) GPIO3_10: CTRL.RST * (L18) GPIO3_10: CTRL.RST
* (C12) GPIO3_17: UI_RST~ * (C12) GPIO3_17: UI_RST~
* (A14) GPIO3_21: RST_HUB~ (USB) * (A14) GPIO3_21: RST_HUB~ (USB)
*
* [1] No PU/PD allowed as TIMEPULSE is internally connected with SAFEBOOT_N.
* SAFEBOOT_N must be left open/floating.
*/ */
/* Bank 0 */ /* Bank 0 */
@ -73,7 +76,7 @@ static struct module_pin_mux gpio_pin_mux[] = {
/* TODO: What about all the unused GPMC pins ? */ /* TODO: What about all the unused GPMC pins ? */
/* Bank 2 */ /* Bank 2 */
{OFFSET(lcd_data10), (MODE(7) | PULLUDEN | PULLDOWN_EN | RXACTIVE)}, /* (U3) GPIO2_16: TIMEPULSE input */ {OFFSET(lcd_data10), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (U3) GPIO2_16: TIMEPULSE */
{OFFSET(lcd_ac_bias_en), (MODE(7) | PULLUDDIS)}, /* (R6) GPIO2_25: RST_ETH~ */ {OFFSET(lcd_ac_bias_en), (MODE(7) | PULLUDDIS)}, /* (R6) GPIO2_25: RST_ETH~ */
#if 0 #if 0
@ -203,8 +206,8 @@ static struct module_pin_mux uart2_pin_mux[] = {
/* UART3: GNSS */ /* UART3: GNSS */
static struct module_pin_mux uart3_pin_mux[] = { static struct module_pin_mux uart3_pin_mux[] = {
{OFFSET(mii1_rxd3), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (L17) UART3_RXD */ {OFFSET(mii1_rxd3), (MODE(1) | PULLUDDIS | RXACTIVE)}, /* (L17) UART3_RXD */
{OFFSET(mii1_rxd2), (MODE(1) | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (L16) UART3_TXD */ {OFFSET(mii1_rxd2), (MODE(1) | PULLUDDIS | SLEWCTRL)}, /* (L16) UART3_TXD */
{-1} {-1}
}; };

11
board/nm/nrhw20/mux.c
View File

@ -29,7 +29,7 @@ static struct module_pin_mux gpio_pin_mux[] = {
* (B17) GPIO0_3: GEOFENCE_GNSS * (B17) GPIO0_3: GEOFENCE_GNSS
* (B16) GPIO0_4: RTK_STAT_GNSS * (B16) GPIO0_4: RTK_STAT_GNSS
* (A16) GPIO0_5: EXTINT_GNSS * (A16) GPIO0_5: EXTINT_GNSS
* (C15) GPIO0_6: TIMEPULSE * (C15) GPIO0_6: TIMEPULSE, see note [1]
* (C18) GPIO0_7: PWM / SHIELD LATCH * (C18) GPIO0_7: PWM / SHIELD LATCH
* (J18) GPIO0_16: RST_PHY~ * (J18) GPIO0_16: RST_PHY~
* (K15) GPIO0_17: PMIC FAULT * (K15) GPIO0_17: PMIC FAULT
@ -48,6 +48,9 @@ static struct module_pin_mux gpio_pin_mux[] = {
* (L18) GPIO3_10: PCIe_IO.RST * (L18) GPIO3_10: PCIe_IO.RST
* (C12) GPIO3_17: SIM_SEL * (C12) GPIO3_17: SIM_SEL
* (A14) GPIO3_21: RST_HUB~ (USB) * (A14) GPIO3_21: RST_HUB~ (USB)
*
* [1] No PU/PD allowed as TIMEPULSE is internally connected with SAFEBOOT_N.
* SAFEBOOT_N must be left open/floating.
*/ */
/* Bank 0 */ /* Bank 0 */
@ -55,7 +58,7 @@ static struct module_pin_mux gpio_pin_mux[] = {
{OFFSET(spi0_d0), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (B17) gpio0[3] */ /* GEOFENCE_GNSS */ {OFFSET(spi0_d0), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (B17) gpio0[3] */ /* GEOFENCE_GNSS */
{OFFSET(spi0_d1), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (B16) gpio0[4] */ /* RTK_STAT_GNSS */ {OFFSET(spi0_d1), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (B16) gpio0[4] */ /* RTK_STAT_GNSS */
{OFFSET(spi0_cs0), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* (A16) gpio0[5] */ /* EXTINT_GNSS */ {OFFSET(spi0_cs0), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* (A16) gpio0[5] */ /* EXTINT_GNSS */
{OFFSET(spi0_cs1), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (C15) gpio0[6] */ /* TIMEPULSE */ {OFFSET(spi0_cs1), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (C15) gpio0[6] */ /* TIMEPULSE */
{OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (C18) gpio0[7] */ /* IO_SHIELD */ {OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (C18) gpio0[7] */ /* IO_SHIELD */
{OFFSET(mii1_txd3), (MODE(7) | PULLUDDIS)}, /* (J18) gpio0[16] */ /* RST_PHY~ */ {OFFSET(mii1_txd3), (MODE(7) | PULLUDDIS)}, /* (J18) gpio0[16] */ /* RST_PHY~ */
{OFFSET(mii1_txd2), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (K15) gpio0[17] */ /* PMIC_FAULT */ {OFFSET(mii1_txd2), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (K15) gpio0[17] */ /* PMIC_FAULT */
@ -191,8 +194,8 @@ static struct module_pin_mux uart1_pin_mux[] = {
/* UART3: GNSS */ /* UART3: GNSS */
static struct module_pin_mux uart3_pin_mux[] = { static struct module_pin_mux uart3_pin_mux[] = {
{OFFSET(mii1_rxd3), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (L17) UART3_RXD */ {OFFSET(mii1_rxd3), (MODE(1) | PULLUDDIS | RXACTIVE)}, /* (L17) UART3_RXD */
{OFFSET(mii1_rxd2), (MODE(1) | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (L16) UART3_TXD */ {OFFSET(mii1_rxd2), (MODE(1) | PULLUDDIS | SLEWCTRL)}, /* (L16) UART3_TXD */
{-1} {-1}
}; };

10
board/nm/nrhw22/mux.c
View File

@ -27,15 +27,17 @@ static struct module_pin_mux gpio_pin_mux[] = {
* *
* (A17) GPIO0_2: RST_GNSS~ * (A17) GPIO0_2: RST_GNSS~
* (A16) GPIO0_5: EXTINT_GNSS * (A16) GPIO0_5: EXTINT_GNSS
* (C15) GPIO0_6: TIMEPULSE * (C15) GPIO0_6: TIMEPULSE, see note [1]
* (J18) GPIO0_16: RST_PHY~ * (J18) GPIO0_16: RST_PHY~
* *
* [1] No PU/PD allowed as TIMEPULSE is internally connected with SAFEBOOT_N.
* SAFEBOOT_N must be left open/floating.
*/ */
/* Bank 0 */ /* Bank 0 */
{OFFSET(spi0_sclk), (MODE(7) | PULLUDDIS)}, /* (A17) gpio0[2] */ /* RST_GNSS */ {OFFSET(spi0_sclk), (MODE(7) | PULLUDDIS)}, /* (A17) gpio0[2] */ /* RST_GNSS */
{OFFSET(spi0_cs0), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* (A16) gpio0[5] */ /* EXTINT_GNSS */ {OFFSET(spi0_cs0), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* (A16) gpio0[5] */ /* EXTINT_GNSS */
{OFFSET(spi0_cs1), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (C15) gpio0[6] */ /* TIMEPULSE */ {OFFSET(spi0_cs1), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (C15) gpio0[6] */ /* TIMEPULSE */
{OFFSET(mii1_txd3), (MODE(7) | PULLUDDIS)}, /* (J18) gpio0[16] */ /* RST_PHY~ */ {OFFSET(mii1_txd3), (MODE(7) | PULLUDDIS)}, /* (J18) gpio0[16] */ /* RST_PHY~ */
{OFFSET(mii1_txd2), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (K15) gpio0[17] */ /* PMIC_FAULT */ {OFFSET(mii1_txd2), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (K15) gpio0[17] */ /* PMIC_FAULT */
@ -101,8 +103,8 @@ static struct module_pin_mux uart0_pin_mux[] = {
/* UART1: GNSS */ /* UART1: GNSS */
static struct module_pin_mux uart1_pin_mux[] = { static struct module_pin_mux uart1_pin_mux[] = {
{OFFSET(uart1_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (D16) uart1_rxd */ {OFFSET(uart1_rxd), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* (D16) uart1_rxd */
{OFFSET(uart1_txd), (MODE(0) | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (D15) uart1_txd */ {OFFSET(uart1_txd), (MODE(0) | PULLUDDIS | SLEWCTRL)}, /* (D15) uart1_txd */
{-1}, {-1},
}; };

11
board/nm/nrhw24/mux.c
View File

@ -27,7 +27,7 @@ static struct module_pin_mux gpio_pin_mux[] = {
* *
* (A17) GPIO0_2: RST_GNSS~ * (A17) GPIO0_2: RST_GNSS~
* (A16) GPIO0_5: EXTINT_GNSS * (A16) GPIO0_5: EXTINT_GNSS
* (C15) GPIO0_6: TIMEPULSE * (C15) GPIO0_6: TIMEPULSE, see note [1]
* (C18) GPIO0_7: PWM / SHIELD LATCH * (C18) GPIO0_7: PWM / SHIELD LATCH
* (J18) GPIO0_16: RST_PHY~ * (J18) GPIO0_16: RST_PHY~
* (U12) GPIO0_27: RST_SHIELD~ * (U12) GPIO0_27: RST_SHIELD~
@ -39,12 +39,15 @@ static struct module_pin_mux gpio_pin_mux[] = {
* (V17) GPIO1_27: WLAN_IRQ * (V17) GPIO1_27: WLAN_IRQ
* *
* (C12) GPIO3_17: SIM_SEL * (C12) GPIO3_17: SIM_SEL
*
* [1] No PU/PD allowed as TIMEPULSE is internally connected with SAFEBOOT_N.
* SAFEBOOT_N must be left open/floating.
*/ */
/* Bank 0 */ /* Bank 0 */
{OFFSET(spi0_sclk), (MODE(7) | PULLUDDIS)}, /* (A17) gpio0[2] */ /* RST_GNSS */ {OFFSET(spi0_sclk), (MODE(7) | PULLUDDIS)}, /* (A17) gpio0[2] */ /* RST_GNSS */
{OFFSET(spi0_cs0), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* (A16) gpio0[5] */ /* EXTINT_GNSS */ {OFFSET(spi0_cs0), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* (A16) gpio0[5] */ /* EXTINT_GNSS */
{OFFSET(spi0_cs1), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (C15) gpio0[6] */ /* TIMEPULSE */ {OFFSET(spi0_cs1), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (C15) gpio0[6] */ /* TIMEPULSE */
{OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (C18) gpio0[7] */ /* IO_SHIELD */ {OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (C18) gpio0[7] */ /* IO_SHIELD */
{OFFSET(mii1_txd3), (MODE(7) | PULLUDDIS)}, /* (J18) gpio0[16] */ /* RST_PHY~ */ {OFFSET(mii1_txd3), (MODE(7) | PULLUDDIS)}, /* (J18) gpio0[16] */ /* RST_PHY~ */
{OFFSET(gpmc_ad11), (MODE(7) | PULLUDDIS)}, /* (U12) gpio0[27] */ /* RST_SHIELD~ */ {OFFSET(gpmc_ad11), (MODE(7) | PULLUDDIS)}, /* (U12) gpio0[27] */ /* RST_SHIELD~ */
@ -172,8 +175,8 @@ static struct module_pin_mux uart1_pin_mux[] = {
/* UART3: GNSS */ /* UART3: GNSS */
static struct module_pin_mux uart3_pin_mux[] = { static struct module_pin_mux uart3_pin_mux[] = {
{OFFSET(mii1_rxd3), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (L17) UART3_RXD */ {OFFSET(mii1_rxd3), (MODE(1) | PULLUDDIS | RXACTIVE)}, /* (L17) UART3_RXD */
{OFFSET(mii1_rxd2), (MODE(1) | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (L16) UART3_TXD */ {OFFSET(mii1_rxd2), (MODE(1) | PULLUDDIS | SLEWCTRL)}, /* (L16) UART3_TXD */
{-1} {-1}
}; };