arm: dts: k3-j784s4: Correct wakeup pin mux nodes
The OSPI0 and OSPI1 pinux are added to wkup_pmx0, which is
inappropriate as per the updated wakeup pin mux range based on
commit 6773a2c485 ("arm: dts: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets")
Update the wkup_pmx0 and wkup_pmx1 nodes to fix this.
Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
This commit is contained in:
parent
9878ad5c08
commit
315da8ebb5
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@ -109,6 +109,10 @@
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bootph-pre-ram;
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};
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&wkup_pmx1 {
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bootph-pre-ram;
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};
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&wkup_pmx2 {
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bootph-pre-ram;
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};
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@ -357,21 +357,27 @@
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J784S4_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (E34) MCU_OSPI0_D6 */
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J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (E33) MCU_OSPI0_D7 */
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J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (C34) MCU_OSPI0_DQS */
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J784S4_WKUP_IOPAD(0x03c, PIN_OUTPUT, 6) /* (C32) MCU_OSPI0_ECC_FAIL */
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J784S4_WKUP_IOPAD(0x038, PIN_OUTPUT, 6) /* (B34) MCU_OSPI0_RESET_OUT0 */
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>;
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};
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};
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&wkup_pmx1 {
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mcu_fss0_ospi0_pins1_default: mcu-fss0-ospi0-pins1-default {
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pinctrl-single,pins = <
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J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 6) /* (B34) MCU_OSPI0_RESET_OUT0 */
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J784S4_WKUP_IOPAD(0x004, PIN_OUTPUT, 6) /* (C32) MCU_OSPI0_ECC_FAIL */
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>;
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};
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mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default {
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pinctrl-single,pins = <
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J784S4_WKUP_IOPAD(0x040, PIN_OUTPUT, 0) /* (F32) MCU_OSPI1_CLK */
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J784S4_WKUP_IOPAD(0x05c, PIN_OUTPUT, 0) /* (G32) MCU_OSPI1_CSn0 */
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J784S4_WKUP_IOPAD(0x04c, PIN_INPUT, 0) /* (E35) MCU_OSPI1_D0 */
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J784S4_WKUP_IOPAD(0x050, PIN_INPUT, 0) /* (D31) MCU_OSPI1_D1 */
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J784S4_WKUP_IOPAD(0x054, PIN_INPUT, 0) /* (G31) MCU_OSPI1_D2 */
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J784S4_WKUP_IOPAD(0x058, PIN_INPUT, 0) /* (F33) MCU_OSPI1_D3 */
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J784S4_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (F31) MCU_OSPI1_DQS */
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J784S4_WKUP_IOPAD(0x044, PIN_INPUT, 0) /* (C31) MCU_OSPI1_LBCLKO */
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J784S4_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (F32) MCU_OSPI1_CLK */
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J784S4_WKUP_IOPAD(0x024, PIN_OUTPUT, 0) /* (G32) MCU_OSPI1_CSn0 */
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J784S4_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (E35) MCU_OSPI1_D0 */
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J784S4_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (D31) MCU_OSPI1_D1 */
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J784S4_WKUP_IOPAD(0x01C, PIN_INPUT, 0) /* (G31) MCU_OSPI1_D2 */
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J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (F33) MCU_OSPI1_D3 */
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J784S4_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (F31) MCU_OSPI1_DQS */
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J784S4_WKUP_IOPAD(0x00C, PIN_INPUT, 0) /* (C31) MCU_OSPI1_LBCLKO */
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>;
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};
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};
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@ -684,7 +690,7 @@
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&ospi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
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pinctrl-0 = <&mcu_fss0_ospi0_pins_default>, <&mcu_fss0_ospi0_pins1_default>;
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flash@0{
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compatible = "jedec,spi-nor";
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