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AT91: change common at91sam9261 files to compile with new scheme 

Signed-off-by: Asen Dimov <dimov@ronetix.at>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
This commit is contained in:
Asen Dimov 2011-07-26 01:23:39 +00:00 committed by U-Boot
parent b38d634b39
commit 3ad24802aa
2 changed files with 38 additions and 41 deletions
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76
arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c
View File

@ -23,77 +23,73 @@
*/ */
#include <common.h> #include <common.h>
#include <asm/io.h>
#include <asm/arch/at91_common.h> #include <asm/arch/at91_common.h>
#include <asm/arch/at91_pmc.h> #include <asm/arch/at91_pmc.h>
#include <asm/arch/gpio.h> #include <asm/arch/gpio.h>
#include <asm/arch/io.h>
/*
* if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
* peripheral pins. Good to have if hardware is soldered optionally
* or in case of SPI no slave is selected. Avoid lines to float
* needlessly. Use a short local PUP define.
*
* Due to errata "TXD floats when CTS is inactive" pullups are always
* on for TXD pins.
*/
#ifdef CONFIG_AT91_GPIO_PULLUP
# define PUP CONFIG_AT91_GPIO_PULLUP
#else
# define PUP 0
#endif
void at91_serial0_hw_init(void) void at91_serial0_hw_init(void)
{ {
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTC, 8, 1); /* TXD0 */ at91_set_a_periph(AT91_PIO_PORTC, 8, 1); /* TXD0 */
at91_set_a_periph(AT91_PIO_PORTC, 9, 0); /* RXD0 */ at91_set_a_periph(AT91_PIO_PORTC, 9, 0); /* RXD0 */
writel(1 << AT91SAM9261_ID_US0, &pmc->pcer); writel(1 << ATMEL_ID_USART0, &pmc->pcer);
} }
void at91_serial1_hw_init(void) void at91_serial1_hw_init(void)
{ {
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTC, 12, 1); /* TXD1 */ at91_set_a_periph(AT91_PIO_PORTC, 12, 1); /* TXD1 */
at91_set_a_periph(AT91_PIO_PORTC, 13, 0); /* RXD1 */ at91_set_a_periph(AT91_PIO_PORTC, 13, 0); /* RXD1 */
writel(1 << AT91SAM9261_ID_US1, &pmc->pcer); writel(1 << ATMEL_ID_USART1, &pmc->pcer);
} }
void at91_serial2_hw_init(void) void at91_serial2_hw_init(void)
{ {
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTC, 14, 1); /* TXD2 */ at91_set_a_periph(AT91_PIO_PORTC, 14, 1); /* TXD2 */
at91_set_a_periph(AT91_PIO_PORTC, 15, 0); /* RXD2 */ at91_set_a_periph(AT91_PIO_PORTC, 15, 0); /* RXD2 */
writel(1 << AT91SAM9261_ID_US2, &pmc->pcer); writel(1 << ATMEL_ID_USART2, &pmc->pcer);
} }
void at91_serial3_hw_init(void) void at91_seriald_hw_init(void)
{ {
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTA, 9, 0); /* DRXD */ at91_set_a_periph(AT91_PIO_PORTA, 9, 0); /* DRXD */
at91_set_a_periph(AT91_PIO_PORTA, 10, 1); /* DTXD */ at91_set_a_periph(AT91_PIO_PORTA, 10, 1); /* DTXD */
writel(1 << AT91_ID_SYS, &pmc->pcer); writel(1 << ATMEL_ID_SYS, &pmc->pcer);
} }
void at91_serial_hw_init(void) #if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
{
#ifdef CONFIG_USART0
at91_serial0_hw_init();
#endif
#ifdef CONFIG_USART1
at91_serial1_hw_init();
#endif
#ifdef CONFIG_USART2
at91_serial2_hw_init();
#endif
#ifdef CONFIG_USART3 /* DBGU */
at91_serial3_hw_init();
#endif
}
#ifdef CONFIG_HAS_DATAFLASH
void at91_spi0_hw_init(unsigned long cs_mask) void at91_spi0_hw_init(unsigned long cs_mask)
{ {
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTA, 0, 0); /* SPI0_MISO */ at91_set_a_periph(AT91_PIO_PORTA, 0, PUP); /* SPI0_MISO */
at91_set_a_periph(AT91_PIO_PORTA, 1, 0); /* SPI0_MOSI */ at91_set_a_periph(AT91_PIO_PORTA, 1, PUP); /* SPI0_MOSI */
at91_set_a_periph(AT91_PIO_PORTA, 2, 0); /* SPI0_SPCK */ at91_set_a_periph(AT91_PIO_PORTA, 2, PUP); /* SPI0_SPCK */
/* Enable clock */ /* Enable clock */
writel(1 << AT91SAM9261_ID_SPI0, &pmc->pcer); writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
if (cs_mask & (1 << 0)) { if (cs_mask & (1 << 0)) {
at91_set_a_periph(AT91_PIO_PORTA, 3, 1); at91_set_a_periph(AT91_PIO_PORTA, 3, 1);
@ -123,14 +119,14 @@ void at91_spi0_hw_init(unsigned long cs_mask)
void at91_spi1_hw_init(unsigned long cs_mask) void at91_spi1_hw_init(unsigned long cs_mask)
{ {
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTB, 30, 0); /* SPI1_MISO */ at91_set_a_periph(AT91_PIO_PORTB, 30, PUP); /* SPI1_MISO */
at91_set_a_periph(AT91_PIO_PORTB, 31, 0); /* SPI1_MOSI */ at91_set_a_periph(AT91_PIO_PORTB, 31, PUP); /* SPI1_MOSI */
at91_set_a_periph(AT91_PIO_PORTB, 29, 0); /* SPI1_SPCK */ at91_set_a_periph(AT91_PIO_PORTB, 29, PUP); /* SPI1_SPCK */
/* Enable clock */ /* Enable clock */
writel(1 << AT91SAM9261_ID_SPI1, &pmc->pcer); writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
if (cs_mask & (1 << 0)) { if (cs_mask & (1 << 0)) {
at91_set_a_periph(AT91_PIO_PORTB, 28, 1); at91_set_a_periph(AT91_PIO_PORTB, 28, 1);

3
arch/arm/include/asm/arch-at91/at91sam9261.h
View File

@ -104,7 +104,7 @@
#define ATMEL_SIZE_SRAM 0x00028000 /* Internal SRAM size (160Kb) */ #define ATMEL_SIZE_SRAM 0x00028000 /* Internal SRAM size (160Kb) */
#define ATMEL_BASE_ROM 0x00400000 /* Internal ROM base address */ #define ATMEL_BASE_ROM 0x00400000 /* Internal ROM base address */
#define ATMEL_SIZE_ROM SZ_32K /* Internal ROM size (32Kb) */ #define ATMEL_SIZE_ROM 0x00008000 /* Internal ROM size (32Kb) */
#define ATMEL_BASE_UHP 0x00500000 /* USB Host controller */ #define ATMEL_BASE_UHP 0x00500000 /* USB Host controller */
#define ATMEL_BASE_LCDC 0x00600000 /* LDC controller */ #define ATMEL_BASE_LCDC 0x00600000 /* LDC controller */
@ -125,6 +125,7 @@
* Other misc defines * Other misc defines
*/ */
#define ATMEL_PIO_PORTS 3 /* theese SoCs have 3 PIO */ #define ATMEL_PIO_PORTS 3 /* theese SoCs have 3 PIO */
#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
#define ATMEL_BASE_PIO ATMEL_BASE_PIOA #define ATMEL_BASE_PIO ATMEL_BASE_PIOA
/* /*