arm: dts: ti: k3-am62: Add GPMC nodes
This adds GPMC and ELM nodes in preparation to add GPMC NAND addon card support. Signed-off-by: Nitin Yadav <n-yadav@ti.com>
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@ -741,6 +741,36 @@
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};
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};
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};
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gpmc0: memory-controller@3b000000 {
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compatible = "ti,am64-gpmc";
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status = "disabled";
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power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 80 0>;
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clock-names = "fck";
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reg = <0x00 0x03b000000 0x00 0x400>,
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<0x00 0x050000000 0x00 0x8000000>;
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reg-names = "cfg", "data";
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interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
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gpmc,num-cs = <3>;
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gpmc,num-waitpins = <2>;
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#address-cells = <2>;
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#size-cells = <1>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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elm0: ecc@25010000 {
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compatible = "ti,am64-elm";
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status = "disabled";
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reg = <0x00 0x25010000 0x00 0x2000>;
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interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&k3_pds 54 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 54 0>;
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clock-names = "fck";
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};
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hwspinlock: spinlock@2a000000 {
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hwspinlock: spinlock@2a000000 {
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compatible = "ti,am64-hwspinlock";
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compatible = "ti,am64-hwspinlock";
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reg = <0x00 0x2a000000 0x00 0x1000>;
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reg = <0x00 0x2a000000 0x00 0x1000>;
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@ -75,6 +75,8 @@
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<0x00 0x70000000 0x00 0x70000000 0x00 0x00010000>, /* OCSRAM */
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<0x00 0x70000000 0x00 0x70000000 0x00 0x00010000>, /* OCSRAM */
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<0x01 0x00000000 0x01 0x00000000 0x00 0x00310000>, /* A53 PERIPHBASE */
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<0x01 0x00000000 0x01 0x00000000 0x00 0x00310000>, /* A53 PERIPHBASE */
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<0x05 0x00000000 0x05 0x00000000 0x01 0x00000000>, /* FSS0 DAT3 */
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<0x05 0x00000000 0x05 0x00000000 0x01 0x00000000>, /* FSS0 DAT3 */
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<0x00 0x3b000000 0x00 0x3b000000 0x00 0x00000400>, /* GPMC0_CFG */
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<0x00 0x50000000 0x00 0x50000000 0x00 0x08000000>, /* GPMC0 DATA */
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/* MCU Domain Range */
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/* MCU Domain Range */
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<0x00 0x04000000 0x00 0x04000000 0x00 0x01ff1400>,
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<0x00 0x04000000 0x00 0x04000000 0x00 0x01ff1400>,
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