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sunxi: Enable SPL support for A80 Optimus board 

The A80 Optimus Board was launched with the Allwinner A80 SoC.
It was jointly developed by Allwinner and Merrii.

This board has a UART port, a JTAG connector, 2 USB host ports, a USB
3.0 OTG connector, an HDMI output, a micro SD slot, 16G eMMC flash,
2G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone
jack, IR receiver, and additional GPIO headers.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
[hdegoede@redhat.com: update existing Merrii_A80_Optimus_defconfig
 instead of adding a new defconfig]
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
This commit is contained in:
Chen-Yu Tsai 2016-10-28 18:21:37 +08:00 committed by Hans de Goede
parent 58b628ed87
commit 3e057e48b5
2 changed files with 15 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
board/sunxi/MAINTAINERS
View File

@ -94,6 +94,11 @@ M: Stefan Mavrodiev <stefan.mavrodiev@gmail.com>
S: Maintained
F: configs/A33-OLinuXino_defconfig
A80 OPTIMUS BOARD
M: Chen-Yu Tsai <wens@csie.org>
S: Maintained
F: configs/Merrii_A80_Optimus_defconfig
AINOL AW1 BOARD
M: Paul Kocialkowski <contact@paulk.fr>
S: Maintained

15
configs/Merrii_A80_Optimus_defconfig
View File

@ -1,13 +1,18 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_MACH_SUN9I=y
CONFIG_DRAM_CLK=360
CONFIG_DRAM_ZQ=123
CONFIG_SYS_CLK_FREQ=1008000000
CONFIG_DRAM_CLK=672
CONFIG_MMC0_CD_PIN="PH18"
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE"
CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT"
CONFIG_USB0_ID_DET="PH3"
CONFIG_USB1_VBUS_PIN="PH4"
CONFIG_USB3_VBUS_PIN="PH5"
CONFIG_AXP_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-optimus"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_CONSOLE_MUX=y
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_AXP809_POWER=y