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nbhw18: various fixes and cleanup

This commit is contained in:
user 2018-02-21 13:47:33 +01:00
parent 4b6c98acd4
commit 44e0aea765
4 changed files with 33 additions and 14 deletions
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2
arch/arm/dts/armada-385-nbhw18-common.dtsi
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@ -47,8 +47,6 @@
spi-sdo = <&gpio1 6 0>; /* SDO slave data out */ spi-sdo = <&gpio1 6 0>; /* SDO slave data out */
spi-sck = <&gpio1 7 0>; /* SCK */ spi-sck = <&gpio1 7 0>; /* SCK */
spi-sdi = <&gpio1 8 0>; /* SDI slave data in */ spi-sdi = <&gpio1 8 0>; /* SDI slave data in */
fpga-reset = <&gpio0 26 0>; /* FPGA reset */
fpga-cdone = <&gpio0 29 0>; /* FPGA cdone */
fpga-reset-logic = <&gpio1 12 0>; /* FPGA reset logic (after load)*/ fpga-reset-logic = <&gpio1 12 0>; /* FPGA reset logic (after load)*/
}; };

7
arch/arm/dts/armada-385-nbhw18-v1.dts Normal file → Executable file
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@ -15,6 +15,13 @@
/ { / {
model = "NetModule Router NBHW18 with Armada A385 (NB2800)"; model = "NetModule Router NBHW18 with Armada A385 (NB2800)";
soc {
gpiofpga: gpio@fd0000000 {
fpga-reset = <&gpio0 19 0>; /* FPGA reset */
fpga-cdone = <&gpio0 29 0>; /* FPGA cdone */
};
};
}; };
&eth0 { &eth0 {

7
arch/arm/dts/armada-385-nbhw18-v2.dts Normal file → Executable file
View File

@ -15,6 +15,13 @@
/ { / {
model = "NetModule Router NBHW18 with Armada A385 (NB1800)"; model = "NetModule Router NBHW18 with Armada A385 (NB1800)";
soc {
gpiofpga: gpio@fd0000000 {
fpga-reset = <&gpio0 19 0>; /* FPGA reset */
fpga-cdone = <&gpio0 21 0>; /* FPGA cdone */
};
};
}; };
&eth0 { &eth0 {

31
board/nm/nbhw18_v2/nbhw_mvswitch.c
View File

@ -290,9 +290,10 @@ void configure_mvswitch(void)
/* Should not be needed for new U-Boot ????? */ /* Should not be needed for new U-Boot ????? */
//mvBoardPhyAddrSet(0, 0x0A); //mvBoardPhyAddrSet(0, 0x0A);
#ifdef NBHW18_V1
/* Enable MDIO bus */ /* Enable MDIO bus */
/* TODO: Should not be needed if switch is in multi chip mode */
FPGA_REG(SMI_CTRL) = 0x0000; FPGA_REG(SMI_CTRL) = 0x0000;
#endif
/* Check, if we have a switch */ /* Check, if we have a switch */
mvswitch_mdio_read(0x10, 3, &value); mvswitch_mdio_read(0x10, 3, &value);
@ -348,9 +349,11 @@ void configure_mvswitch(void)
mvswitch_xmdio_read(0x15, 0x4, 0x2000, &value); mvswitch_xmdio_read(0x15, 0x4, 0x2000, &value);
abort: abort:
#ifdef NBHW18_V1
/* Switch back to normal mdio bus */ /* Switch back to normal mdio bus */
/* TODO: Should not be needed, if switch is in multi chip mode */
FPGA_REG(SMI_CTRL) = 0x0002; FPGA_REG(SMI_CTRL) = 0x0002;
#endif
return;
} }
static int do_mvswitch(cmd_tbl_t *cmdtp, int flag, int argc, static int do_mvswitch(cmd_tbl_t *cmdtp, int flag, int argc,
@ -359,8 +362,9 @@ static int do_mvswitch(cmd_tbl_t *cmdtp, int flag, int argc,
int dev, port, reg, dev_class, addr; int dev, port, reg, dev_class, addr;
unsigned short value; unsigned short value;
/* TODO: Remove on final hardware*/ #ifdef NBHW18_V1
FPGA_REG(SMI_CTRL) = 0x0000; FPGA_REG(SMI_CTRL) = 0x0000;
#endif
if (argc < 3) goto usage; if (argc < 3) goto usage;
@ -416,7 +420,7 @@ FPGA_REG(SMI_CTRL) = 0x0000;
} else { } else {
goto usage; goto usage;
} }
} else if (strcmp(argv[1], "45")==0) { } else if (strcmp(argv[1], "45i")==0) {
/* xmdio */ /* xmdio */
if (strcmp(argv[2], "r")==0) { if (strcmp(argv[2], "r")==0) {
if (argc != 6) goto usage; if (argc != 6) goto usage;
@ -448,18 +452,21 @@ FPGA_REG(SMI_CTRL) = 0x0000;
goto usage; goto usage;
} }
/* TODO: Remove on final hardware*/ #ifdef NBHW18_V1
FPGA_REG(SMI_CTRL) = 0x0002; FPGA_REG(SMI_CTRL) = 0x0002;
#endif
return 0; return 0;
usage: usage:
printf("usage: mvswitch 22[i] r <dev> <reg>\n"); printf("usage: mvswitch 22[i] r <dev> <reg>\n");
printf(" mvswitch 22[i] w <dev> <reg> <value>\n"); printf(" mvswitch 22[i] w <dev> <reg> <value>\n");
printf(" mvswitch 45 r <port> <dev_class> <address>\n"); printf(" mvswitch 45i r <port> <dev_class> <address>\n");
printf(" mvswitch 45 w <port> <dev_class> <address> <value>\n"); printf(" mvswitch 45i w <port> <dev_class> <address> <value>\n");
/* TODO: Remove on final hardware*/ printf(" ^ i means indirect access\n");
FPGA_REG(SMI_CTRL) = 0x0002; #ifdef NBHW18_V1
FPGA_REG(SMI_CTRL) = 0x0002;
#endif
return 0; return 0;
} }
@ -467,6 +474,6 @@ U_BOOT_CMD(
mvswitch, 7, 0, do_mvswitch, mvswitch, 7, 0, do_mvswitch,
"read/write marvell switch registers", "read/write marvell switch registers",
"For MDIO access : 22[i] <r|w> <dev> <reg> [<value>]\n" "For MDIO access : 22[i] <r|w> <dev> <reg> [<value>]\n"
"For XMDIO access : 45 <r|w> <port> <dev_class> <address> [<value>]\n" "For XMDIO access : 45i <r|w> <port> <dev_class> <address> [<value>]\n"
); );