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arm: dts: k3-j721s2-main: Add support for USB 

Add support for single instance of USB 3.0 controller in J721S2 SoC.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
This commit is contained in:
Aswath Govindraju 2021-12-14 21:49:46 +05:30 committed by Praneeth Bajjuri
parent 637845e3c7
commit 46f09ed2c3
1 changed files with 42 additions and 0 deletions
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42
arch/arm/dts/k3-j721s2-main.dtsi
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@ -30,6 +30,20 @@
}; };
}; };
scm_conf: scm-conf@104000 {
compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
reg = <0x00 0x00104000 0x00 0x18000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00 0x00 0x00104000 0x18000>;
usb_serdes_mux: mux-controller1 {
compatible = "mmio-mux";
#mux-control-cells = <1>;
mux-reg-masks = <0x0 0x8000000>; /* USB0 to SERDES0 lane 1/3 mux */
};
};
gic500: interrupt-controller@1800000 { gic500: interrupt-controller@1800000 {
compatible = "arm,gic-v3"; compatible = "arm,gic-v3";
#address-cells = <2>; #address-cells = <2>;
@ -687,6 +701,34 @@
}; };
}; };
usbss0: cdns-usb@4104000 {
compatible = "ti,j721e-usb";
reg = <0x00 0x04104000 0x00 0x100>;
clocks = <&k3_clks 360 16>, <&k3_clks 360 15>;
clock-names = "ref", "lpm";
assigned-clocks = <&k3_clks 360 16>; /* USB2_REFCLK */
assigned-clock-parents = <&k3_clks 360 17>;
power-domains = <&k3_pds 360 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
dma-coherent;
usb0: usb@6000000 {
compatible = "cdns,usb3";
reg = <0x00 0x06000000 0x00 0x10000>,
<0x00 0x06010000 0x00 0x10000>,
<0x00 0x06020000 0x00 0x10000>;
reg-names = "otg", "xhci", "dev";
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "host", "peripheral", "otg";
maximum-speed = "super-speed";
dr_mode = "otg";
};
};
main_mcan0: can@2701000 { main_mcan0: can@2701000 {
compatible = "bosch,m_can"; compatible = "bosch,m_can";
reg = <0x00 0x02701000 0x00 0x200>, reg = <0x00 0x02701000 0x00 0x200>,