board: nm: am64x: first version after bringup
This version is not guaranteed to work but contains some first findings.
This commit is contained in:
Stefan Eichenberger
parent
f034bdb6b6
commit
48c4010968
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@ -0,0 +1,159 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
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*/
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/ {
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binman: binman {
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multiple-images;
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};
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};
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#define TISPL "tispl.bin"
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#define UBOOT_IMG "u-boot.img"
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#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
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#define SPL_AM642_GEMINI_DTB "spl/dts/k3-am642-gemini-v1.dtb"
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#define UBOOT_NODTB "u-boot-nodtb.bin"
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#define AM642_GEMINI_DTB "arch/arm/dts/k3-am642-gemini-v1.dtb"
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&binman {
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ti-spl {
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filename = TISPL;
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pad-byte = <0xff>;
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fit {
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description = "Configuration to load ATF and SPL";
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#address-cells = <1>;
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images {
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atf {
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description = "ARM Trusted Firmware";
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type = "firmware";
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arch = "arm64";
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compression = "none";
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os = "arm-trusted-firmware";
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load = <CONFIG_K3_ATF_LOAD_ADDR>;
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entry = <CONFIG_K3_ATF_LOAD_ADDR>;
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atf-bl31 {
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filename = "bl31.bin";
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};
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};
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tee {
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description = "OPTEE";
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type = "tee";
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arch = "arm64";
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compression = "none";
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os = "tee";
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load = <0x9e800000>;
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entry = <0x9e800000>;
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tee-os {
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filename = "tee-pager_v2.bin";
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};
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};
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dm {
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description = "DM binary";
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type = "firmware";
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arch = "arm32";
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compression = "none";
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os = "DM";
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load = <0x89000000>;
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entry = <0x89000000>;
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blob-ext {
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filename = "/dev/null";
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};
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};
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spl {
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description = "SPL (64-bit)";
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type = "standalone";
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os = "U-Boot";
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arch = "arm64";
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compression = "none";
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load = <0x80080000>;
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entry = <0x80080000>;
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blob {
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filename = SPL_NODTB;
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};
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};
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fdt-1 {
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description = "k3-am642-gemini";
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type = "flat_dt";
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arch = "arm";
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compression = "none";
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blob {
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filename = SPL_AM642_GEMINI_DTB;
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};
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};
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};
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configurations {
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default = "conf-1";
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conf-1 {
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description = "k3-am642-gemini";
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firmware = "atf";
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loadables = "tee", "dm", "spl";
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fdt = "fdt-1";
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};
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};
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};
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};
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};
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&binman {
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u-boot {
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filename = UBOOT_IMG;
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pad-byte = <0xff>;
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fit {
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description = "FIT image with multiple configurations";
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images {
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uboot {
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description = "U-Boot for am64x board";
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type = "firmware";
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os = "u-boot";
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arch = "arm";
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compression = "none";
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load = <CONFIG_SYS_TEXT_BASE>;
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blob {
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filename = UBOOT_NODTB;
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};
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hash {
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algo = "crc32";
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};
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};
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fdt-1 {
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description = "k3-am642-gemini";
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type = "flat_dt";
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arch = "arm";
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compression = "none";
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blob {
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filename = AM642_GEMINI_DTB;
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};
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hash {
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algo = "crc32";
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};
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};
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};
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configurations {
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default = "conf-1";
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conf-1 {
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description = "k3-am642-gemini";
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firmware = "uboot";
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loadables = "uboot";
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fdt = "fdt-1";
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};
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};
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};
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};
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};
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@ -0,0 +1,142 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
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*/
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#include <config.h>
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#include "k3-am642-gemini-binman.dtsi"
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/ {
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chosen {
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stdout-path = "serial2:115200n8";
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tick-timer = &timer1;
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};
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memory@80000000 {
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u-boot,dm-spl;
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};
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};
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&cbass_main{
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u-boot,dm-spl;
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timer1: timer@2400000 {
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compatible = "ti,omap5430-timer";
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reg = <0x0 0x2400000 0x0 0x80>;
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ti,timer-alwon;
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clock-frequency = <200000000>;
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u-boot,dm-spl;
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};
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};
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&main_conf {
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u-boot,dm-spl;
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chipid@14 {
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u-boot,dm-spl;
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};
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};
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&main_pmx0 {
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u-boot,dm-spl;
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};
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&main_uart0 {
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u-boot,dm-spl;
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};
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&usb0 {
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dr_mode="peripheral";
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u-boot,dm-spl;
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};
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&usbss0 {
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u-boot,dm-spl;
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};
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&main_mmc1_pins_default {
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u-boot,dm-spl;
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};
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&main_usb0_pins_default {
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u-boot,dm-spl;
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};
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&dmss {
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u-boot,dm-spl;
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};
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&secure_proxy_main {
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u-boot,dm-spl;
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};
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&dmsc {
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u-boot,dm-spl;
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k3_sysreset: sysreset-controller {
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compatible = "ti,sci-sysreset";
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u-boot,dm-spl;
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};
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};
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&k3_pds {
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u-boot,dm-spl;
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};
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&k3_clks {
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u-boot,dm-spl;
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};
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&k3_reset {
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u-boot,dm-spl;
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};
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&sdhci0 {
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u-boot,dm-spl;
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};
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&sdhci1 {
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no-1-8-v;
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u-boot,dm-spl;
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};
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&cpsw3g {
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reg = <0x0 0x8000000 0x0 0x200000>,
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<0x0 0x43000200 0x0 0x8>;
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reg-names = "cpsw_nuss", "mac_efuse";
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/delete-property/ ranges;
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cpsw-phy-sel@04044 {
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compatible = "ti,am64-phy-gmii-sel";
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reg = <0x0 0x43004044 0x0 0x8>;
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};
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};
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&cpsw_port2 {
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status = "disabled";
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};
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&main_bcdma {
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u-boot,dm-spl;
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};
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&main_pktdma {
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u-boot,dm-spl;
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};
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&fss {
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u-boot,dm-spl;
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};
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&gpmc0 {
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u-boot,dm-spl;
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};
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&elm0 {
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u-boot,dm-spl;
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};
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&main_gpio0 {
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u-boot,dm-spl;
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};
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&main_gpio1 {
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u-boot,dm-spl;
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};
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@ -1,12 +1,13 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
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* Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
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*/
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/dts-v1/;
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#include <dt-bindings/mux/ti-serdes.h>
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#include <dt-bindings/phy/phy.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/net/ti-dp83867.h>
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#include "k3-am642.dtsi"
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@ -14,6 +15,11 @@
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compatible = "ti,am642-gemini", "ti,am642";
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model = "NetModule AM642 based Gemini";
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aliases {
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i2c0 = &main_i2c1;
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i2c1 = &main_i2c2;
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};
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chosen {
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stdout-path = "serial2:115200n8";
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bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
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@ -42,17 +48,19 @@
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&main_pmx0 {
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main_mmc1_pins_default: main-mmc1-pins-default {
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pinctrl-single,pins = <
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AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */
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AM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0) /* (L20) MMC1_CLK */
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AM64X_IOPAD(0x0288, PIN_INPUT_PULLUP, 0) /* (K21) MMC1_DAT0 */
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AM64X_IOPAD(0x0284, PIN_INPUT_PULLUP, 0) /* (L21) MMC1_DAT1 */
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AM64X_IOPAD(0x0280, PIN_INPUT_PULLUP, 0) /* (K19) MMC1_DAT2 */
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AM64X_IOPAD(0x027c, PIN_INPUT_PULLUP, 0) /* (K18) MMC1_DAT3 */
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AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* MMC1_CLKLB */
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AM64X_IOPAD(0x0294, PIN_INPUT, 0) /* (J19) MMC1_CMD */
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AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* (#N/A) MMC1_CLKLB */
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AM64X_IOPAD(0x028c, PIN_INPUT, 0) /* (L20) MMC1_CLK */
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AM64X_IOPAD(0x0288, PIN_INPUT, 0) /* (K21) MMC1_DAT0 */
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AM64X_IOPAD(0x0284, PIN_INPUT, 0) /* (L21) MMC1_DAT1 */
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AM64X_IOPAD(0x0280, PIN_INPUT, 0) /* (K19) MMC1_DAT2 */
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AM64X_IOPAD(0x027c, PIN_INPUT, 0) /* (K18) MMC1_DAT3 */
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AM64X_IOPAD(0x0298, PIN_INPUT, 0) /* (D19) MMC1_SDCD */
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>;
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};
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main_uart0_pins_default: main-uart0-pins-default {
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u-boot,dm-spl;
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pinctrl-single,pins = <
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AM64X_IOPAD(0x0230, PIN_INPUT, 0) /* (D15) UART0_RXD */
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AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /* (C16) UART0_TXD */
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@ -110,17 +118,10 @@
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>;
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};
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main_i2c0_pins_default: main-i2c0-pins-default {
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pinctrl-single,pins = <
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AM64X_IOPAD(0x0260, PIN_INPUT, 1) /* (P19) I2C2_SCL */
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AM64X_IOPAD(0x0264, PIN_INPUT, 1) /* (R21) I2C2_SDA */
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>;
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};
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main_i2c2_pins_default: main-i2c2-pins-default {
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pinctrl-single,pins = <
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AM64X_IOPAD(0x00B0, PIN_INPUT, 1) /* (P19) I2C2_SCL */
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AM64X_IOPAD(0x00B4, PIN_INPUT, 1) /* (R21) I2C2_SDA */
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AM64X_IOPAD(0x00B0, PIN_INPUT_PULLUP, 1) /* (P19) I2C2_SCL */
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AM64X_IOPAD(0x00B4, PIN_INPUT_PULLUP, 1) /* (R21) I2C2_SDA */
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>;
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};
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@ -133,15 +134,22 @@
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AM64X_IOPAD(0x01fc, PIN_INPUT, 5) /* (R2) PRG0_PRU1_GPO17.RMII1_CRS_DV*/
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AM64X_IOPAD(0x01f8, PIN_INPUT, 5) /* (P5) PRG0_PRU1_GPO17.RMII1_TX_EN */
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AM64X_IOPAD(0x0188, PIN_INPUT, 5) /* (AA5) PRG0_PRU0_GPO10.RMII1_REF_CLK*/
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AM64X_IOPAD(0x00d4, PIN_OUTPUT, 5) /* (U13) CLKOUT0 */
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>;
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};
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mdio0_pins_default: mdio0-pins-default {
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pinctrl-single,pins = <
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AM64X_IOPAD(0x015c, PIN_OUTPUT, 4) /* (Y6) PRG1_MDIO0_MDC.MDIO0_MDC */
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AM64X_IOPAD(0x015c, PIN_OUTPUT_PULLUP, 4) /* (Y6) PRG1_MDIO0_MDC.MDIO0_MDC */
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AM64X_IOPAD(0x0158, PIN_INPUT, 4) /* (AA6) PRG1_MDIO0_MDIO.MDIO0_MDIO */
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AM64X_IOPAD(0x01ac, PIN_OUTPUT, 7) /* (W1) GPIO1_19 */
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AM64X_IOPAD(0x01ac, PIN_OUTPUT_PULLUP, 7) /* (W1) GPIO1_19 */
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>;
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};
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main_usb0_pins_default: main-usb0-pins-default {
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pinctrl-single,pins = <
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AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */
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>;
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};
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@ -153,9 +161,21 @@
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};
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};
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&usbss0 {
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ti,vbus-divider;
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ti,usb2-only;
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};
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&usb0 {
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dr_mode = "otg";
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maximum-speed = "high-speed";
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pinctrl-names = "default";
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pinctrl-0 = <&main_usb0_pins_default>;
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};
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/* SYS_I2C */
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&main_i2c1 {
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status = "disabled";
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&main_i2c1_pins_default>;
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@ -181,11 +201,13 @@
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/* USER_I2C */
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&main_i2c2 {
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status = "disabled";
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&main_i2c2_pins_default>;
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clock-frequency = <100000>;
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clock-frequency = <400000>;
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exp1: gpio@71 {
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status = "disabled";
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compatible = "nxp,pca9538";
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reg = <0x71>;
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gpio-controller;
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@ -197,6 +219,7 @@
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};
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exp2: gpio@72 {
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status = "disabled";
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compatible = "nxp,pca9538";
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reg = <0x72>;
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gpio-controller;
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@ -215,9 +238,12 @@
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non-removable;
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ti,driver-strength-ohm = <50>;
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disable-wp;
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/delete-property/ ti,otap-del-sel-hs200;
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/delete-property/ ti,otap-del-sel-hs400;
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};
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&sdhci1 {
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status = "disabled";
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/delete-property/ pinctrl-0;
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};
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@ -233,9 +259,27 @@
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};
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&cpsw3g_mdio {
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cpsw3g_phy0: ethernet-phy@0 {
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reg = <0>;
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bus_freq = <100000>;
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cpsw3g_phy0: ethernet-phy@b1 {
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reg = <0x01>;
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
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ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
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};
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};
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&main_gpio1 {
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status = "okay";
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phy_reset {
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gpio-hog;
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gpios = <19 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "ETH_RST";
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};
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};
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&serdes_wiz0 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
#include "k3-am642-gemini-u-boot.dtsi"
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
/dts-v1/;
|
||||
|
||||
#include "k3-am642.dtsi"
|
||||
#include "k3-am64-evm-ddr4-1600MTs.dtsi"
|
||||
#include "k3-am64-sk-lp4-1600MTs.dtsi"
|
||||
#include "k3-am64-ddr.dtsi"
|
||||
|
||||
/ {
|
||||
|
|
@ -62,16 +62,6 @@
|
|||
clock-frequency = <200000000>;
|
||||
u-boot,dm-spl;
|
||||
};
|
||||
|
||||
vtt_supply: vtt-supply {
|
||||
compatible = "regulator-gpio";
|
||||
regulator-name = "vtt";
|
||||
regulator-min-microvolt = <0>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
gpios = <&main_gpio0 12 GPIO_ACTIVE_HIGH>;
|
||||
states = <0 0x0 3300000 0x1>;
|
||||
u-boot,dm-spl;
|
||||
};
|
||||
};
|
||||
|
||||
&cbass_main {
|
||||
|
|
@ -114,32 +104,19 @@
|
|||
>;
|
||||
};
|
||||
|
||||
main_mmc0_pins_default: main-mmc0-pins-default {
|
||||
u-boot,dm-spl;
|
||||
main_mmc1_pins_default: main-mmc1-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM64X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
|
||||
AM64X_IOPAD(0x01aC, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
|
||||
AM64X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
|
||||
AM64X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
|
||||
AM64X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
|
||||
AM64X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
|
||||
AM64X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
|
||||
AM64X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
|
||||
AM64X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
|
||||
AM64X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
|
||||
AM64X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
|
||||
AM64X_IOPAD(0x0294, PIN_INPUT, 0) /* (J19) MMC1_CMD */
|
||||
AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* (#N/A) MMC1_CLKLB */
|
||||
AM64X_IOPAD(0x028c, PIN_INPUT, 0) /* (L20) MMC1_CLK */
|
||||
AM64X_IOPAD(0x0288, PIN_INPUT, 0) /* (K21) MMC1_DAT0 */
|
||||
AM64X_IOPAD(0x0284, PIN_INPUT, 0) /* (L21) MMC1_DAT1 */
|
||||
AM64X_IOPAD(0x0280, PIN_INPUT, 0) /* (K19) MMC1_DAT2 */
|
||||
AM64X_IOPAD(0x027c, PIN_INPUT, 0) /* (K18) MMC1_DAT3 */
|
||||
AM64X_IOPAD(0x0298, PIN_INPUT, 0) /* (D19) MMC1_SDCD */
|
||||
>;
|
||||
};
|
||||
|
||||
main_mmc1_pins_default: main-mmc0-pins-default {
|
||||
};
|
||||
|
||||
ddr_vtt_pins_default: ddr-vtt-pins-default {
|
||||
u-boot,dm-spl;
|
||||
pinctrl-single,pins = <
|
||||
AM64X_IOPAD(0x0030, PIN_OUTPUT_PULLUP, 7) /* (L18) OSPI0_CSN1.GPIO0_12 */
|
||||
>;
|
||||
};
|
||||
|
||||
main_usb0_pins_default: main-usb0-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
|
|
@ -182,22 +159,18 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&memorycontroller {
|
||||
vtt-supply = <&vtt_supply>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ddr_vtt_pins_default>;
|
||||
};
|
||||
|
||||
&sdhci0 {
|
||||
/delete-property/ power-domains;
|
||||
clocks = <&clk_200mhz>;
|
||||
clock-names = "clk_xin";
|
||||
ti,driver-strength-ohm = <50>;
|
||||
disable-wp;
|
||||
pinctrl-0 = <&main_mmc0_pins_default>;
|
||||
/delete-property/ ti,otap-del-sel-hs200;
|
||||
/delete-property/ ti,otap-del-sel-hs400;
|
||||
};
|
||||
|
||||
&sdhci1 {
|
||||
status = "disabled";
|
||||
/delete-property/ pinctrl-0;
|
||||
};
|
||||
|
||||
|
|
@ -227,4 +200,8 @@
|
|||
u-boot,dm-spl;
|
||||
};
|
||||
|
||||
#include "k3-am642-evm-u-boot.dtsi"
|
||||
&memorycontroller {
|
||||
// ti,ddr-freq0 = <200000000>;
|
||||
};
|
||||
|
||||
#include "k3-am642-gemini-u-boot.dtsi"
|
||||
|
|
|
|||
|
|
@ -137,6 +137,11 @@ void init_env(void)
|
|||
env_init();
|
||||
env_relocate();
|
||||
switch (spl_boot_device()) {
|
||||
case BOOT_DEVICE_MMC1:
|
||||
part = env_get("bootpart");
|
||||
env_set("storage_interface", "mmc");
|
||||
env_set("fw_dev_part", part);
|
||||
break;
|
||||
case BOOT_DEVICE_MMC2:
|
||||
part = env_get("bootpart");
|
||||
env_set("storage_interface", "mmc");
|
||||
|
|
|
|||
|
|
@ -10,6 +10,7 @@ config TARGET_AM642_A53_GEMINI
|
|||
bool "TI K3 based AM642 Gemini Board from NetModule for A53"
|
||||
select ARM64
|
||||
select SOC_K3_AM642
|
||||
select BINMAN
|
||||
imply BOARD
|
||||
imply SPL_BOARD
|
||||
|
||||
|
|
|
|||
|
|
@ -51,8 +51,8 @@ CONFIG_SPL_DFU=y
|
|||
CONFIG_SPL_YMODEM_SUPPORT=y
|
||||
# CONFIG_CMD_BOOTZ is not set
|
||||
# CONFIG_CMD_EEPROM is not set
|
||||
CONFIG_CMD_CLK=y
|
||||
CONFIG_CMD_DM=y
|
||||
# CONFIG_CMD_GPIO is not set
|
||||
# CONFIG_CMD_SPI is not set
|
||||
CONFIG_CMD_DDRSS=y
|
||||
# CONFIG_CMD_EXT4_WRITE is not set
|
||||
|
|
@ -83,6 +83,8 @@ CONFIG_SYS_DFU_MAX_FILE_SIZE=0x800000
|
|||
CONFIG_DMA_CHANNELS=y
|
||||
CONFIG_TI_K3_NAVSS_UDMA=y
|
||||
CONFIG_TI_SCI_PROTOCOL=y
|
||||
CONFIG_GPIO_HOG=y
|
||||
CONFIG_DA8XX_GPIO=y
|
||||
CONFIG_DM_PCA953X=y
|
||||
CONFIG_SPL_DM_PCA953X=y
|
||||
CONFIG_DM_I2C=y
|
||||
|
|
|
|||
|
|
@ -243,15 +243,19 @@ static void k3_lpddr4_freq_update(struct k3_ddrss_desc *ddrss)
|
|||
}
|
||||
}
|
||||
|
||||
static u32 dram_class = DENALI_CTL_0_DRAM_CLASS_LPDDR4;
|
||||
static void k3_lpddr4_ack_freq_upd_req(const lpddr4_privatedata *pd)
|
||||
{
|
||||
u32 dram_class;
|
||||
// u32 dram_class;
|
||||
struct k3_ddrss_desc *ddrss = (struct k3_ddrss_desc *)pd->ddr_instance;
|
||||
|
||||
debug("--->>> LPDDR4 Initialization is in progress ... <<<---\n");
|
||||
|
||||
dram_class = k3_lpddr4_read_ddr_type(pd);
|
||||
|
||||
// debug("%s - %s:%d\n", __func__, __FILE__, __LINE__);
|
||||
//
|
||||
// dram_class = k3_lpddr4_read_ddr_type(pd);
|
||||
//
|
||||
// debug("%s - %s:%d\n", __func__, __FILE__, __LINE__);
|
||||
switch(dram_class) {
|
||||
case DENALI_CTL_0_DRAM_CLASS_DDR4:
|
||||
break;
|
||||
|
|
@ -265,7 +269,6 @@ static void k3_lpddr4_ack_freq_upd_req(const lpddr4_privatedata *pd)
|
|||
|
||||
static int k3_ddrss_init_freq(struct k3_ddrss_desc *ddrss)
|
||||
{
|
||||
u32 dram_class;
|
||||
int ret;
|
||||
lpddr4_privatedata *pd = &ddrss->pd;
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue