hw21/26: set user serial port to RS485 by default

RS485 keeps the port passive, so that no other devices are disturbed.
This commit is contained in:
Rene Straub 2023-03-06 14:52:58 +01:00
parent e1069f6d23
commit 4bbdb87d6b
2 changed files with 11 additions and 2 deletions

View File

@ -49,6 +49,8 @@ DECLARE_GLOBAL_DATA_PTR;
* CPU GPIOs
*
* (C15) GPIO0_6: MB_LED_PWM
* (V2) GPIO0_8: RS232_485n_SEL (V3.2)
* (V3) GPIO0_9: RS485_DE (V3.2)
* (J18) GPIO0_16: ETH_SW_RST~ (V2.0)
* (K15) GPIO0_17: CTRL.INT~
* (T10) GPIO0_23: CAN_TERM1~ (V1.0)
@ -111,6 +113,8 @@ DECLARE_GLOBAL_DATA_PTR;
#define GPIO_UART2_RX GPIO_TO_PIN(0, 2) /* UART Rx Pin as GPIO */
#define GPIO_RS232_RS485n_SEL GPIO_TO_PIN(0, 8)
#define GPIO_RS485_DE GPIO_TO_PIN(0, 9)
/*
* PMIC GPIOs
@ -806,6 +810,9 @@ void am33xx_spl_board_init(void)
if (is_v32_or_newer()) {
enable_led_mux_v32();
enable_uart4_pin_mux();
REQUEST_AND_CLEAR_GPIO(GPIO_RS485_DE);
REQUEST_AND_CLEAR_GPIO(GPIO_RS232_RS485n_SEL);
}
else {
enable_led_mux();

View File

@ -23,6 +23,8 @@
static struct module_pin_mux gpio_pin_mux[] = {
/*
* (V2) GPIO0_8: RS232_485n_SEL (V3.2)
* (V3) GPIO0_9: RS485_DE (V3.2)
* (J18) GPIO0_16: ETH_SW_RST~ (V2.0)
* (K15) GPIO0_17: CTRL.INT~
* (T10) GPIO0_23: CAN_TERM1~ (V1.0)
@ -221,13 +223,13 @@ static struct module_pin_mux uart3_pin_mux[] = {
/* UART4: User RS232/485 (V3.2 only) */
static struct module_pin_mux uart4_pin_mux[] = {
/*
* CTSn = SEL_RS232/RS485~: Default = High -> RS232 mode
* CTSn = SEL_RS232/RS485~: Default = Low -> RS485 mode
* RTSn = RS485_DE: Default = Low -> RS485 transmitter disabled
* Configure as GPIO in U-Boot to keep disabled, Linux will change to RTSn
*/
{OFFSET(gpmc_wait0), (MODE(6) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (T17) UART4_RXD */
{OFFSET(gpmc_wpn), (MODE(6) | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (U17) UART4_TXD */
{OFFSET(lcd_data12), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (V2) uart4_ctsn */
{OFFSET(lcd_data12), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* (V2) uart4_ctsn */
{OFFSET(lcd_data13), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* (V3) uart4_rtsn */
{-1}
};