LM
/
u-boot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

usb: ehci-mx6: Limit PHY address parsing to !CONFIG_PHY 

For systems which use generic PHY support and implement USB PHY driver,
the parsing of PHY properties is unnecessary, disable it.

Signed-off-by: Marek Vasut <marex@denx.de>
Tested-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
This commit is contained in:
Marek Vasut 2021-04-22 21:06:40 +02:00
parent 79b0f08d6a
commit 53396d67ba
1 changed files with 12 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
drivers/usb/host/ehci-mx6.c
View File

@ -265,6 +265,8 @@ int usb_phy_mode(int port)
}
#endif
#if !defined(CONFIG_PHY)
/* Should be done in the MXS PHY driver */
static void usb_oc_config(struct usbnc_regs *usbnc, int index)
{
void __iomem *ctrl = (void __iomem *)(&usbnc->ctrl[index]);
@ -285,6 +287,7 @@ static void usb_oc_config(struct usbnc_regs *usbnc, int index)
clrbits_le32(ctrl, UCTRL_PWR_POL);
#endif
}
#endif
#if !CONFIG_IS_ENABLED(DM_USB)
/**
@ -432,10 +435,12 @@ struct ehci_mx6_priv_data {
struct clk clk;
struct phy phy;
enum usb_init_type init_type;
#if !defined(CONFIG_PHY)
int portnr;
void __iomem *phy_addr;
void __iomem *misc_addr;
void __iomem *anatop_addr;
#endif
};
static int mx6_init_after_reset(struct ehci_ctrl *dev)
@ -448,14 +453,14 @@ static int mx6_init_after_reset(struct ehci_ctrl *dev)
usb_power_config_mx6(priv->anatop_addr, priv->portnr);
usb_power_config_mx7(priv->misc_addr);
usb_power_config_mx7ulp(priv->phy_addr);
#endif
usb_oc_config(priv->misc_addr, priv->portnr);
#if !defined(CONFIG_PHY) && (defined(CONFIG_MX6) || defined(CONFIG_MX7ULP))
#if defined(CONFIG_MX6) || defined(CONFIG_MX7ULP)
usb_internal_phy_clock_gate(priv->phy_addr, 1);
usb_phy_enable(ehci, priv->phy_addr);
#endif
#endif
#if CONFIG_IS_ENABLED(DM_REGULATOR)
if (priv->vbus_supply) {
@ -558,6 +563,7 @@ static int ehci_usb_of_to_plat(struct udevice *dev)
static int mx6_parse_dt_addrs(struct udevice *dev)
{
#if !defined(CONFIG_PHY)
struct ehci_mx6_priv_data *priv = dev_get_priv(dev);
int phy_off, misc_off;
const void *blob = gd->fdt_blob;
@ -594,7 +600,7 @@ static int mx6_parse_dt_addrs(struct udevice *dev)
priv->misc_addr = addr;
#if !defined(CONFIG_PHY) && defined(CONFIG_MX6)
#if defined(CONFIG_MX6)
int anatop_off;
/* Resolve ANATOP offset through USB PHY node */
@ -607,6 +613,7 @@ static int mx6_parse_dt_addrs(struct udevice *dev)
return -EINVAL;
priv->anatop_addr = addr;
#endif
#endif
return 0;
}
@ -661,14 +668,14 @@ static int ehci_usb_probe(struct udevice *dev)
usb_power_config_mx6(priv->anatop_addr, priv->portnr);
usb_power_config_mx7(priv->misc_addr);
usb_power_config_mx7ulp(priv->phy_addr);
#endif
usb_oc_config(priv->misc_addr, priv->portnr);
#if !defined(CONFIG_PHY) && (defined(CONFIG_MX6) || defined(CONFIG_MX7ULP))
#if defined(CONFIG_MX6) || defined(CONFIG_MX7ULP)
usb_internal_phy_clock_gate(priv->phy_addr, 1);
usb_phy_enable(ehci, priv->phy_addr);
#endif
#endif
#if CONFIG_IS_ENABLED(DM_REGULATOR)
if (priv->vbus_supply) {