nbhw16: clear PFM bit in pmci for dcdc4
This commit is contained in:
parent
fb8611d7c0
commit
555bfd5165
|
|
@ -29,6 +29,7 @@
|
||||||
#include <miiphy.h>
|
#include <miiphy.h>
|
||||||
#include <cpsw.h>
|
#include <cpsw.h>
|
||||||
#include <power/tps65217.h>
|
#include <power/tps65217.h>
|
||||||
|
#include <power/tps65218.h>
|
||||||
#include <power/tps65910.h>
|
#include <power/tps65910.h>
|
||||||
#include <environment.h>
|
#include <environment.h>
|
||||||
#include <watchdog.h>
|
#include <watchdog.h>
|
||||||
|
|
@ -382,6 +383,12 @@ void am33xx_spl_board_init(void)
|
||||||
|
|
||||||
/* Set CORE Frequencies to OPP100 */
|
/* Set CORE Frequencies to OPP100 */
|
||||||
do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
|
do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
|
||||||
|
|
||||||
|
/* Clear th PFM Flag on DCDC4 */
|
||||||
|
if (tps65218_reg_write(TPS65218_PROT_LEVEL_2, TPS65218_DCDC4, 0x00, 0x80)) {
|
||||||
|
puts ("tps65218_reg_write failure\n");
|
||||||
|
};
|
||||||
|
|
||||||
} else {
|
} else {
|
||||||
int sil_rev;
|
int sil_rev;
|
||||||
|
|
||||||
|
|
@ -759,6 +766,11 @@ int board_eth_init(bd_t *bis)
|
||||||
mac_addr[4] = mac_lo & 0xFF;
|
mac_addr[4] = mac_lo & 0xFF;
|
||||||
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
|
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
|
||||||
|
|
||||||
|
if (board_is_nbhw16()) {
|
||||||
|
/* Clock should be 2MHz */
|
||||||
|
cpsw_data.mdio_div = 0x3E;
|
||||||
|
}
|
||||||
|
|
||||||
if (!getenv("eth1addr")) {
|
if (!getenv("eth1addr")) {
|
||||||
if (is_valid_ethaddr(mac_addr))
|
if (is_valid_ethaddr(mac_addr))
|
||||||
eth_setenv_enetaddr("eth1addr", mac_addr);
|
eth_setenv_enetaddr("eth1addr", mac_addr);
|
||||||
|
|
|
||||||
|
|
@ -126,10 +126,6 @@
|
||||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
|
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
|
||||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
|
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
|
||||||
|
|
||||||
/* PMIC support */
|
|
||||||
#define CONFIG_POWER_TPS65217
|
|
||||||
#define CONFIG_POWER_TPS65910
|
|
||||||
|
|
||||||
/* SPL */
|
/* SPL */
|
||||||
#ifndef CONFIG_NOR_BOOT
|
#ifndef CONFIG_NOR_BOOT
|
||||||
#define CONFIG_SPL_POWER_SUPPORT
|
#define CONFIG_SPL_POWER_SUPPORT
|
||||||
|
|
@ -413,4 +409,12 @@
|
||||||
#define CONFIG_SYS_MEMTEST_START 0x80000000
|
#define CONFIG_SYS_MEMTEST_START 0x80000000
|
||||||
#define CONFIG_SYS_MEMTEST_END 0x87900000
|
#define CONFIG_SYS_MEMTEST_END 0x87900000
|
||||||
|
|
||||||
|
/* Enable support for TPS 65218 */
|
||||||
|
#define CONFIG_POWER
|
||||||
|
#define CONFIG_POWER_I2C
|
||||||
|
#define CONFIG_POWER_TPS65218
|
||||||
|
/* For compatibility reasons (BeagleBone) */
|
||||||
|
#define CONFIG_POWER_TPS65217
|
||||||
|
#define CONFIG_POWER_TPS62362
|
||||||
|
|
||||||
#endif /* ! __CONFIG_AM335X_EVM_H */
|
#endif /* ! __CONFIG_AM335X_EVM_H */
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue