ARM: AM57xx: AM43xx: Fix USB host
CONFIG_USB_XHCI_OMAP can be set for host mode without setting
CONFIG_USB_DWC3 which is meant for gadget mode only.
board_usb_init() was not being defined for CONFIG_USB_XHCI_OMAP
resulting in a data abort on usb start.
Define board_usb_init() for CONFIG_USB_XHCI_OMAP case. Move
gadget specific handling to within CONFIG_USB_DWC3.
Fixes: 6f1af1e358 ("board: ti: invoke clock API to enable and disable clocks")
Signed-off-by: Roger Quadros <rogerq@ti.com>
This commit is contained in:
Roger Quadros
Tom Rini
parent
383f4a0ec7
commit
55efadde7e
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@ -678,60 +678,6 @@ static struct ti_usb_phy_device usb_phy2_device = {
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.index = 1,
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};
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int board_usb_init(int index, enum usb_init_type init)
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{
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enable_usb_clocks(index);
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switch (index) {
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case 0:
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if (init == USB_INIT_DEVICE) {
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usb_otg_ss1.dr_mode = USB_DR_MODE_PERIPHERAL;
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usb_otg_ss1_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID;
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} else {
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usb_otg_ss1.dr_mode = USB_DR_MODE_HOST;
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usb_otg_ss1_glue.vbus_id_status = OMAP_DWC3_ID_GROUND;
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}
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dwc3_omap_uboot_init(&usb_otg_ss1_glue);
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ti_usb_phy_uboot_init(&usb_phy1_device);
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dwc3_uboot_init(&usb_otg_ss1);
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break;
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case 1:
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if (init == USB_INIT_DEVICE) {
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usb_otg_ss2.dr_mode = USB_DR_MODE_PERIPHERAL;
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usb_otg_ss2_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID;
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} else {
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usb_otg_ss2.dr_mode = USB_DR_MODE_HOST;
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usb_otg_ss2_glue.vbus_id_status = OMAP_DWC3_ID_GROUND;
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}
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ti_usb_phy_uboot_init(&usb_phy2_device);
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dwc3_omap_uboot_init(&usb_otg_ss2_glue);
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dwc3_uboot_init(&usb_otg_ss2);
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break;
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default:
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printf("Invalid Controller Index\n");
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}
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return 0;
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}
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int board_usb_cleanup(int index, enum usb_init_type init)
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{
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switch (index) {
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case 0:
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case 1:
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ti_usb_phy_uboot_exit(index);
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dwc3_uboot_exit(index);
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dwc3_omap_uboot_exit(index);
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break;
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default:
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printf("Invalid Controller Index\n");
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}
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disable_usb_clocks(index);
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return 0;
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}
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int usb_gadget_handle_interrupts(int index)
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{
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u32 status;
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@ -742,8 +688,62 @@ int usb_gadget_handle_interrupts(int index)
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return 0;
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}
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#endif /* CONFIG_USB_DWC3 */
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#if defined(CONFIG_USB_DWC3) || defined(CONFIG_USB_XHCI_OMAP)
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int board_usb_init(int index, enum usb_init_type init)
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{
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enable_usb_clocks(index);
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#ifdef CONFIG_USB_DWC3
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switch (index) {
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case 0:
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if (init == USB_INIT_DEVICE) {
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usb_otg_ss1.dr_mode = USB_DR_MODE_PERIPHERAL;
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usb_otg_ss1_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID;
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dwc3_omap_uboot_init(&usb_otg_ss1_glue);
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ti_usb_phy_uboot_init(&usb_phy1_device);
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dwc3_uboot_init(&usb_otg_ss1);
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}
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break;
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case 1:
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if (init == USB_INIT_DEVICE) {
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usb_otg_ss2.dr_mode = USB_DR_MODE_PERIPHERAL;
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usb_otg_ss2_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID;
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ti_usb_phy_uboot_init(&usb_phy2_device);
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dwc3_omap_uboot_init(&usb_otg_ss2_glue);
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dwc3_uboot_init(&usb_otg_ss2);
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}
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break;
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default:
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printf("Invalid Controller Index\n");
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}
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#endif
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return 0;
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}
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int board_usb_cleanup(int index, enum usb_init_type init)
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{
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#ifdef CONFIG_USB_DWC3
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switch (index) {
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case 0:
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case 1:
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if (init == USB_INIT_DEVICE) {
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ti_usb_phy_uboot_exit(index);
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dwc3_uboot_exit(index);
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dwc3_omap_uboot_exit(index);
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}
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break;
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default:
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printf("Invalid Controller Index\n");
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}
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#endif
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disable_usb_clocks(index);
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return 0;
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}
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#endif /* defined(CONFIG_USB_DWC3) || defined(CONFIG_USB_XHCI_OMAP) */
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#ifdef CONFIG_DRIVER_TI_CPSW
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static void cpsw_control(int enabled)
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@ -439,64 +439,6 @@ static struct ti_usb_phy_device usb_phy2_device = {
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.index = 1,
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};
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int board_usb_init(int index, enum usb_init_type init)
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{
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enable_usb_clocks(index);
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switch (index) {
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case 0:
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if (init == USB_INIT_DEVICE) {
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printf("port %d can't be used as device\n", index);
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disable_usb_clocks(index);
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return -EINVAL;
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} else {
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usb_otg_ss1.dr_mode = USB_DR_MODE_HOST;
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usb_otg_ss1_glue.vbus_id_status = OMAP_DWC3_ID_GROUND;
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setbits_le32((*prcm)->cm_l3init_usb_otg_ss1_clkctrl,
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OTG_SS_CLKCTRL_MODULEMODE_HW |
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OPTFCLKEN_REFCLK960M);
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}
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ti_usb_phy_uboot_init(&usb_phy1_device);
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dwc3_omap_uboot_init(&usb_otg_ss1_glue);
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dwc3_uboot_init(&usb_otg_ss1);
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break;
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case 1:
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if (init == USB_INIT_DEVICE) {
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usb_otg_ss2.dr_mode = USB_DR_MODE_PERIPHERAL;
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usb_otg_ss2_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID;
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} else {
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printf("port %d can't be used as host\n", index);
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disable_usb_clocks(index);
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return -EINVAL;
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}
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ti_usb_phy_uboot_init(&usb_phy2_device);
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dwc3_omap_uboot_init(&usb_otg_ss2_glue);
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dwc3_uboot_init(&usb_otg_ss2);
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break;
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default:
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printf("Invalid Controller Index\n");
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}
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return 0;
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}
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int board_usb_cleanup(int index, enum usb_init_type init)
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{
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switch (index) {
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case 0:
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case 1:
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ti_usb_phy_uboot_exit(index);
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dwc3_uboot_exit(index);
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dwc3_omap_uboot_exit(index);
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break;
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default:
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printf("Invalid Controller Index\n");
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}
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disable_usb_clocks(index);
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return 0;
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}
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int usb_gadget_handle_interrupts(int index)
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{
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u32 status;
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@ -507,7 +449,63 @@ int usb_gadget_handle_interrupts(int index)
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return 0;
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}
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#endif /* CONFIG_USB_DWC3 */
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#if defined(CONFIG_USB_DWC3) || defined(CONFIG_USB_XHCI_OMAP)
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int board_usb_init(int index, enum usb_init_type init)
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{
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enable_usb_clocks(index);
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switch (index) {
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case 0:
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if (init == USB_INIT_DEVICE) {
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printf("port %d can't be used as device\n", index);
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disable_usb_clocks(index);
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return -EINVAL;
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}
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break;
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case 1:
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if (init == USB_INIT_DEVICE) {
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#ifdef CONFIG_USB_DWC3
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usb_otg_ss2.dr_mode = USB_DR_MODE_PERIPHERAL;
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usb_otg_ss2_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID;
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ti_usb_phy_uboot_init(&usb_phy2_device);
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dwc3_omap_uboot_init(&usb_otg_ss2_glue);
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dwc3_uboot_init(&usb_otg_ss2);
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#endif
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} else {
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printf("port %d can't be used as host\n", index);
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disable_usb_clocks(index);
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return -EINVAL;
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}
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break;
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default:
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printf("Invalid Controller Index\n");
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}
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return 0;
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}
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int board_usb_cleanup(int index, enum usb_init_type init)
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{
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#ifdef CONFIG_USB_DWC3
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switch (index) {
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case 0:
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case 1:
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if (init == USB_INIT_DEVICE) {
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ti_usb_phy_uboot_exit(index);
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dwc3_uboot_exit(index);
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dwc3_omap_uboot_exit(index);
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}
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break;
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default:
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printf("Invalid Controller Index\n");
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}
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#endif
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disable_usb_clocks(index);
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return 0;
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}
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#endif /* defined(CONFIG_USB_DWC3) || defined(CONFIG_USB_XHCI_OMAP) */
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#ifdef CONFIG_DRIVER_TI_CPSW
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