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imx: bootaux: cleanup code 

Use if (CONFIG_IS_ENABLED()) to make code cleaner
Enable elf support for i.MX8M

Signed-off-by: Peng Fan <peng.fan@nxp.com>
This commit is contained in:
Peng Fan 2022-04-29 16:03:11 +08:00 committed by Stefano Babic
parent 290ffe5788
commit 56c2dbdaba
1 changed files with 20 additions and 23 deletions
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43
arch/arm/mach-imx/imx_bootaux.c
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@ -14,7 +14,13 @@
#include <linux/compiler.h>
#include <cpu_func.h>
#ifndef CONFIG_IMX8M
/* Just to avoid build error */
#if CONFIG_IS_ENABLED(IMX8M)
#define SRC_M4C_NON_SCLR_RST_MASK BIT(0)
#define SRC_M4_ENABLE_MASK BIT(0)
#define SRC_M4_REG_OFFSET 0
#endif
const __weak struct rproc_att hostmap[] = { };
static const struct rproc_att *get_host_mapping(unsigned long auxcore)
@ -59,7 +65,7 @@ static unsigned long load_elf_image_m_core_phdr(unsigned long addr)
return 0;
}
dst = (void *)(phdr->p_paddr - mmap->da) + mmap->sa;
dst = (void *)(ulong)(phdr->p_paddr - mmap->da) + mmap->sa;
src = (void *)addr + phdr->p_offset;
debug("Loading phdr %i to 0x%p (%i bytes)\n",
@ -77,7 +83,6 @@ static unsigned long load_elf_image_m_core_phdr(unsigned long addr)
return ehdr->e_entry;
}
#endif
int arch_auxiliary_core_up(u32 core_id, ulong addr)
{
@ -86,10 +91,6 @@ int arch_auxiliary_core_up(u32 core_id, ulong addr)
if (!addr)
return -EINVAL;
#ifdef CONFIG_IMX8M
stack = *(u32 *)addr;
pc = *(u32 *)(addr + 4);
#else
/*
* handling ELF64 binaries
* isn't supported yet.
@ -109,7 +110,7 @@ int arch_auxiliary_core_up(u32 core_id, ulong addr)
stack = *(u32 *)addr;
pc = *(u32 *)(addr + 4);
}
#endif
printf("## Starting auxiliary core stack = 0x%08lX, pc = 0x%08lX...\n",
stack, pc);
@ -120,36 +121,32 @@ int arch_auxiliary_core_up(u32 core_id, ulong addr)
flush_dcache_all();
/* Enable M4 */
#ifdef CONFIG_IMX8M
arm_smccc_smc(IMX_SIP_SRC, IMX_SIP_SRC_M4_START, 0, 0,
0, 0, 0, 0, NULL);
#else
clrsetbits_le32(SRC_BASE_ADDR + SRC_M4_REG_OFFSET,
SRC_M4C_NON_SCLR_RST_MASK, SRC_M4_ENABLE_MASK);
#endif
if (CONFIG_IS_ENABLED(IMX8M)) {
arm_smccc_smc(IMX_SIP_SRC, IMX_SIP_SRC_M4_START, 0, 0, 0, 0, 0, 0, NULL);
} else {
clrsetbits_le32(SRC_BASE_ADDR + SRC_M4_REG_OFFSET,
SRC_M4C_NON_SCLR_RST_MASK, SRC_M4_ENABLE_MASK);
}
return 0;
}
int arch_auxiliary_core_check_up(u32 core_id)
{
#ifdef CONFIG_IMX8M
struct arm_smccc_res res;
arm_smccc_smc(IMX_SIP_SRC, IMX_SIP_SRC_M4_STARTED, 0, 0,
0, 0, 0, 0, &res);
return res.a0;
#else
unsigned int val;
if (CONFIG_IS_ENABLED(IMX8M)) {
arm_smccc_smc(IMX_SIP_SRC, IMX_SIP_SRC_M4_STARTED, 0, 0, 0, 0, 0, 0, &res);
return res.a0;
}
val = readl(SRC_BASE_ADDR + SRC_M4_REG_OFFSET);
if (val & SRC_M4C_NON_SCLR_RST_MASK)
return 0; /* assert in reset */
return 1;
#endif
}
/*