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mmc: mv_sdhci: Configure the SDHCI MBUS bridge windows 

This driver did not yet configure the SDHCI MBUS bridge registers.
Without this and with CONFIG_MMC_SDMA enabled, mmc hangs at random
times. As DMA cannot complete correctly.

Tested on db-88f6820-gp eval board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Dirk Eibach <eibach@gdsys.cc>
Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com>
This commit is contained in:
Stefan Roese 2015-10-01 17:34:41 +02:00 committed by Luka Perkov
parent 1d51ea1913
commit 5b37212a3d
1 changed files with 41 additions and 0 deletions
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41
drivers/mmc/mv_sdhci.c
View File

@ -1,6 +1,41 @@
/*
* Marvell SD Host Controller Interface
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h> #include <common.h>
#include <malloc.h> #include <malloc.h>
#include <sdhci.h> #include <sdhci.h>
#include <linux/mbus.h>
#define SDHCI_WINDOW_CTRL(win) (0x4080 + ((win) << 4))
#define SDHCI_WINDOW_BASE(win) (0x4084 + ((win) << 4))
static void sdhci_mvebu_mbus_config(void __iomem *base)
{
const struct mbus_dram_target_info *dram;
int i;
dram = mvebu_mbus_dram_info();
for (i = 0; i < 4; i++) {
writel(0, base + SDHCI_WINDOW_CTRL(i));
writel(0, base + SDHCI_WINDOW_BASE(i));
}
for (i = 0; i < dram->num_cs; i++) {
const struct mbus_dram_window *cs = dram->cs + i;
/* Write size, attributes and target id to control register */
writel(((cs->size - 1) & 0xffff0000) | (cs->mbus_attr << 8) |
(dram->mbus_dram_target_id << 4) | 1,
base + SDHCI_WINDOW_CTRL(i));
/* Write base address to base register */
writel(cs->base, base + SDHCI_WINDOW_BASE(i));
}
}
#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
static struct sdhci_ops mv_ops; static struct sdhci_ops mv_ops;
@ -47,6 +82,12 @@ int mv_sdh_init(unsigned long regbase, u32 max_clk, u32 min_clk, u32 quirks)
mv_ops.write_b = mv_sdhci_writeb; mv_ops.write_b = mv_sdhci_writeb;
host->ops = &mv_ops; host->ops = &mv_ops;
#endif #endif
if (CONFIG_IS_ENABLED(ARCH_MVEBU)) {
/* Configure SDHCI MBUS mbus bridge windows */
sdhci_mvebu_mbus_config((void __iomem *)regbase);
}
if (quirks & SDHCI_QUIRK_REG32_RW) if (quirks & SDHCI_QUIRK_REG32_RW)
host->version = sdhci_readl(host, SDHCI_HOST_VERSION - 2) >> 16; host->version = sdhci_readl(host, SDHCI_HOST_VERSION - 2) >> 16;
else else