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arm: dts: imx8mm: add Gateworks i.MX8 Mini Dev kits 

Add Gateworks i.MX 8M Mini Development kits from Linux-5.12-rc1

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
This commit is contained in:
Tim Harvey 2021-03-02 14:00:20 -08:00 committed by Stefano Babic
parent 7034478a2f
commit 5db93abe33
8 changed files with 1415 additions and 0 deletions
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4
arch/arm/dts/Makefile
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@ -790,6 +790,10 @@ dtb-$(CONFIG_ARCH_IMX8) += \
dtb-$(CONFIG_ARCH_IMX8M) += \ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mm-evk.dtb \ imx8mm-evk.dtb \
imx8mm-venice.dtb \
imx8mm-venice-gw71xx-0x.dtb \
imx8mm-venice-gw72xx-0x.dtb \
imx8mm-venice-gw73xx-0x.dtb \
imx8mm-verdin.dtb \ imx8mm-verdin.dtb \
phycore-imx8mm.dtb \ phycore-imx8mm.dtb \
imx8mn-ddr4-evk.dtb \ imx8mn-ddr4-evk.dtb \

495
arch/arm/dts/imx8mm-venice-gw700x.dtsi Normal file
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@ -0,0 +1,495 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2020 Gateworks Corporation
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/net/ti-dp83867.h>
/ {
memory@40000000 {
device_type = "memory";
reg = <0x0 0x40000000 0 0x80000000>;
};
gpio-keys {
compatible = "gpio-keys";
user-pb {
label = "user_pb";
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
linux,code = <BTN_0>;
};
user-pb1x {
label = "user_pb1x";
linux,code = <BTN_1>;
interrupt-parent = <&gsc>;
interrupts = <0>;
};
key-erased {
label = "key_erased";
linux,code = <BTN_2>;
interrupt-parent = <&gsc>;
interrupts = <1>;
};
eeprom-wp {
label = "eeprom_wp";
linux,code = <BTN_3>;
interrupt-parent = <&gsc>;
interrupts = <2>;
};
tamper {
label = "tamper";
linux,code = <BTN_4>;
interrupt-parent = <&gsc>;
interrupts = <5>;
};
switch-hold {
label = "switch_hold";
linux,code = <BTN_5>;
interrupt-parent = <&gsc>;
interrupts = <7>;
};
};
};
&A53_0 {
cpu-supply = <&buck3_reg>;
};
&A53_1 {
cpu-supply = <&buck3_reg>;
};
&A53_2 {
cpu-supply = <&buck3_reg>;
};
&A53_3 {
cpu-supply = <&buck3_reg>;
};
&ddrc {
operating-points-v2 = <&ddrc_opp_table>;
ddrc_opp_table: opp-table {
compatible = "operating-points-v2";
opp-25M {
opp-hz = /bits/ 64 <25000000>;
};
opp-100M {
opp-hz = /bits/ 64 <100000000>;
};
opp-750M {
opp-hz = /bits/ 64 <750000000>;
};
};
};
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec1>;
phy-mode = "rgmii-id";
phy-handle = <&ethphy0>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
tx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
rx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
};
};
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
gsc: gsc@20 {
compatible = "gw,gsc";
reg = <0x20>;
pinctrl-0 = <&pinctrl_gsc>;
interrupt-parent = <&gpio2>;
interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
adc {
compatible = "gw,gsc-adc";
#address-cells = <1>;
#size-cells = <0>;
channel@6 {
gw,mode = <0>;
reg = <0x06>;
label = "temp";
};
channel@8 {
gw,mode = <1>;
reg = <0x08>;
label = "vdd_bat";
};
channel@16 {
gw,mode = <4>;
reg = <0x16>;
label = "fan_tach";
};
channel@82 {
gw,mode = <2>;
reg = <0x82>;
label = "vdd_vin";
gw,voltage-divider-ohms = <22100 1000>;
};
channel@84 {
gw,mode = <2>;
reg = <0x84>;
label = "vdd_adc1";
gw,voltage-divider-ohms = <10000 10000>;
};
channel@86 {
gw,mode = <2>;
reg = <0x86>;
label = "vdd_adc2";
gw,voltage-divider-ohms = <10000 10000>;
};
channel@88 {
gw,mode = <2>;
reg = <0x88>;
label = "vdd_dram";
};
channel@8c {
gw,mode = <2>;
reg = <0x8c>;
label = "vdd_1p2";
};
channel@8e {
gw,mode = <2>;
reg = <0x8e>;
label = "vdd_1p0";
};
channel@90 {
gw,mode = <2>;
reg = <0x90>;
label = "vdd_2p5";
gw,voltage-divider-ohms = <10000 10000>;
};
channel@92 {
gw,mode = <2>;
reg = <0x92>;
label = "vdd_3p3";
gw,voltage-divider-ohms = <10000 10000>;
};
channel@98 {
gw,mode = <2>;
reg = <0x98>;
label = "vdd_0p95";
};
channel@9a {
gw,mode = <2>;
reg = <0x9a>;
label = "vdd_1p8";
};
channel@a2 {
gw,mode = <2>;
reg = <0xa2>;
label = "vdd_gsc";
gw,voltage-divider-ohms = <10000 10000>;
};
};
fan-controller@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "gw,gsc-fan";
reg = <0x0a>;
};
};
gpio: gpio@23 {
compatible = "nxp,pca9555";
reg = <0x23>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&gsc>;
interrupts = <4>;
};
eeprom@50 {
compatible = "atmel,24c02";
reg = <0x50>;
pagesize = <16>;
};
eeprom@51 {
compatible = "atmel,24c02";
reg = <0x51>;
pagesize = <16>;
};
eeprom@52 {
compatible = "atmel,24c02";
reg = <0x52>;
pagesize = <16>;
};
eeprom@53 {
compatible = "atmel,24c02";
reg = <0x53>;
pagesize = <16>;
};
rtc@68 {
compatible = "dallas,ds1672";
reg = <0x68>;
};
pmic@69 {
compatible = "mps,mp5416";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pmic>;
reg = <0x69>;
regulators {
buck1 {
regulator-name = "vdd_0p95";
regulator-min-microvolt = <805000>;
regulator-max-microvolt = <1000000>;
regulator-max-microamp = <2500000>;
regulator-boot-on;
};
buck2 {
regulator-name = "vdd_soc";
regulator-min-microvolt = <805000>;
regulator-max-microvolt = <900000>;
regulator-max-microamp = <1000000>;
regulator-boot-on;
};
buck3_reg: buck3 {
regulator-name = "vdd_arm";
regulator-min-microvolt = <805000>;
regulator-max-microvolt = <1000000>;
regulator-max-microamp = <2200000>;
regulator-boot-on;
};
buck4 {
regulator-name = "vdd_1p8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-max-microamp = <500000>;
regulator-boot-on;
};
ldo1 {
regulator-name = "nvcc_snvs_1p8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-max-microamp = <300000>;
regulator-boot-on;
};
ldo2 {
regulator-name = "vdd_snvs_0p8";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <800000>;
regulator-boot-on;
};
ldo3 {
regulator-name = "vdd_0p95";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <800000>;
regulator-boot-on;
};
ldo4 {
regulator-name = "vdd_1p8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
};
};
};
};
&i2c2 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
eeprom@52 {
compatible = "atmel,24c32";
reg = <0x52>;
pagesize = <32>;
};
};
/* console */
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
};
/* eMMC */
&usdhc3 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc3>;
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
bus-width = <8>;
non-removable;
status = "okay";
};
&wdog1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdog>;
fsl,ext-reset-output;
status = "okay";
};
&iomuxc {
pinctrl_fec1: fec1grp {
fsl,pins = <
MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
MX8MM_IOMUXC_NAND_ALE_GPIO3_IO0 0x19
>;
};
pinctrl_gsc: gscgrp {
fsl,pins = <
MX8MM_IOMUXC_SD1_DATA4_GPIO2_IO6 0x159
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
>;
};
pinctrl_pmic: pmicgrp {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
>;
};
pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
fsl,pins = <
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4
MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4
MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
>;
};
pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
fsl,pins = <
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6
MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6
MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6
MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6
MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6
MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6
MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6
MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196
>;
};
pinctrl_wdog: wdoggrp {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
>;
};
};

19
arch/arm/dts/imx8mm-venice-gw71xx-0x.dts Normal file
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@ -0,0 +1,19 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2020 Gateworks Corporation
*/
/dts-v1/;
#include "imx8mm.dtsi"
#include "imx8mm-venice-gw700x.dtsi"
#include "imx8mm-venice-gw71xx.dtsi"
/ {
model = "Gateworks Venice GW71xx-0x i.MX8MM Development Kit";
compatible = "gw,imx8mm-gw71xx-0x", "fsl,imx8mm";
chosen {
stdout-path = &uart2;
};
};

186
arch/arm/dts/imx8mm-venice-gw71xx.dtsi Normal file
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@ -0,0 +1,186 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2020 Gateworks Corporation
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
/ {
aliases {
usb0 = &usbotg1;
usb1 = &usbotg2;
};
led-controller {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led-0 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
default-state = "on";
linux,default-trigger = "heartbeat";
};
led-1 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_RED>;
gpios = <&gpio5 4 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
pps {
compatible = "pps-gpio";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pps>;
gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
status = "okay";
};
reg_usb_otg1_vbus: regulator-usb-otg1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reg_usb1_en>;
compatible = "regulator-fixed";
regulator-name = "usb_otg1_vbus";
gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
};
/* off-board header */
&ecspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi2>;
cs-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&i2c2 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
accelerometer@19 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_accel>;
compatible = "st,lis2de12";
reg = <0x19>;
st,drdy-int-pin = <1>;
interrupt-parent = <&gpio4>;
interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "INT1";
};
};
/* off-board header */
&i2c3 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
};
/* GPS */
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
/* off-board header */
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
status = "okay";
};
&usbotg1 {
dr_mode = "otg";
vbus-supply = <&reg_usb_otg1_vbus>;
status = "okay";
};
&usbotg2 {
dr_mode = "host";
status = "okay";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
pinctrl_hog: hoggrp {
fsl,pins = <
MX8MM_IOMUXC_SPDIF_TX_GPIO5_IO3 0x40000041 /* PLUG_TEST */
MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x40000041 /* PCI_USBSEL */
MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x40000041 /* PCIE_WDIS# */
MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x40000041 /* DIO0 */
MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x40000041 /* DIO1 */
MX8MM_IOMUXC_SAI1_RXD1_GPIO4_IO3 0x40000041 /* DIO2 */
MX8MM_IOMUXC_SAI1_RXD2_GPIO4_IO4 0x40000041 /* DIO2 */
>;
};
pinctrl_accel: accelgrp {
fsl,pins = <
MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5 0x159
>;
};
pinctrl_gpio_leds: gpioledgrp {
fsl,pins = <
MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x19
MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x19
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
>;
};
pinctrl_pps: ppsgrp {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x41
>;
};
pinctrl_reg_usb1_en: regusb1grp {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x41
MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x41
>;
};
pinctrl_spi2: spi2grp {
fsl,pins = <
MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6
MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6
MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6
MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
>;
};
pinctrl_uart3: uart3grp {
fsl,pins = <
MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140
MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140
>;
};
};

19
arch/arm/dts/imx8mm-venice-gw72xx-0x.dts Normal file
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@ -0,0 +1,19 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2020 Gateworks Corporation
*/
/dts-v1/;
#include "imx8mm.dtsi"
#include "imx8mm-venice-gw700x.dtsi"
#include "imx8mm-venice-gw72xx.dtsi"
/ {
model = "Gateworks Venice GW72xx-0x i.MX8MM Development Kit";
compatible = "gw,imx8mm-gw72xx-0x", "fsl,imx8mm";
chosen {
stdout-path = &uart2;
};
};

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arch/arm/dts/imx8mm-venice-gw72xx.dtsi Normal file
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2020 Gateworks Corporation
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
/ {
aliases {
usb0 = &usbotg1;
usb1 = &usbotg2;
};
led-controller {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led-0 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
default-state = "on";
linux,default-trigger = "heartbeat";
};
led-1 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_RED>;
gpios = <&gpio5 4 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
pps {
compatible = "pps-gpio";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pps>;
gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
status = "okay";
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_usb_otg1_vbus: regulator-usb-otg1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reg_usb1_en>;
compatible = "regulator-fixed";
regulator-name = "usb_otg1_vbus";
gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
reg_usb_otg2_vbus: regulator-usb-otg2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reg_usb2_en>;
compatible = "regulator-fixed";
regulator-name = "usb_otg2_vbus";
gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
};
/* off-board header */
&ecspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi2>;
cs-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&i2c2 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
accelerometer@19 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_accel>;
compatible = "st,lis2de12";
reg = <0x19>;
st,drdy-int-pin = <1>;
interrupt-parent = <&gpio4>;
interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "INT1";
};
};
/* off-board header */
&i2c3 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
};
/* off-board header */
&sai3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai3>;
assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
assigned-clock-rates = <24576000>;
status = "okay";
};
/* GPS */
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
/* off-board header */
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
status = "okay";
};
/* RS232 */
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>;
status = "okay";
};
&usbotg1 {
dr_mode = "otg";
vbus-supply = <&reg_usb_otg1_vbus>;
status = "okay";
};
&usbotg2 {
dr_mode = "host";
vbus-supply = <&reg_usb_otg2_vbus>;
status = "okay";
};
/* microSD */
&usdhc2 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
bus-width = <4>;
vmmc-supply = <&reg_3p3v>;
status = "okay";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
pinctrl_hog: hoggrp {
fsl,pins = <
MX8MM_IOMUXC_SPDIF_TX_GPIO5_IO3 0x40000041 /* PLUG_TEST */
MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x40000041 /* PCI_USBSEL */
MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x40000041 /* PCIE_WDIS# */
MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x40000041 /* DIO0 */
MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x40000041 /* DIO1 */
MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x40000104 /* RS485_TERM */
MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x40000104 /* RS485 */
MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2 0x40000104 /* RS485_HALF */
>;
};
pinctrl_accel: accelgrp {
fsl,pins = <
MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5 0x159
>;
};
pinctrl_gpio_leds: gpioledgrp {
fsl,pins = <
MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x19
MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x19
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
>;
};
pinctrl_pps: ppsgrp {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x41
>;
};
pinctrl_reg_usb1_en: regusb1grp {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x41
MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x41
>;
};
pinctrl_reg_usb2_en: regusb2grp {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x41
>;
};
pinctrl_sai3: sai3grp {
fsl,pins = <
MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6
>;
};
pinctrl_spi2: spi2grp {
fsl,pins = <
MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6
MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6
MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6
MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
>;
};
pinctrl_uart3: uart3grp {
fsl,pins = <
MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140
MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140
>;
};
pinctrl_uart4: uart4grp {
fsl,pins = <
MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140
MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140
>;
};
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0
MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0
MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0
MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0
MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
>;
};
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
fsl,pins = <
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
>;
};
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
fsl,pins = <
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
>;
};
pinctrl_usdhc2_gpio: usdhc2gpiogrp {
fsl,pins = <
MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x1c4
MX8MM_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0x1d0
MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
>;
};
};

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2020 Gateworks Corporation
*/
/dts-v1/;
#include "imx8mm.dtsi"
#include "imx8mm-venice-gw700x.dtsi"
#include "imx8mm-venice-gw73xx.dtsi"
/ {
model = "Gateworks Venice GW73xx-0x i.MX8MM Development Kit";
compatible = "gw,imx8mm-gw73xx-0x", "fsl,imx8mm";
chosen {
stdout-path = &uart2;
};
};

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2020 Gateworks Corporation
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
/ {
aliases {
usb0 = &usbotg1;
usb1 = &usbotg2;
};
led-controller {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led-0 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
default-state = "on";
linux,default-trigger = "heartbeat";
};
led-1 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_RED>;
gpios = <&gpio5 4 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
pps {
compatible = "pps-gpio";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pps>;
gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
status = "okay";
};
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "1P8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_usb_otg1_vbus: regulator-usb-otg1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reg_usb1_en>;
compatible = "regulator-fixed";
regulator-name = "usb_otg1_vbus";
gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
reg_usb_otg2_vbus: regulator-usb-otg2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reg_usb2_en>;
compatible = "regulator-fixed";
regulator-name = "usb_otg2_vbus";
gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
reg_wifi_en: regulator-wifi-en {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reg_wl>;
compatible = "regulator-fixed";
regulator-name = "wl";
gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
startup-delay-us = <100>;
enable-active-high;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
/* off-board header */
&ecspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi2>;
cs-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&i2c2 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
accelerometer@19 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_accel>;
compatible = "st,lis2de12";
reg = <0x19>;
st,drdy-int-pin = <1>;
interrupt-parent = <&gpio4>;
interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "INT1";
};
};
/* off-board header */
&i2c3 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
};
/* off-board header */
&sai3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai3>;
assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
assigned-clock-rates = <24576000>;
status = "okay";
};
/* GPS */
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
/* bluetooth HCI */
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_bten>;
cts-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
rts-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
status = "okay";
bluetooth {
compatible = "brcm,bcm4330-bt";
shutdown-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
};
};
/* RS232 */
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>;
status = "okay";
};
&usbotg1 {
dr_mode = "otg";
vbus-supply = <&reg_usb_otg1_vbus>;
status = "okay";
};
&usbotg2 {
dr_mode = "host";
vbus-supply = <&reg_usb_otg2_vbus>;
status = "okay";
};
/* SDIO WiFi */
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;
bus-width = <4>;
non-removable;
vmmc-supply = <&reg_wifi_en>;
status = "okay";
};
/* microSD */
&usdhc2 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
bus-width = <4>;
vmmc-supply = <&reg_3p3v>;
status = "okay";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
pinctrl_hog: hoggrp {
fsl,pins = <
MX8MM_IOMUXC_SPDIF_TX_GPIO5_IO3 0x40000041 /* PLUG_TEST */
MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x40000041 /* PCI_USBSEL */
MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x40000041 /* PCIE_WDIS# */
MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x40000041 /* DIO0 */
MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x40000041 /* DIO1 */
MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x40000104 /* RS485_TERM */
MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x40000104 /* RS485 */
MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2 0x40000104 /* RS485_HALF */
>;
};
pinctrl_accel: accelgrp {
fsl,pins = <
MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5 0x159
>;
};
pinctrl_bten: btengrp {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41
>;
};
pinctrl_gpio_leds: gpioledgrp {
fsl,pins = <
MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x19
MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x19
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
>;
};
pinctrl_pps: ppsgrp {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x41
>;
};
pinctrl_reg_wl: regwlgrp {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x41
>;
};
pinctrl_reg_usb1_en: regusb1grp {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x41
MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x41
>;
};
pinctrl_reg_usb2_en: regusb2grp {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x41
>;
};
pinctrl_sai3: sai3grp {
fsl,pins = <
MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6
>;
};
pinctrl_spi2: spi2grp {
fsl,pins = <
MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6
MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6
MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6
MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
>;
};
pinctrl_uart3: uart3grp {
fsl,pins = <
MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140
MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140
MX8MM_IOMUXC_ECSPI1_MISO_GPIO5_IO8 0x140
MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x140
>;
};
pinctrl_uart4: uart4grp {
fsl,pins = <
MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140
MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140
>;
};
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0
MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0
MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0
MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0
MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
>;
};
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
fsl,pins = <
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
>;
};
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
fsl,pins = <
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
>;
};
pinctrl_usdhc2_gpio: usdhc2gpiogrp {
fsl,pins = <
MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x1c4
MX8MM_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0x1d0
MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
>;
};
};