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ARM: zynq: DT: Cleanup address-cells and size-cells 

Remove unneeded address-cells form intc node because it is already setup
in parent node.
Add missing address-cells and size-cells to eth node to be shared for
every platform DTSes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Michal Simek 2015-07-22 11:03:36 +02:00
parent b346bd1d2d
commit 5ee236a3ea
1 changed files with 4 additions and 1 deletions
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5
arch/arm/dts/zynq-7000.dtsi
View File

@ -127,7 +127,6 @@
intc: interrupt-controller@f8f01000 { intc: interrupt-controller@f8f01000 {
compatible = "arm,cortex-a9-gic"; compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>; #interrupt-cells = <3>;
#address-cells = <1>;
interrupt-controller; interrupt-controller;
reg = <0xF8F01000 0x1000>, reg = <0xF8F01000 0x1000>,
<0xF8F00100 0x100>; <0xF8F00100 0x100>;
@ -198,6 +197,8 @@
interrupts = <0 22 4>; interrupts = <0 22 4>;
clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>; clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>;
clock-names = "pclk", "hclk", "tx_clk"; clock-names = "pclk", "hclk", "tx_clk";
#address-cells = <1>;
#size-cells = <0>;
}; };
gem1: ethernet@e000c000 { gem1: ethernet@e000c000 {
@ -207,6 +208,8 @@
interrupts = <0 45 4>; interrupts = <0 45 4>;
clocks = <&clkc 31>, <&clkc 31>, <&clkc 14>; clocks = <&clkc 31>, <&clkc 31>, <&clkc 14>;
clock-names = "pclk", "hclk", "tx_clk"; clock-names = "pclk", "hclk", "tx_clk";
#address-cells = <1>;
#size-cells = <0>;
}; };
sdhci0: sdhci@e0100000 { sdhci0: sdhci@e0100000 {