NAND: remove NAND_MAX_CHIPS definitions
This change follows the change by Wolfgang Grandegger (commit 6c869637fe),
which allows to remove useless NAND_MAX_CHIPS definitions in board config
files.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Cc: Wolfgang Grandegger <wg@grandegger.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
			
			
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				|  | @ -273,11 +273,10 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); | ||||||
| #endif | #endif | ||||||
| #endif | #endif | ||||||
| 
 | 
 | ||||||
|  | #define CONFIG_CMD_NAND | ||||||
| #define CONFIG_SYS_NAND_BASE_LIST	{CONFIG_SYS_NAND_BASE} | #define CONFIG_SYS_NAND_BASE_LIST	{CONFIG_SYS_NAND_BASE} | ||||||
| #define CONFIG_SYS_MAX_NAND_DEVICE	1 | #define CONFIG_SYS_MAX_NAND_DEVICE	1 | ||||||
| #define NAND_MAX_CHIPS			1 |  | ||||||
| #define CONFIG_MTD_NAND_VERIFY_WRITE | #define CONFIG_MTD_NAND_VERIFY_WRITE | ||||||
| #define CONFIG_CMD_NAND			1 |  | ||||||
| #define CONFIG_NAND_FSL_ELBC		1 | #define CONFIG_NAND_FSL_ELBC		1 | ||||||
| #define CONFIG_SYS_NAND_BLOCK_SIZE	(16 * 1024) | #define CONFIG_SYS_NAND_BLOCK_SIZE	(16 * 1024) | ||||||
| 
 | 
 | ||||||
|  |  | ||||||
|  | @ -144,10 +144,9 @@ | ||||||
| #endif | #endif | ||||||
| #define CONFIG_SYS_FPGA_BASE		0xFF000000 | #define CONFIG_SYS_FPGA_BASE		0xFF000000 | ||||||
| 
 | 
 | ||||||
|  | #define CONFIG_CMD_NAND | ||||||
| #define CONFIG_SYS_MAX_NAND_DEVICE	1 | #define CONFIG_SYS_MAX_NAND_DEVICE	1 | ||||||
| #define NAND_MAX_CHIPS			1 |  | ||||||
| #define CONFIG_MTD_NAND_VERIFY_WRITE | #define CONFIG_MTD_NAND_VERIFY_WRITE | ||||||
| #define CONFIG_CMD_NAND			1 |  | ||||||
| #define CONFIG_NAND_FSL_ELBC		1 | #define CONFIG_NAND_FSL_ELBC		1 | ||||||
| 
 | 
 | ||||||
| #define CONFIG_SYS_NAND_BR_PRELIM	(CONFIG_SYS_NAND_BASE \ | #define CONFIG_SYS_NAND_BR_PRELIM	(CONFIG_SYS_NAND_BASE \ | ||||||
|  |  | ||||||
|  | @ -237,7 +237,6 @@ | ||||||
| #define CONFIG_NAND_S3C2410 | #define CONFIG_NAND_S3C2410 | ||||||
| #define CONFIG_SYS_S3C2410_NAND_HWECC | #define CONFIG_SYS_S3C2410_NAND_HWECC | ||||||
| #define CONFIG_SYS_MAX_NAND_DEVICE	1 | #define CONFIG_SYS_MAX_NAND_DEVICE	1 | ||||||
| #define NAND_MAX_CHIPS			1 |  | ||||||
| #define CONFIG_SYS_NAND_BASE		0x4E000000 | #define CONFIG_SYS_NAND_BASE		0x4E000000 | ||||||
| #define CONFIG_S3C24XX_CUSTOM_NAND_TIMING | #define CONFIG_S3C24XX_CUSTOM_NAND_TIMING | ||||||
| #define CONFIG_S3C24XX_TACLS		1 | #define CONFIG_S3C24XX_TACLS		1 | ||||||
|  |  | ||||||
|  | @ -247,13 +247,9 @@ | ||||||
|  */ |  */ | ||||||
| #define CONFIG_CMD_NAND					/* enable NAND support */ | #define CONFIG_CMD_NAND					/* enable NAND support */ | ||||||
| #define CONFIG_JFFS2_NAND				/* with JFFS2 on it */ | #define CONFIG_JFFS2_NAND				/* with JFFS2 on it */ | ||||||
| 
 |  | ||||||
| 
 |  | ||||||
| #define CONFIG_NAND_MPC5121_NFC | #define CONFIG_NAND_MPC5121_NFC | ||||||
| #define CONFIG_SYS_NAND_BASE		0x40000000 | #define CONFIG_SYS_NAND_BASE		0x40000000 | ||||||
| 
 |  | ||||||
| #define CONFIG_SYS_MAX_NAND_DEVICE	1 | #define CONFIG_SYS_MAX_NAND_DEVICE	1 | ||||||
| #define NAND_MAX_CHIPS			CONFIG_SYS_MAX_NAND_DEVICE |  | ||||||
| 
 | 
 | ||||||
| /*
 | /*
 | ||||||
|  * Configuration parameters for MPC5121 NAND driver |  * Configuration parameters for MPC5121 NAND driver | ||||||
|  |  | ||||||
|  | @ -70,7 +70,6 @@ | ||||||
| #define CONFIG_DRIVER_NAND_BFIN | #define CONFIG_DRIVER_NAND_BFIN | ||||||
| #define CONFIG_SYS_NAND_BASE		0 /* not actually used */ | #define CONFIG_SYS_NAND_BASE		0 /* not actually used */ | ||||||
| #define CONFIG_SYS_MAX_NAND_DEVICE	1 | #define CONFIG_SYS_MAX_NAND_DEVICE	1 | ||||||
| #define NAND_MAX_CHIPS		1 |  | ||||||
| #define CONFIG_CMD_NAND | #define CONFIG_CMD_NAND | ||||||
| #endif | #endif | ||||||
| 
 | 
 | ||||||
|  |  | ||||||
|  | @ -69,7 +69,6 @@ | ||||||
| #define CONFIG_DRIVER_NAND_BFIN | #define CONFIG_DRIVER_NAND_BFIN | ||||||
| #define CONFIG_SYS_NAND_BASE		0 /* not actually used */ | #define CONFIG_SYS_NAND_BASE		0 /* not actually used */ | ||||||
| #define CONFIG_SYS_MAX_NAND_DEVICE	1 | #define CONFIG_SYS_MAX_NAND_DEVICE	1 | ||||||
| #define NAND_MAX_CHIPS		1 |  | ||||||
| #endif | #endif | ||||||
| 
 | 
 | ||||||
| 
 | 
 | ||||||
|  |  | ||||||
|  | @ -69,7 +69,6 @@ | ||||||
| #define CONFIG_DRIVER_NAND_BFIN | #define CONFIG_DRIVER_NAND_BFIN | ||||||
| #define CONFIG_SYS_NAND_BASE		0 /* not actually used */ | #define CONFIG_SYS_NAND_BASE		0 /* not actually used */ | ||||||
| #define CONFIG_SYS_MAX_NAND_DEVICE	1 | #define CONFIG_SYS_MAX_NAND_DEVICE	1 | ||||||
| #define NAND_MAX_CHIPS		1 |  | ||||||
| #endif | #endif | ||||||
| 
 | 
 | ||||||
| 
 | 
 | ||||||
|  |  | ||||||
|  | @ -131,7 +131,6 @@ | ||||||
| #define CONFIG_DRIVER_NAND_BFIN | #define CONFIG_DRIVER_NAND_BFIN | ||||||
| #define CONFIG_SYS_NAND_BASE		0 /* not actually used */ | #define CONFIG_SYS_NAND_BASE		0 /* not actually used */ | ||||||
| #define CONFIG_SYS_MAX_NAND_DEVICE	1 | #define CONFIG_SYS_MAX_NAND_DEVICE	1 | ||||||
| #define NAND_MAX_CHIPS		1 |  | ||||||
| 
 | 
 | ||||||
| 
 | 
 | ||||||
| /*
 | /*
 | ||||||
|  |  | ||||||
|  | @ -68,7 +68,6 @@ | ||||||
| #define CONFIG_BFIN_NFC_CTL_VAL	0x0033 | #define CONFIG_BFIN_NFC_CTL_VAL	0x0033 | ||||||
| #define CONFIG_SYS_NAND_BASE		0 /* not actually used */ | #define CONFIG_SYS_NAND_BASE		0 /* not actually used */ | ||||||
| #define CONFIG_SYS_MAX_NAND_DEVICE	1 | #define CONFIG_SYS_MAX_NAND_DEVICE	1 | ||||||
| #define NAND_MAX_CHIPS		1 |  | ||||||
| #define CONFIG_CMD_NAND | #define CONFIG_CMD_NAND | ||||||
| #endif | #endif | ||||||
| 
 | 
 | ||||||
|  |  | ||||||
|  | @ -295,7 +295,6 @@ | ||||||
| 
 | 
 | ||||||
| /* NAND flash */ | /* NAND flash */ | ||||||
| #define CONFIG_NAND_ATMEL | #define CONFIG_NAND_ATMEL | ||||||
| #define NAND_MAX_CHIPS				1 |  | ||||||
| #define CONFIG_SYS_MAX_NAND_DEVICE		1 | #define CONFIG_SYS_MAX_NAND_DEVICE		1 | ||||||
| #define CONFIG_SYS_NAND_BASE			0x40000000 | #define CONFIG_SYS_NAND_BASE			0x40000000 | ||||||
| #define CONFIG_SYS_NAND_DBW_8			1 | #define CONFIG_SYS_NAND_DBW_8			1 | ||||||
|  |  | ||||||
|  | @ -115,7 +115,6 @@ | ||||||
| #define CONFIG_SYS_CLE_MASK		0x10 | #define CONFIG_SYS_CLE_MASK		0x10 | ||||||
| #define CONFIG_SYS_ALE_MASK		0x8 | #define CONFIG_SYS_ALE_MASK		0x8 | ||||||
| #define CONFIG_SYS_MAX_NAND_DEVICE	1 /* Max number of NAND devices */ | #define CONFIG_SYS_MAX_NAND_DEVICE	1 /* Max number of NAND devices */ | ||||||
| #define NAND_MAX_CHIPS			1 |  | ||||||
| #endif | #endif | ||||||
| 
 | 
 | ||||||
| #ifdef CONFIG_USE_NOR | #ifdef CONFIG_USE_NOR | ||||||
|  |  | ||||||
|  | @ -182,7 +182,6 @@ | ||||||
| #define CONFIG_SYS_ALE_MASK		0x8 | #define CONFIG_SYS_ALE_MASK		0x8 | ||||||
| #undef CONFIG_SYS_NAND_HW_ECC | #undef CONFIG_SYS_NAND_HW_ECC | ||||||
| #define CONFIG_SYS_MAX_NAND_DEVICE	1 /* Max number of NAND devices */ | #define CONFIG_SYS_MAX_NAND_DEVICE	1 /* Max number of NAND devices */ | ||||||
| #define NAND_MAX_CHIPS			1 |  | ||||||
| #endif | #endif | ||||||
| 
 | 
 | ||||||
| /*
 | /*
 | ||||||
|  |  | ||||||
|  | @ -197,7 +197,6 @@ | ||||||
| #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST | #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST | ||||||
| #define	CONFIG_SYS_NAND_USE_FLASH_BBT | #define	CONFIG_SYS_NAND_USE_FLASH_BBT | ||||||
| #define CONFIG_SYS_MAX_NAND_DEVICE	1 /* Max number of NAND devices */ | #define CONFIG_SYS_MAX_NAND_DEVICE	1 /* Max number of NAND devices */ | ||||||
| #define NAND_MAX_CHIPS			1 |  | ||||||
| #define CONFIG_SYS_64BIT_VSPRINTF	/* needed for nand_util.c */ | #define CONFIG_SYS_64BIT_VSPRINTF	/* needed for nand_util.c */ | ||||||
| #endif | #endif | ||||||
| 
 | 
 | ||||||
|  |  | ||||||
|  | @ -114,7 +114,6 @@ | ||||||
| /* Max number of NAND devices */ | /* Max number of NAND devices */ | ||||||
| #define CONFIG_SYS_MAX_NAND_DEVICE	1 | #define CONFIG_SYS_MAX_NAND_DEVICE	1 | ||||||
| #define CONFIG_SYS_NAND_BASE_LIST	{ 0x62000000, } | #define CONFIG_SYS_NAND_BASE_LIST	{ 0x62000000, } | ||||||
| #define NAND_MAX_CHIPS			1 |  | ||||||
| /* Block 0--not used by bootcode */ | /* Block 0--not used by bootcode */ | ||||||
| #define CONFIG_ENV_OFFSET		0x0 | #define CONFIG_ENV_OFFSET		0x0 | ||||||
| 
 | 
 | ||||||
|  |  | ||||||
|  | @ -133,7 +133,6 @@ | ||||||
|  * NAND Flash configuration |  * NAND Flash configuration | ||||||
|  */ |  */ | ||||||
| #define CONFIG_SYS_MAX_NAND_DEVICE	1 | #define CONFIG_SYS_MAX_NAND_DEVICE	1 | ||||||
| #define NAND_MAX_CHIPS			1 |  | ||||||
| 
 | 
 | ||||||
| #define BOOTFLASH_START		0x0 | #define BOOTFLASH_START		0x0 | ||||||
| 
 | 
 | ||||||
|  |  | ||||||
|  | @ -154,7 +154,6 @@ | ||||||
| #define	CONFIG_SYS_MAX_NAND_DEVICE	1 | #define	CONFIG_SYS_MAX_NAND_DEVICE	1 | ||||||
| #define	CONFIG_SYS_NAND_BASE		0x60000000 | #define	CONFIG_SYS_NAND_BASE		0x60000000 | ||||||
| #define	CONFIG_SYS_NAND_5_ADDR_CYCLE | #define	CONFIG_SYS_NAND_5_ADDR_CYCLE | ||||||
| #define	NAND_MAX_CHIPS			8 |  | ||||||
| 
 | 
 | ||||||
| /* Environment is in NAND */ | /* Environment is in NAND */ | ||||||
| #define	CONFIG_ENV_IS_IN_NAND | #define	CONFIG_ENV_IS_IN_NAND | ||||||
|  |  | ||||||
|  | @ -178,9 +178,7 @@ | ||||||
| #define CONFIG_CMD_NAND | #define CONFIG_CMD_NAND | ||||||
| #define CONFIG_NAND_MPC5121_NFC | #define CONFIG_NAND_MPC5121_NFC | ||||||
| #define CONFIG_SYS_NAND_BASE            0x40000000 | #define CONFIG_SYS_NAND_BASE            0x40000000 | ||||||
| 
 |  | ||||||
| #define CONFIG_SYS_MAX_NAND_DEVICE      1 | #define CONFIG_SYS_MAX_NAND_DEVICE      1 | ||||||
| #define NAND_MAX_CHIPS                  CONFIG_SYS_MAX_NAND_DEVICE |  | ||||||
| 
 | 
 | ||||||
| /*
 | /*
 | ||||||
|  * Configuration parameters for MPC5121 NAND driver |  * Configuration parameters for MPC5121 NAND driver | ||||||
|  |  | ||||||
|  | @ -242,7 +242,6 @@ | ||||||
| #define CONFIG_SYS_NAND_BASE            0x40000000 | #define CONFIG_SYS_NAND_BASE            0x40000000 | ||||||
| 
 | 
 | ||||||
| #define CONFIG_SYS_MAX_NAND_DEVICE      2 | #define CONFIG_SYS_MAX_NAND_DEVICE      2 | ||||||
| #define NAND_MAX_CHIPS                  CONFIG_SYS_MAX_NAND_DEVICE |  | ||||||
| #define CONFIG_SYS_NAND_SELECT_DEVICE	/* driver supports mutipl. chips */ | #define CONFIG_SYS_NAND_SELECT_DEVICE	/* driver supports mutipl. chips */ | ||||||
| 
 | 
 | ||||||
| /*
 | /*
 | ||||||
|  |  | ||||||
|  | @ -132,7 +132,6 @@ | ||||||
|  */ |  */ | ||||||
| #ifdef CONFIG_CMD_NAND | #ifdef CONFIG_CMD_NAND | ||||||
| #define CONFIG_SYS_MAX_NAND_DEVICE     1 | #define CONFIG_SYS_MAX_NAND_DEVICE     1 | ||||||
| #define NAND_MAX_CHIPS                 1 |  | ||||||
| #define CONFIG_SYS_64BIT_VSPRINTF      /* needed for nand_util.c */ | #define CONFIG_SYS_64BIT_VSPRINTF      /* needed for nand_util.c */ | ||||||
| #endif | #endif | ||||||
| 
 | 
 | ||||||
|  |  | ||||||
|  | @ -225,9 +225,7 @@ | ||||||
| #define CONFIG_CMD_NAND			/* enable NAND support */ | #define CONFIG_CMD_NAND			/* enable NAND support */ | ||||||
| #define CONFIG_NAND_MPC5121_NFC | #define CONFIG_NAND_MPC5121_NFC | ||||||
| #define CONFIG_SYS_NAND_BASE            0x40000000 | #define CONFIG_SYS_NAND_BASE            0x40000000 | ||||||
| 
 |  | ||||||
| #define CONFIG_SYS_MAX_NAND_DEVICE      1 | #define CONFIG_SYS_MAX_NAND_DEVICE      1 | ||||||
| #define NAND_MAX_CHIPS                  CONFIG_SYS_MAX_NAND_DEVICE |  | ||||||
| #define CONFIG_SYS_NAND_SELECT_DEVICE	/* driver supports mutipl. chips */ | #define CONFIG_SYS_NAND_SELECT_DEVICE	/* driver supports mutipl. chips */ | ||||||
| 
 | 
 | ||||||
| /*
 | /*
 | ||||||
|  |  | ||||||
|  | @ -233,7 +233,6 @@ | ||||||
| 
 | 
 | ||||||
| /* NAND flash */ | /* NAND flash */ | ||||||
| #define CONFIG_NAND_ATMEL | #define CONFIG_NAND_ATMEL | ||||||
| #define NAND_MAX_CHIPS				1 |  | ||||||
| #define CONFIG_SYS_MAX_NAND_DEVICE		1 | #define CONFIG_SYS_MAX_NAND_DEVICE		1 | ||||||
| #define CONFIG_SYS_NAND_BASE			0x40000000 | #define CONFIG_SYS_NAND_BASE			0x40000000 | ||||||
| #define CONFIG_SYS_NAND_DBW_8			1 | #define CONFIG_SYS_NAND_DBW_8			1 | ||||||
|  |  | ||||||
|  | @ -117,7 +117,6 @@ | ||||||
| #define CONFIG_SYS_NAND_OOBSIZE		128 | #define CONFIG_SYS_NAND_OOBSIZE		128 | ||||||
| #define CONFIG_SYS_NAND_BASE		0xB8000000 | #define CONFIG_SYS_NAND_BASE		0xB8000000 | ||||||
| #define CONFIG_SYS_ONENAND_BASE		CONFIG_SYS_NAND_BASE | #define CONFIG_SYS_ONENAND_BASE		CONFIG_SYS_NAND_BASE | ||||||
| #define NAND_MAX_CHIPS			1 |  | ||||||
| #define CONFIG_SYS_MAX_NAND_DEVICE	1 | #define CONFIG_SYS_MAX_NAND_DEVICE	1 | ||||||
| #define CONFIG_SYS_NAND_SELECT_DEVICE	1 /* nand driver supports mutipl.*/ | #define CONFIG_SYS_NAND_SELECT_DEVICE	1 /* nand driver supports mutipl.*/ | ||||||
| #define CONFIG_NAND_SPL_TEXT_BASE	0x80000000 | #define CONFIG_NAND_SPL_TEXT_BASE	0x80000000 | ||||||
|  |  | ||||||
|  | @ -211,7 +211,6 @@ | ||||||
| #define CONFIG_NAND_S3C2410 | #define CONFIG_NAND_S3C2410 | ||||||
| #define CONFIG_SYS_S3C2410_NAND_HWECC | #define CONFIG_SYS_S3C2410_NAND_HWECC | ||||||
| #define CONFIG_SYS_MAX_NAND_DEVICE	1 | #define CONFIG_SYS_MAX_NAND_DEVICE	1 | ||||||
| #define NAND_MAX_CHIPS			1 |  | ||||||
| #define CONFIG_SYS_NAND_BASE		0x4E000000 | #define CONFIG_SYS_NAND_BASE		0x4E000000 | ||||||
| #endif | #endif | ||||||
| 
 | 
 | ||||||
|  |  | ||||||
|  | @ -90,7 +90,6 @@ | ||||||
| #define CONFIG_CMD_MTDPARTS | #define CONFIG_CMD_MTDPARTS | ||||||
| #define CONFIG_MTD_DEVICE | #define CONFIG_MTD_DEVICE | ||||||
| #define CONFIG_JFFS2_NAND | #define CONFIG_JFFS2_NAND | ||||||
| #define NAND_MAX_CHIPS			1 |  | ||||||
| #define CONFIG_ENV_OFFSET		0x180000 | #define CONFIG_ENV_OFFSET		0x180000 | ||||||
| 
 | 
 | ||||||
| /*
 | /*
 | ||||||
|  |  | ||||||
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