diff --git a/board/nm/nbhw18_v2/nbhw_fpga_config.c b/board/nm/nbhw18_v2/nbhw_fpga_config.c
index 7450f6c3d2..53135d2886 100755
--- a/board/nm/nbhw18_v2/nbhw_fpga_config.c
+++ b/board/nm/nbhw18_v2/nbhw_fpga_config.c
@@ -161,6 +161,25 @@ static int add_pcie_slot(ofnode fdt)
 	return 0;
 }
 
+static int has_slot_wlan(int slot)
+{
+	int module;
+	char slotDescr[20];
+	char pdValue[200];
+
+	sprintf(slotDescr, "slot=%d", slot);
+	for (module=0; module<4; module++) {
+		strcpy(pdValue, "" );  /*init with an empty string*/
+		if (bd_get_pd_module(module, pdValue, sizeof(pdValue))==0) {
+			/* Wifi module needs PCIe */
+			if ((strstr(pdValue, slotDescr)) && (strstr(pdValue, "wlan-")))
+				return 1;
+		}
+	}
+
+	return 0;
+}
+
 static int configure_pcie_slots(void)
 {
 	int i;
@@ -190,8 +209,11 @@ static int configure_pcie_slots(void)
 
 	/* Enable PCIe clock Note: Slot 1 has always clock. Slot 0 & extension 
 	   slot cannot have clock at same time. */
-	for (i = 0; i < 1; i ++) {
-		dm_gpio_set_value(&pcie_slots[i].clk, 1);
+	for (i = 0; i < 2; i ++) {
+		if (has_slot_wlan(i)) {
+			/* Only enable PCIe clock on WiFi modules as it confuses some LTE modems */
+			dm_gpio_set_value(&pcie_slots[i].clk, 1);
+		}
 	}
 
 	for (i = 0; i < pcie_slot_count;i ++) {