arm: socfpga: gen5 enable designware_socfpga
Enable the socfpga specific designware ethernet driver by default for socfpga by implying it when enabling CONFIG_ETH_DESIGNWARE for a MACH_SOCFPGA config. This is required to remove the hacky reset and phy mode handling in arch/arm/mach-socfpga. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
This commit is contained in:
		
							parent
							
								
									4f1267cea1
								
							
						
					
					
						commit
						6fb1eb1b76
					
				| 
						 | 
				
			
			@ -156,6 +156,7 @@ config ETH_SANDBOX_RAW
 | 
			
		|||
config ETH_DESIGNWARE
 | 
			
		||||
	bool "Synopsys Designware Ethernet MAC"
 | 
			
		||||
	select PHYLIB
 | 
			
		||||
	imply ETH_DESIGNWARE_SOCFPGA if ARCH_SOCFPGA
 | 
			
		||||
	help
 | 
			
		||||
	  This MAC is present in SoCs from various vendors. It supports
 | 
			
		||||
	  100Mbit and 1 Gbit operation. You must enable CONFIG_PHYLIB to
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
		Loading…
	
		Reference in New Issue