powerpc, 8xx: Handle checkpatch errors and some of the warnings/checks

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Reviewed-by: Heiko Schocher <hs@denx.de>

arch/powerpc/cpu/mpc8xx/cpu.c

@@ -73,12 +73,15 @@ static int check_CPU (long clock, uint pvr, uint immr)
 			id_str =
 		"PC866x"; /* Unknown chip from MPC866 family */
 		break;
-	case 0x09000000: pre = 'M'; mid = suf = ""; m = 1;
+	case 0x09000000:
+		pre = 'M'; mid = suf = ""; m = 1;
 		if (id_str == NULL)
 			id_str = "PC885"; /* 870/875/880/885 */
 		break;
 
-	default: suf = NULL; break;
+	default:
+		suf = NULL;
+		break;
 	}
 
 	if (id_str == NULL)
@@ -99,9 +102,8 @@ static int check_CPU (long clock, uint pvr, uint immr)
 	if (in_be32(&immap->im_cpm.cp_fec.fec_addr_low) == 0x12345678)
 		printf(" FEC present");
 
-	if (!m) {
+	if (!m)
 		puts(cpu_warning);
-	}
 
 	putc('\n');
 
@@ -239,9 +241,10 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	addr = CONFIG_SYS_RESET_ADDRESS;
 #else
 	/*
-	 * note: when CONFIG_SYS_MONITOR_BASE points to a RAM address, CONFIG_SYS_MONITOR_BASE
+	 * note: when CONFIG_SYS_MONITOR_BASE points to a RAM address,
-	 * - sizeof (ulong) is usually a valid address. Better pick an address
+	 * CONFIG_SYS_MONITOR_BASE - sizeof (ulong) is usually a valid address.
-	 * known to be invalid on your system and assign it to CONFIG_SYS_RESET_ADDRESS.
+	 * Better pick an address known to be invalid on your system and assign
+	 * it to CONFIG_SYS_RESET_ADDRESS.
 	 * "(ulong)-1" used to be a good choice for many systems...
 	 */
 	addr = CONFIG_SYS_MONITOR_BASE - sizeof(ulong);
@@ -264,7 +267,7 @@ unsigned long get_tbclk (void)
 	ulong oscclk, factor, pll;
 
 	if (in_be32(&immap->im_clkrst.car_sccr) & SCCR_TBS)
-		return (gd->cpu_clk / 16);
+		return gd->cpu_clk / 16;
 
 	pll = in_be32(&immap->im_clkrst.car_plprcr);
 
@@ -288,9 +291,9 @@ unsigned long get_tbclk (void)
 
 	if ((in_be32(&immap->im_clkrst.car_sccr) & SCCR_RTSEL) == 0 ||
 	    factor > 2)
-		return (oscclk / 4);
+		return oscclk / 4;
 
-	return (oscclk / 16);
+	return oscclk / 16;
 }
 
 /* ------------------------------------------------------------------------- */

arch/powerpc/cpu/mpc8xx/cpu_init.c

@@ -184,5 +184,5 @@ void cpu_init_f(immap_t __iomem *immr)
  */
 int cpu_init_r(void)
 {
-	return (0);
+	return 0;
 }

arch/powerpc/cpu/mpc8xx/fec.c

@@ -102,7 +102,7 @@ static struct ether_fcc_info_s
 #define PKT_MAXBLR_SIZE		1520
 
 #ifdef __GNUC__
-static char txbuf[DBUF_LENGTH] __attribute__ ((aligned(8)));
+static char txbuf[DBUF_LENGTH] __aligned(8);
 #else
 #error txbuf must be aligned.
 #endif
@@ -138,7 +138,6 @@ int fec_initialize(bd_t *bis)
 	int             i;
 
 	for (i = 0; i < ARRAY_SIZE(ether_fcc_info); i++) {
-
 		dev = malloc(sizeof(*dev));
 		if (dev == NULL)
 			hang();
@@ -147,12 +146,11 @@ int fec_initialize(bd_t *bis)
 
 		/* for FEC1 make sure that the name of the interface is the same
 		   as the old one for compatibility reasons */
-		if (i == 0) {
+		if (i == 0)
 			strcpy(dev->name, "FEC");
-		} else {
+		else
 			sprintf(dev->name, "FEC%d",
 				ether_fcc_info[i].ether_index + 1);
-		}
 
 		efis = &ether_fcc_info[i];
 
@@ -202,9 +200,8 @@ static int fec_send(struct eth_device *dev, void *packet, int length)
 		udelay(1);
 		j++;
 	}
-	if (j>=TOUT_LOOP) {
+	if (j >= TOUT_LOOP)
 		printf("TX not ready\n");
-	}
 
 	out_be32(&rtx->txbd[txIdx].cbd_bufaddr, (uint)packet);
 	out_be16(&rtx->txbd[txIdx].cbd_datlen, length);
@@ -221,9 +218,9 @@ static int fec_send(struct eth_device *dev, void *packet, int length)
 		udelay(1);
 		j++;
 	}
-	if (j>=TOUT_LOOP) {
+	if (j >= TOUT_LOOP)
 		printf("TX timeout\n");
-	}
+
 	/* return only status bits */;
 	rc = in_be16(&rtx->txbd[txIdx].cbd_sc) & BD_ENET_TX_STATS;
 
@@ -436,7 +433,6 @@ static void fec_pin_init(int fecidx)
 
 #endif	/* CONFIG_ETHER_ON_FEC1 */
 	} else if (fecidx == 1) {
-
 #if defined(CONFIG_ETHER_ON_FEC2)
 
 #if defined(CONFIG_MPC885_FAMILY) /* MPC87x/88x have got 2 FECs and different pinout */
@@ -467,7 +463,6 @@ static void fec_pin_init(int fecidx)
 #endif /* CONFIG_MPC885_FAMILY */
 
 #endif /* CONFIG_ETHER_ON_FEC2 */
-
 	}
 }
 
@@ -554,7 +549,7 @@ static int fec_init (struct eth_device *dev, bd_t * bd)
 	out_be32(&fecp->fec_r_hash, PKT_MAXBUF_SIZE);
 
 	/*
-	 * Setup Buffers and Buffer Desriptors
+	 * Setup Buffers and Buffer Descriptors
 	 */
 	rxIdx = 0;
 	txIdx = 0;
@@ -636,22 +631,20 @@ static int fec_init (struct eth_device *dev, bd_t * bd)
 	/*
 	 * adapt the RMII speed to the speed of the phy
 	 */
-	if (miiphy_speed (dev->name, efis->actual_phy_addr) == _100BASET) {
+	if (miiphy_speed(dev->name, efis->actual_phy_addr) == _100BASET)
 		fec_100Mbps(dev);
-	} else {
+	else
 		fec_10Mbps(dev);
-	}
 #endif
 
 #if defined(CONFIG_MII)
 	/*
 	 * adapt to the half/full speed settings
 	 */
-	if (miiphy_duplex (dev->name, efis->actual_phy_addr) == FULL) {
+	if (miiphy_duplex(dev->name, efis->actual_phy_addr) == FULL)
 		fec_full_duplex(dev);
-	} else {
+	else
 		fec_half_duplex(dev);
-	}
 #endif
 
 	/* And last, try to fill Rx Buffer Descriptors */
@@ -744,7 +737,7 @@ mii_send(uint mii_cmd)
 	}
 	mii_reply = in_be32(&ep->fec_mii_data);		/* result from phy */
 	out_be32(&ep->fec_ievent, FEC_ENET_MII);	/* clear MII complete */
-	return (mii_reply & 0xffff);		/* data read from phy */
+	return mii_reply & 0xffff;		/* data read from phy */
 }
 #endif
 
@@ -776,9 +769,9 @@ static int mii_discover_phy(struct eth_device *dev)
 			}
 		}
 	}
-	if (phyaddr < 0) {
+	if (phyaddr < 0)
 		printf("No PHY device found.\n");
-	}
+
 	return phyaddr;
 }
 #endif	/* CONFIG_SYS_DISCOVER_PHY */

arch/powerpc/cpu/mpc8xx/immap.c

@@ -19,8 +19,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-int
+int do_siuinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-do_siuinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 	sysconf8xx_t __iomem *sc = &immap->im_siu_conf;
@@ -37,8 +36,7 @@ do_siuinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return 0;
 }
 
-int
+int do_memcinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-do_memcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 	memctl8xx_t __iomem *memctl = &immap->im_memctl;
@@ -60,8 +58,7 @@ do_memcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return 0;
 }
 
-int
+int do_carinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-do_carinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 	car8xx_t __iomem *car = &immap->im_clkrst;
@@ -74,8 +71,7 @@ do_carinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 static int counter;
 
-static void
+static void header(void)
-header(void)
 {
 	char *data = "\
        --------------------------------        --------------------------------\
@@ -123,8 +119,7 @@ static void binary (char *label, uint value, int nbits)
 #define PC_NBITS	12
 #define PD_NBITS	13
 
-int
+int do_iopinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-do_iopinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 	iop8xx_t __iomem *iop = &immap->im_ioport;
@@ -177,14 +172,13 @@ do_iopinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  * this needs a clean up for smaller tighter code
  * use *uint and set the address based on cmd + port
  */
-int
+int do_iopset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-do_iopset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	uint rcode = 0;
 	iopin_t iopin;
-	static uint port = 0;
+	static uint port;
-	static uint pin = 0;
+	static uint pin;
-	static uint value = 0;
+	static uint value;
 	static enum {
 		DIR,
 		PAR,
@@ -281,7 +275,6 @@ do_iopset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 				iopin_set_anyedge(&iopin);
 			break;
 		}
-
 	}
 	return rcode;
 }
@@ -335,8 +328,7 @@ static void prbrg (int n, uint val)
 	putc('\n');
 }
 
-int
+int do_brginfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-do_brginfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 	cpm8xx_t __iomem *cp = &immap->im_cpm;

arch/powerpc/cpu/mpc8xx/interrupts.c

@@ -42,7 +42,7 @@ int interrupt_init_cpu (unsigned *decrementer_count)
 	/* Configure CPM interrupts */
 	cpm_interrupt_init();
 
-	return (0);
+	return 0;
 }
 
 /************************************************************************/
@@ -146,30 +146,24 @@ static void cpm_error_interrupt (void *dummy)
 /*
  * Install and free an interrupt handler
  */
-void irq_install_handler (int vec, interrupt_handler_t * handler,
+void irq_install_handler(int vec, interrupt_handler_t *handler, void *arg)
-						  void *arg)
 {
 	immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
 
 	if ((vec & CPMVEC_OFFSET) != 0) {
 		/* CPM interrupt */
 		vec &= 0xffff;
-		if (cpm_vecs[vec].handler != NULL) {
+		if (cpm_vecs[vec].handler != NULL)
 			printf("CPM interrupt 0x%x replacing 0x%x\n",
-				(uint) handler,
+			       (uint)handler, (uint)cpm_vecs[vec].handler);
-				(uint) cpm_vecs[vec].handler);
-		}
 		cpm_vecs[vec].handler = handler;
 		cpm_vecs[vec].arg = arg;
 		setbits_be32(&immr->im_cpic.cpic_cimr, 1 << vec);
 	} else {
 		/* SIU interrupt */
-		if (irq_vecs[vec].handler != NULL) {
+		if (irq_vecs[vec].handler != NULL)
 			printf("SIU interrupt %d 0x%x replacing 0x%x\n",
-				vec,
+			       vec, (uint)handler, (uint)cpm_vecs[vec].handler);
-				(uint) handler,
-				(uint) cpm_vecs[vec].handler);
-		}
 		irq_vecs[vec].handler = handler;
 		irq_vecs[vec].arg = arg;
 		setbits_be32(&immr->im_siu_conf.sc_simask, 1 << (31 - vec));

arch/powerpc/cpu/mpc8xx/serial.c

@@ -185,11 +185,10 @@ static int smc_init (void)
 	/* Enable transmitter/receiver.	*/
 	setbits_be16(&sp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
 
-	return (0);
+	return 0;
 }
 
-static void
+static void smc_putc(const char c)
-smc_putc(const char c)
 {
 	immap_t	__iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR;
 	cpm8xx_t	__iomem *cpmp = &(im->im_cpm);
@@ -209,16 +208,13 @@ smc_putc(const char c)
 		WATCHDOG_RESET();
 }
 
-static void
+static void smc_puts(const char *s)
-smc_puts (const char *s)
 {
-	while (*s) {
+	while (*s)
 		smc_putc(*s++);
 }
-}
 
-static int
+static int smc_getc(void)
-smc_getc(void)
 {
 	immap_t	__iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR;
 	cpm8xx_t	__iomem *cpmp = &(im->im_cpm);
@@ -245,11 +241,10 @@ smc_getc(void)
 		setbits_be16(&rtx->rxbd.cbd_sc, BD_SC_EMPTY);
 	}
 	out_be32(&rtx->rxindex, rxindex);
-	return(c);
+	return c;
 }
 
-static int
+static int smc_tstc(void)
-smc_tstc(void)
 {
 	immap_t	__iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR;
 	cpm8xx_t	__iomem *cpmp = &(im->im_cpm);
@@ -260,8 +255,7 @@ smc_tstc(void)
 	return !(in_be16(&rtx->rxbd.cbd_sc) & BD_SC_EMPTY);
 }
 
-struct serial_device serial_smc_device =
+struct serial_device serial_smc_device = {
-{
 	.name	= "serial_smc",
 	.start	= smc_init,
 	.stop	= NULL,

arch/powerpc/cpu/mpc8xx/speed.c

@@ -59,5 +59,5 @@ int get_clocks (void)
 
 	get_brgclk(sccr);
 
-	return (0);
+	return 0;
 }

arch/powerpc/cpu/mpc8xx/spi.c

@@ -50,10 +50,6 @@
 /* -------------------
  * Function prototypes
  * ------------------- */
-void spi_init (void);
-
-ssize_t spi_read (uchar *, int, uchar *, int);
-ssize_t spi_write (uchar *, int, uchar *, int);
 ssize_t spi_xfer(size_t);
 
 /* -------------------
@@ -120,7 +116,7 @@ void spi_init_f (void)
 	 * PBODR[28] = 1 [0x00000008] -> open drain: SPIMISO
 	 * PBODR[29] = 0 [0x00000004] -> active output SPIMOSI
 	 * PBODR[30] = 0 [0x00000002] -> active output: SPICLK
-	 * PBODR[31] = 0 [0x00000001] -> active output: GPIO OUT: CS for PCUE/CCM
+	 * PBODR[31] = 0 [0x00000001] -> active output GPIO OUT: CS for PCUE/CCM
 	 * ---------------------------------------------- */
 
 	clrsetbits_be16(&cp->cp_pbodr, 0x00000007, 0x00000008);
@@ -253,14 +249,12 @@ ssize_t spi_write (uchar *addr, int alen, uchar *buffer, int len)
 		*txbuf = SPI_EEPROM_RDSR;	/* read status		*/
 		txbuf[1] = 0;
 		spi_xfer(2);
-		if (!(rxbuf[1] & 1)) {
+		if (!(rxbuf[1] & 1))
 			break;
-		}
 		udelay(1000);
 	}
-	if (i >= 1000) {
+	if (i >= 1000)
 		printf("*** spi_write: Time out while writing!\n");
-	}
 
 	return len;
 }
@@ -334,9 +328,8 @@ ssize_t spi_xfer (size_t count)
 			break;
 		udelay(1000);
 	}
-	if (tm >= 1000) {
+	if (tm >= 1000)
 		printf("*** spi_xfer: Time out while xferring to/from SPI!\n");
-	}
 
 	/* Clear CS for device */
 	setbits_be32(&cp->cp_pbdat, 0x0001);

arch/powerpc/cpu/mpc8xx/traps.c

@@ -45,7 +45,8 @@ static void print_backtrace(unsigned long *sp)
 		if (cnt++ % 7 == 0)
 			printf("\n");
 		printf("%08lX ", i);
-		if (cnt > 32) break;
+		if (cnt > 32)
+			break;
 		sp = (unsigned long *)*sp;
 	}
 	printf("\n");
@@ -58,25 +59,21 @@ void show_regs(struct pt_regs *regs)
 	printf("NIP: %08lX XER: %08lX LR: %08lX REGS: %p TRAP: %04lx DAR: %08lX\n",
 	       regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar);
 	printf("MSR: %08lx EE: %01x PR: %01x FP: %01x ME: %01x IR/DR: %01x%01x\n",
-	       regs->msr, regs->msr&MSR_EE ? 1 : 0, regs->msr&MSR_PR ? 1 : 0,
+	       regs->msr, regs->msr & MSR_EE ? 1 : 0,
-	       regs->msr & MSR_FP ? 1 : 0,regs->msr&MSR_ME ? 1 : 0,
+	       regs->msr & MSR_PR ? 1 : 0, regs->msr & MSR_FP ? 1 : 0,
-	       regs->msr&MSR_IR ? 1 : 0,
+	       regs->msr & MSR_ME ? 1 : 0, regs->msr & MSR_IR ? 1 : 0,
 	       regs->msr & MSR_DR ? 1 : 0);
 
 	printf("\n");
 	for (i = 0;  i < 32;  i++) {
 		if ((i % 8) == 0)
-		{
 			printf("GPR%02d: ", i);
-		}
 
 		printf("%08lX ", regs->gpr[i]);
 		if ((i % 8) == 7)
-		{
 			printf("\n");
 	}
 }
-}
 
 
 static void _exception(int signr, struct pt_regs *regs)
@@ -88,13 +85,13 @@ static void _exception(int signr, struct pt_regs *regs)
 
 void MachineCheckException(struct pt_regs *regs)
 {
-	unsigned long fixup;
+	unsigned long fixup = search_exception_table(regs->nip);
 
 	/* Probing PCI using config cycles cause this exception
 	 * when a device is not present.  Catch it and return to
 	 * the PCI exception handler.
 	 */
-	if ((fixup = search_exception_table(regs->nip)) != 0) {
+	if (fixup != 0) {
 		regs->nip = fixup;
 		return;
 	}

arch/powerpc/include/asm/iopin_8xx.h

@@ -27,8 +27,7 @@ typedef struct {
 #define IOPIN_PORTC	2
 #define IOPIN_PORTD	3
 
-static __inline__ void
+static inline void iopin_set_high(iopin_t *iopin)
-iopin_set_high(iopin_t *iopin)
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 
@@ -51,8 +50,7 @@ iopin_set_high(iopin_t *iopin)
 	}
 }
 
-static __inline__ void
+static inline void iopin_set_low(iopin_t *iopin)
-iopin_set_low(iopin_t *iopin)
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 
@@ -75,8 +73,7 @@ iopin_set_low(iopin_t *iopin)
 	}
 }
 
-static __inline__ uint
+static inline uint iopin_is_high(iopin_t *iopin)
-iopin_is_high(iopin_t *iopin)
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 
@@ -100,8 +97,7 @@ iopin_is_high(iopin_t *iopin)
 	return 0;
 }
 
-static __inline__ uint
+static inline uint iopin_is_low(iopin_t *iopin)
-iopin_is_low(iopin_t *iopin)
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 
@@ -125,8 +121,7 @@ iopin_is_low(iopin_t *iopin)
 	return 0;
 }
 
-static __inline__ void
+static inline void iopin_set_out(iopin_t *iopin)
-iopin_set_out(iopin_t *iopin)
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 
@@ -149,8 +144,7 @@ iopin_set_out(iopin_t *iopin)
 	}
 }
 
-static __inline__ void
+static inline void iopin_set_in(iopin_t *iopin)
-iopin_set_in(iopin_t *iopin)
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 
@@ -173,8 +167,7 @@ iopin_set_in(iopin_t *iopin)
 	}
 }
 
-static __inline__ uint
+static inline uint iopin_is_out(iopin_t *iopin)
-iopin_is_out(iopin_t *iopin)
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 
@@ -198,8 +191,7 @@ iopin_is_out(iopin_t *iopin)
 	return 0;
 }
 
-static __inline__ uint
+static inline uint iopin_is_in(iopin_t *iopin)
-iopin_is_in(iopin_t *iopin)
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 
@@ -223,8 +215,7 @@ iopin_is_in(iopin_t *iopin)
 	return 0;
 }
 
-static __inline__ void
+static inline void iopin_set_odr(iopin_t *iopin)
-iopin_set_odr(iopin_t *iopin)
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 
@@ -239,8 +230,7 @@ iopin_set_odr(iopin_t *iopin)
 	}
 }
 
-static __inline__ void
+static inline void iopin_set_act(iopin_t *iopin)
-iopin_set_act(iopin_t *iopin)
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 
@@ -255,8 +245,7 @@ iopin_set_act(iopin_t *iopin)
 	}
 }
 
-static __inline__ uint
+static inline uint iopin_is_odr(iopin_t *iopin)
-iopin_is_odr(iopin_t *iopin)
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 
@@ -272,8 +261,7 @@ iopin_is_odr(iopin_t *iopin)
 	return 0;
 }
 
-static __inline__ uint
+static inline uint iopin_is_act(iopin_t *iopin)
-iopin_is_act(iopin_t *iopin)
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 
@@ -289,8 +277,7 @@ iopin_is_act(iopin_t *iopin)
 	return 0;
 }
 
-static __inline__ void
+static inline void iopin_set_ded(iopin_t *iopin)
-iopin_set_ded(iopin_t *iopin)
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 
@@ -313,8 +300,7 @@ iopin_set_ded(iopin_t *iopin)
 	}
 }
 
-static __inline__ void
+static inline void iopin_set_gen(iopin_t *iopin)
-iopin_set_gen(iopin_t *iopin)
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 
@@ -337,8 +323,7 @@ iopin_set_gen(iopin_t *iopin)
 	}
 }
 
-static __inline__ uint
+static inline uint iopin_is_ded(iopin_t *iopin)
-iopin_is_ded(iopin_t *iopin)
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 
@@ -362,8 +347,7 @@ iopin_is_ded(iopin_t *iopin)
 	return 0;
 }
 
-static __inline__ uint
+static inline uint iopin_is_gen(iopin_t *iopin)
-iopin_is_gen(iopin_t *iopin)
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 
@@ -387,8 +371,7 @@ iopin_is_gen(iopin_t *iopin)
 	return 0;
 }
 
-static __inline__ void
+static inline void iopin_set_opt2(iopin_t *iopin)
-iopin_set_opt2(iopin_t *iopin)
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 
@@ -399,8 +382,7 @@ iopin_set_opt2(iopin_t *iopin)
 	}
 }
 
-static __inline__ void
+static inline void iopin_set_opt1(iopin_t *iopin)
-iopin_set_opt1(iopin_t *iopin)
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 
@@ -411,8 +393,7 @@ iopin_set_opt1(iopin_t *iopin)
 	}
 }
 
-static __inline__ uint
+static inline uint iopin_is_opt2(iopin_t *iopin)
-iopin_is_opt2(iopin_t *iopin)
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 
@@ -424,8 +405,7 @@ iopin_is_opt2(iopin_t *iopin)
 	return 0;
 }
 
-static __inline__ uint
+static inline uint iopin_is_opt1(iopin_t *iopin)
-iopin_is_opt1(iopin_t *iopin)
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 
@@ -437,8 +417,7 @@ iopin_is_opt1(iopin_t *iopin)
 	return 0;
 }
 
-static __inline__ void
+static inline void iopin_set_falledge(iopin_t *iopin)
-iopin_set_falledge(iopin_t *iopin)
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 
@@ -449,8 +428,7 @@ iopin_set_falledge(iopin_t *iopin)
 	}
 }
 
-static __inline__ void
+static inline void iopin_set_anyedge(iopin_t *iopin)
-iopin_set_anyedge(iopin_t *iopin)
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 
@@ -461,8 +439,7 @@ iopin_set_anyedge(iopin_t *iopin)
 	}
 }
 
-static __inline__ uint
+static inline uint iopin_is_falledge(iopin_t *iopin)
-iopin_is_falledge(iopin_t *iopin)
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 
@@ -474,8 +451,7 @@ iopin_is_falledge(iopin_t *iopin)
 	return 0;
 }
 
-static __inline__ uint
+static inline uint iopin_is_anyedge(iopin_t *iopin)
-iopin_is_anyedge(iopin_t *iopin)
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 

include/commproc.h

@@ -7,7 +7,7 @@
  *
  * This file contains structures and information for the communication
  * processor channels.  Some CPM control and status is available
- * throught the MPC8xx internal memory map.  See immap.h for details.
+ * through the MPC8xx internal memory map.  See immap.h for details.
  * This file only contains what I need for the moment, not the total
  * CPM capabilities.  I (or someone else) will add definitions as they
  * are needed.  -- Dan
@@ -81,7 +81,7 @@ typedef struct cpm_buf_desc {
 #define BD_SC_INTRPT	((ushort)0x1000)	/* Interrupt on change */
 #define BD_SC_LAST	((ushort)0x0800)	/* Last buffer in frame */
 #define BD_SC_TC	((ushort)0x0400)	/* Transmit CRC */
-#define BD_SC_CM	((ushort)0x0200)	/* Continous mode */
+#define BD_SC_CM	((ushort)0x0200)	/* Continuous mode */
 #define BD_SC_ID	((ushort)0x0100)	/* Rec'd too many idles */
 #define BD_SC_P		((ushort)0x0100)	/* xmt preamble */
 #define BD_SC_BR	((ushort)0x0020)	/* Break received */
@@ -672,7 +672,7 @@ typedef struct hdlc_pram_s {
 #define CPMVEC_PIO_PC4		((ushort)0x01 | CPMVEC_OFFSET)
 #define CPMVEC_ERROR		((ushort)0x00 | CPMVEC_OFFSET)
 
-extern void irq_install_handler(int vec, void (*handler)(void *), void *dev_id);
+void irq_install_handler(int vec, void (*handler)(void *), void *dev_id);
 
 /* CPM interrupt configuration vector.
 */
@@ -680,7 +680,7 @@ extern void irq_install_handler(int vec, void (*handler)(void *), void *dev_id);
 #define	CICR_SCC_SCC3		((uint)0x00200000)	/* SCC3 @ SCCc */
 #define	CICR_SCB_SCC2		((uint)0x00040000)	/* SCC2 @ SCCb */
 #define	CICR_SCA_SCC1		((uint)0x00000000)	/* SCC1 @ SCCa */
-#define CICR_IRL_MASK		((uint)0x0000e000)	/* Core interrrupt */
+#define CICR_IRL_MASK		((uint)0x0000e000)	/* Core interrupt */
 #define CICR_HP_MASK		((uint)0x00001f00)	/* Hi-pri int. */
 #define CICR_IEN		((uint)0x00000080)	/* Int. enable */
 #define CICR_SPS		((uint)0x00000001)	/* SCC Spread */