ARM: socfpga: Convert to DM serial
Pull the serial port configuration from DT and use DM serial instead of having the serial configuration in two places, DT and board config. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
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				|  | @ -737,6 +737,7 @@ config ARCH_SOCFPGA | ||||||
| 	select ARCH_MISC_INIT | 	select ARCH_MISC_INIT | ||||||
| 	select CPU_V7A | 	select CPU_V7A | ||||||
| 	select DM | 	select DM | ||||||
|  | 	select DM_SERIAL | ||||||
| 	select ENABLE_ARM_SOC_BOOT0_HOOK | 	select ENABLE_ARM_SOC_BOOT0_HOOK | ||||||
| 	select OF_CONTROL | 	select OF_CONTROL | ||||||
| 	select SPL_LIBCOMMON_SUPPORT | 	select SPL_LIBCOMMON_SUPPORT | ||||||
|  | @ -746,11 +747,13 @@ config ARCH_SOCFPGA | ||||||
| 	select SPL_NAND_SUPPORT if SPL_NAND_DENALI | 	select SPL_NAND_SUPPORT if SPL_NAND_DENALI | ||||||
| 	select SPL_OF_CONTROL | 	select SPL_OF_CONTROL | ||||||
| 	select SPL_SERIAL_SUPPORT | 	select SPL_SERIAL_SUPPORT | ||||||
|  | 	select SPL_DM_SERIAL | ||||||
| 	select SPL_SPI_FLASH_SUPPORT if SPL_SPI_SUPPORT | 	select SPL_SPI_FLASH_SUPPORT if SPL_SPI_SUPPORT | ||||||
| 	select SPL_SPI_SUPPORT if DM_SPI | 	select SPL_SPI_SUPPORT if DM_SPI | ||||||
| 	select SPL_WATCHDOG_SUPPORT | 	select SPL_WATCHDOG_SUPPORT | ||||||
| 	select SUPPORT_SPL | 	select SUPPORT_SPL | ||||||
| 	select SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE | 	select SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE | ||||||
|  | 	select SYS_NS16550 | ||||||
| 	select SYS_THUMB_BUILD | 	select SYS_THUMB_BUILD | ||||||
| 	imply CMD_MTDPARTS | 	imply CMD_MTDPARTS | ||||||
| 	imply CRC32_VERIFY | 	imply CRC32_VERIFY | ||||||
|  |  | ||||||
|  | @ -737,6 +737,7 @@ | ||||||
| 			reg-shift = <2>; | 			reg-shift = <2>; | ||||||
| 			reg-io-width = <4>; | 			reg-io-width = <4>; | ||||||
| 			clocks = <&l4_sp_clk>; | 			clocks = <&l4_sp_clk>; | ||||||
|  | 			clock-frequency = <100000000>; | ||||||
| 		}; | 		}; | ||||||
| 
 | 
 | ||||||
| 		uart1: serial1@ffc03000 { | 		uart1: serial1@ffc03000 { | ||||||
|  | @ -746,6 +747,7 @@ | ||||||
| 			reg-shift = <2>; | 			reg-shift = <2>; | ||||||
| 			reg-io-width = <4>; | 			reg-io-width = <4>; | ||||||
| 			clocks = <&l4_sp_clk>; | 			clocks = <&l4_sp_clk>; | ||||||
|  | 			clock-frequency = <100000000>; | ||||||
| 		}; | 		}; | ||||||
| 
 | 
 | ||||||
| 		rst: rstmgr@ffd05000 { | 		rst: rstmgr@ffd05000 { | ||||||
|  |  | ||||||
|  | @ -24,6 +24,7 @@ | ||||||
| }; | }; | ||||||
| 
 | 
 | ||||||
| &uart1 { | &uart1 { | ||||||
|  | 	clock-frequency = <50000000>; | ||||||
| 	u-boot,dm-pre-reloc; | 	u-boot,dm-pre-reloc; | ||||||
| 	status = "okay"; | 	status = "okay"; | ||||||
| }; | }; | ||||||
|  |  | ||||||
|  | @ -173,14 +173,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); | ||||||
|  * Serial Driver |  * Serial Driver | ||||||
|  */ |  */ | ||||||
| #define CONFIG_SYS_NS16550_SERIAL | #define CONFIG_SYS_NS16550_SERIAL | ||||||
| #define CONFIG_SYS_NS16550_REG_SIZE	-4 |  | ||||||
| #if defined(CONFIG_TARGET_SOCFPGA_GEN5) |  | ||||||
| #define CONFIG_SYS_NS16550_COM1		SOCFPGA_UART0_ADDRESS |  | ||||||
| #define CONFIG_SYS_NS16550_CLK		100000000 |  | ||||||
| #elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) |  | ||||||
| #define CONFIG_SYS_NS16550_COM1        SOCFPGA_UART1_ADDRESS |  | ||||||
| #define CONFIG_SYS_NS16550_CLK		50000000 |  | ||||||
| #endif |  | ||||||
| 
 | 
 | ||||||
| /*
 | /*
 | ||||||
|  * USB |  * USB | ||||||
|  |  | ||||||
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