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ARM: HYP/non-sec: Fix the ARCH Timer frequency setting. 

For some SoCs, the system clock frequency may not equal to the
ARCH Timer's frequency.

This patch uses the CONFIG_TIMER_CLK_FREQ instead of
CONFIG_SYS_CLK_FREQ, then the system clock macro and arch timer
macor could be set separately and without interfering each other.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This commit is contained in:
Xiubo Li 2014-11-21 17:40:55 +08:00 committed by York Sun
parent b8e5c7f94a
commit 73a1cb27c0
2 changed files with 3 additions and 2 deletions
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4
arch/arm/cpu/armv7/nonsec_virt.S
View File

@ -169,11 +169,11 @@ ENTRY(_nonsec_init)
* we do this here instead. * we do this here instead.
* But first check if we have the generic timer. * But first check if we have the generic timer.
*/ */
#ifdef CONFIG_SYS_CLK_FREQ #ifdef CONFIG_TIMER_CLK_FREQ
mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1 mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1
and r0, r0, #CPUID_ARM_GENTIMER_MASK @ mask arch timer bits and r0, r0, #CPUID_ARM_GENTIMER_MASK @ mask arch timer bits
cmp r0, #(1 << CPUID_ARM_GENTIMER_SHIFT) cmp r0, #(1 << CPUID_ARM_GENTIMER_SHIFT)
ldreq r1, =CONFIG_SYS_CLK_FREQ ldreq r1, =CONFIG_TIMER_CLK_FREQ
mcreq p15, 0, r1, c14, c0, 0 @ write CNTFRQ mcreq p15, 0, r1, c14, c0, 0 @ write CNTFRQ
#endif #endif

1
include/configs/sun7i.h
View File

@ -25,6 +25,7 @@
#define CONFIG_ARMV7_PSCI 1 #define CONFIG_ARMV7_PSCI 1
#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE #define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE
#define CONFIG_SYS_CLK_FREQ 24000000 #define CONFIG_SYS_CLK_FREQ 24000000
#define CONFIG_SYS_TIMER_CLK_FREQ CONFIG_SYS_CLK_FREQ
/* /*
* Include common sunxi configuration where most the settings are * Include common sunxi configuration where most the settings are