From 756fa2b3e3601722d775a12bd1a0b45b61b5f39f Mon Sep 17 00:00:00 2001 From: Rene Straub Date: Thu, 4 Jan 2018 17:33:53 +0100 Subject: [PATCH] nrhw20: review, cleanup --- board/nm/common/board_descriptor.c | 4 +- board/nm/nrhw20/board.c | 59 +++++++++++++++++++++++------- board/nm/nrhw20/board.h | 11 +++++- board/nm/nrhw20/fileaccess.c | 1 - include/configs/am335x_nrhw20.h | 19 ++++++++-- 5 files changed, 75 insertions(+), 19 deletions(-) diff --git a/board/nm/common/board_descriptor.c b/board/nm/common/board_descriptor.c index b2d29e4203..d61d4bd316 100644 --- a/board/nm/common/board_descriptor.c +++ b/board/nm/common/board_descriptor.c @@ -39,6 +39,7 @@ int bd_get_context(BD_Context *bdctx, uint32_t i2caddress, uint32_t offset) bd_bool_t rc; uint8_t bdHeader[8]; void* pBdData = NULL; + /* Read header bytes from beginning of EEPROM */ if (i2c_read( i2caddress, offset, 2, bdHeader, BD_HEADER_LENGTH )) { debug("%s() Can't read BD header from EEPROM\n", __func__); @@ -170,7 +171,8 @@ int bd_get_prodname(char *prodname, size_t len) void bd_get_hw_version(int* ver, int* rev) { - static uint8_t hwver; + // TODO: Warum static? + static uint8_t hwver; static uint8_t hwrev; if ( !_get_uint8( BD_Hw_Ver, 0, &hwver) ) diff --git a/board/nm/nrhw20/board.c b/board/nm/nrhw20/board.c index c5864a1f2c..01b5e1bd1b 100644 --- a/board/nm/nrhw20/board.c +++ b/board/nm/nrhw20/board.c @@ -1,8 +1,9 @@ /* * board.c * - * Board functions for TI AM335X based boards + * Board functions for Netmodule NRHW 20, based on AM335x EVB * + * Copyright (C) 2018 NetModule AG - http://www.netmodule.com/ * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ * * SPDX-License-Identifier: GPL-2.0+ @@ -44,14 +45,39 @@ DECLARE_GLOBAL_DATA_PTR; + +/* + * NRHW 20 GPIOs + * + * GPIO0_2: RST_GNSS~ + * GPIO0_3: GEOFENCE_GNSS + * GPIO0_4: RTK_STAT_GNSS + * GPIO0_5: EXTINT_GNSS + * GPIO0_6: TIMEPULSE_GNSS + * + * GPIO0_16: RST_PHY~ + * GPIO0_17: PMIC FAULT + * GPIO0_27: RST_SHIELD~ + * GPIO0_31: GSM_WAKE + * + * GPIO1_14: DIG_OUT + * GPIO1_15: DIG_IN + * GPIO1_20: BT_EN + * GPIO1_21: GSM_PWR_EN + * GPIO1_25: RST_GSM + * GPIO1_26: WLAN_EN + * GPIO1_27: WLAN_IRQ + * + * GPIO3_0: BUTTON + * GPIO3_4: PCIe_IO.WAKE + * GPIO3_9: PCIe_IO.W_DIS + * GPIO3_10: PCIe_IO.RST + * GPIO3_17: SIM_SEL + * GPIO3_21: RST_HUB~ (USB) + */ + /* GPIO that controls power to DDR on EVM-SK */ #define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio)) -#define GPIO_DDR_VTT_EN GPIO_TO_PIN(0, 7) -#define ICE_GPIO_DDR_VTT_EN GPIO_TO_PIN(0, 18) -#define GPIO_PR1_MII_CTRL GPIO_TO_PIN(3, 4) -#define GPIO_MUX_MII_CTRL GPIO_TO_PIN(3, 10) -#define GPIO_FET_SWITCH_CTRL GPIO_TO_PIN(0, 7) -#define GPIO_PHY_RESET GPIO_TO_PIN(2, 5) #define NETBIRD_GPIO_RST_PHY_N GPIO_TO_PIN(0, 16) #define NETBIRD_GPIO_PWR_GSM GPIO_TO_PIN(1, 21) @@ -99,6 +125,7 @@ static int _bd_init(void) } bd_register_context_list(bdctx, ARRAY_SIZE(bdctx)); + return 0; } @@ -117,8 +144,10 @@ struct serial_device *default_serial_console(void) return &eserial1_device; } else { - return &eserial2_device; - } + return &eserial1_device; + /* TODO: Check */ +/* return &eserial2_device; */ + } } #ifndef CONFIG_SKIP_LOWLEVEL_INIT @@ -142,7 +171,7 @@ static const struct cmd_control ddr3_netbird_cmd_ctrl_data = { .cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT, }; -static struct emif_regs ddr3_netbird_emif_reg_data = { +static struct emif_regs ddr3_emif_reg_data = { .sdram_config = MT41K256M16HA125E_EMIF_SDCFG, .ref_ctrl = 0x61A, /* 32ms > 85°C */ .sdram_tim1 = 0x0AAAE51B, @@ -213,7 +242,11 @@ const struct dpll_params *get_dpll_ddr_params(void) void set_uart_mux_conf(void) { +#ifdef NRHW20_ON_HW16_MODE enable_uart0_disabled_pin_mux(); +#else + disable_uart0_pin_mux(); +#endif enable_uart1_pin_mux(); } @@ -237,7 +270,7 @@ void sdram_init(void) config_ddr(DDR3_CLOCK_FREQUENCY, &ioregs_netbird, &ddr3_netbird_data, &ddr3_netbird_cmd_ctrl_data, - &ddr3_netbird_emif_reg_data, 0); + &ddr3_emif_reg_data, 0); } #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ @@ -435,7 +468,7 @@ int board_init(void) enable_ext_usb(); - printf("OSC: %lu Hz\n", get_osclk()); + printf("OSC: %lu MHz\n", get_osclk()/1000000); return 0; } @@ -549,7 +582,7 @@ static void get_hw_version(void) /* add hardware versions to environment */ bd_get_hw_version(&hw_ver, &hw_rev); - printf("HW16: V%d.%d\n", hw_ver, hw_rev); + printf("HW20: V%d.%d\n", hw_ver, hw_rev); snprintf(hw_versions, sizeof(hw_versions), "CP=%d.%d", hw_ver, hw_rev); snprintf(new_env, sizeof(new_env), "setenv bootargs $bootargs %s", hw_versions); setenv("add_version_bootargs", new_env); diff --git a/board/nm/nrhw20/board.h b/board/nm/nrhw20/board.h index fd16233e37..b7292b0111 100644 --- a/board/nm/nrhw20/board.h +++ b/board/nm/nrhw20/board.h @@ -12,18 +12,27 @@ #define _BOARD_H_ /* * We have three pin mux functions that must exist. We must be able to enable - * uart0, for initial output and i2c0 to read the main EEPROM. We then have a + * uart0, for initial output and i2c2 to read the main EEPROM. We then have a * main pinmux function that can be overridden to enable all other pinmux that * is required on the board. */ void enable_uart0_pin_mux(void); + +#ifdef NRHW20_ON_HW16_MODE void enable_uart0_disabled_pin_mux(void); +#else +void disable_uart0_pin_mux(void); +#endif + void enable_uart1_pin_mux(void); +/* void enable_uart2_pin_mux(void); void enable_uart3_pin_mux(void); void enable_uart4_pin_mux(void); void enable_uart5_pin_mux(void); +*/ void enable_i2c0_pin_mux(void); +void enable_i2c2_pin_mux(void); void enable_board_pin_mux(void); #define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio)) diff --git a/board/nm/nrhw20/fileaccess.c b/board/nm/nrhw20/fileaccess.c index 78723ac1e2..13768b032e 100644 --- a/board/nm/nrhw20/fileaccess.c +++ b/board/nm/nrhw20/fileaccess.c @@ -40,4 +40,3 @@ int read_file(const char* filename, char *buf, int size) return len; } - diff --git a/include/configs/am335x_nrhw20.h b/include/configs/am335x_nrhw20.h index d12e869817..10aecce1d9 100644 --- a/include/configs/am335x_nrhw20.h +++ b/include/configs/am335x_nrhw20.h @@ -1,7 +1,8 @@ /* - * am335x_evm.h + * am335x_nrhw20.h * * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 NetModule AG - http://www.netmodule.com/ * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as @@ -16,6 +17,16 @@ #ifndef __CONFIG_AM335X_NRHW20_H #define __CONFIG_AM335X_NRHW20_H +/* TODO: + * When this define is set, the code is still running on NBHW16 + * It allows to prepare stuff for NRHW20, without loosing test capability + * on existing HW + */ + +#define NRHW20_ON_HW16_MODE + + + #include #undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC @@ -101,7 +112,8 @@ #define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ #define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ #define CONFIG_BAUDRATE 115200 -#define CONFIG_CONS_INDEX 2 /* Use UART1 as standard UART (1 = UART0) */ +#define CONFIG_CONS_INDEX 1 /* Use UART1 as standard UART (1 = UART0) */ +/* TODO: Check whether CONFIG_CONS_INDEX can be removed --> menuconfig */ #define CONFIG_CMD_EEPROM #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ @@ -217,6 +229,7 @@ #endif /* Network. */ +/* TODO: Check CONFIG_PHY_GIGE, we don't have GigE */ #define CONFIG_PHY_GIGE #define CONFIG_PHYLIB #define CONFIG_PHY_SMSC @@ -241,7 +254,7 @@ #define CONFIG_CMD_PXE -/* Never enable ISO it is broaken and can lead to a crash */ +/* Never enable ISO it is broken and can lead to a crash */ #undef CONFIG_ISO_PARTITION #endif /* ! __CONFIG_AM335X_NRHW20_H */