LM
/
u-boot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

hancock: quirk for ethernet PHY reset 

- implement 2nd ethernet reset to properly pinstrap ethernet PHY
  after Ethernet switch is booted.
This commit is contained in:
Rene Straub 2018-06-20 13:54:40 +02:00 committed by Patrick Zysset
parent 68329cfb6d
commit 75cf0fdbbb
1 changed files with 82 additions and 174 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

256
board/nm/hancock/board.c
View File

@ -391,8 +391,6 @@ void am33xx_spl_board_init(void)
/* Set MPU Frequency to what we detected now that voltages are set */ /* Set MPU Frequency to what we detected now that voltages are set */
do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100); do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100);
printf("Console: %d\n", CONFIG_CONS_INDEX);
} }
const struct dpll_params *get_dpll_ddr_params(void) const struct dpll_params *get_dpll_ddr_params(void)
@ -439,10 +437,60 @@ static void init_ethernet(void)
REQUEST_AND_CLEAR_GPIO(GPIO_RST_ETH_N); REQUEST_AND_CLEAR_GPIO(GPIO_RST_ETH_N);
/* Minimum Reset Pulse = 5us (switch), 20us (TJA1100), 100us (SMSC8720) */ /* Minimum Reset Pulse = 5us (switch), 20us (TJA1100), 100us (SMSC8720) */
mdelay(1); mdelay(1);
/* TODO: Release reset */
gpio_set_value(GPIO_RST_ETH_N, 1); gpio_set_value(GPIO_RST_ETH_N, 1);
} }
static void init_ethernet_switch(void)
{
uint32_t val;
if (spi == 0) {
configure_module_pin_mux(spi1_pin_mux);
/* TODO: Check whether bitrate can be increased to 5..10MHz */
spi_init();
spi = spi_setup_slave(CONFIG_SJA1105_SPI_BUS /*bus*/,
CONFIG_SJA1105_SPI_CS /*cs*/,
1000000 /*max_hz*/,
SPI_MODE_1 /*spi_mode*/);
/* spi_set_wordlen(spi,32);*/
}
spi_claim_bus(spi);
/* TODO: Remove debug printout later on */
val = sja1105_read_reg(spi, 0x000000);
/* printf("Device ID: %08x\n", val); */
val = sja1105_read_reg(spi, 0x000001);
/* printf("Status Reg: %08x\n", val); */
sja1105_static_init(spi, 0 /*dummy*/);
/* Check that config was properly loaded */
val = sja1105_read_reg(spi, 0x000001);
/* printf("Status Reg: %08x\n", val); */
if ((val & 0x80000000) != 0x80000000) {
printf("ERROR: Switch configuration load failed\n");
}
/* Configure clocks */
sja1105_dynamic_init(spi);
/*
val = sja1105_read_reg(spi, 0x000001);
printf("Status Reg: %08x\n", val);
*/
/* Enable pull down on CPU Port RX_ER etc. */
sja1105_write_reg(spi, 0x100809, 0x03020313);
#if 0
val = sja1105_read_reg(spi, 0x100809);
printf("CFG_PAD_MII4_RX Reg: %08x\n", val);
#endif
spi_release_bus(spi);
}
static void init_usb_hub(void) static void init_usb_hub(void)
{ {
REQUEST_AND_CLEAR_GPIO(GPIO_RST_USB_HUB_N); REQUEST_AND_CLEAR_GPIO(GPIO_RST_USB_HUB_N);
@ -474,7 +522,6 @@ static void init_user_module(void)
puts("ready\n"); puts("ready\n");
} }
static void init_gsm(void) static void init_gsm(void)
{ {
/* /*
@ -523,56 +570,6 @@ static void init_gnss(void)
REQUEST_AND_SET_GPIO(GPIO_RST_GNSS); REQUEST_AND_SET_GPIO(GPIO_RST_GNSS);
} }
static void init_ethernet_switch(void)
{
uint32_t val;
if (spi == 0) {
configure_module_pin_mux(spi1_pin_mux);
spi_init();
spi = spi_setup_slave(CONFIG_SJA1105_SPI_BUS /*bus*/,
CONFIG_SJA1105_SPI_CS /*cs*/,
1000000 /*max_hz*/,
SPI_MODE_1 /*spi_mode*/);
/* spi_set_wordlen(spi,32);*/
}
spi_claim_bus(spi);
/* TODO: Remove debug printout later on */
val = sja1105_read_reg(spi, 0x000000);
/* printf("Device ID: %08x\n", val); */
val = sja1105_read_reg(spi, 0x000001);
/* printf("Status Reg: %08x\n", val); */
sja1105_static_init(spi, 0 /*dummy*/);
/* Check that config was properly loaded */
val = sja1105_read_reg(spi, 0x000001);
/* printf("Status Reg: %08x\n", val); */
if ((val & 0x80000000) != 0x80000000) {
printf("ERROR: Switch configuration load failed\n");
}
/* Configure clocks */
sja1105_dynamic_init(spi);
/*
val = sja1105_read_reg(spi, 0x000001);
printf("Status Reg: %08x\n", val);
*/
/* Enable pull down on CPU Port RX_ER etc. */
sja1105_write_reg(spi, 0x100809, 0x03020313);
#if 0
val = sja1105_read_reg(spi, 0x100809);
printf("CFG_PAD_MII4_RX Reg: %08x\n", val);
#endif
spi_release_bus(spi);
}
#endif /* !defined(CONFIG_SPL_BUILD) */ #endif /* !defined(CONFIG_SPL_BUILD) */
@ -608,43 +605,16 @@ int board_init(void)
#if !defined(CONFIG_SPL_BUILD) #if !defined(CONFIG_SPL_BUILD)
// TODO: Check tty logic with NRSW team
// UART1: Fixed to mains connector, always present
// UART0: Mapped to shield slot
// Can only be used when shield is installed
void set_console(void) void set_console(void)
{ {
const char *defaultconsole = getenv("defaultconsole"); const char *defaultconsole = getenv("defaultconsole");
if (defaultconsole == 0) { if (defaultconsole == 0) {
/* Use the default console */ /* Use the default console */
setenv("defaultconsole", "ttyS1"); setenv("defaultconsole", "ttyS2");
} }
#if 0
/* Don't allow changing to ttyS0 because ttyS0 is not available in the
* kernel if no comio shield is available */
if (shield_id != SHIELD_COM_IO) {
return;
}
/* With comio shield the defaultconsole should be ttyS0 and not ttyS1 */
setenv("defaultconsole", "ttyS0");
/* If consoledev is set, take this as productive console instead of default console */
if (read_file("/root/boot/consoledev", buf, 5) != 5) {
puts("Invalid file consoledev\n");
return;
}
if (strstr(buf, "tty")==buf) {
buf[5] = 0;
setenv("defaultconsole", buf);
}
#endif
} }
#if 0
static void set_devicetree_name(void) static void set_devicetree_name(void)
{ {
char devicetreename[64]; char devicetreename[64];
@ -679,7 +649,7 @@ static void get_hw_version(void)
char new_env[256]; /* current bootargs = 84 bytes */ char new_env[256]; /* current bootargs = 84 bytes */
bd_get_hw_version(&hw_ver, &hw_rev); bd_get_hw_version(&hw_ver, &hw_rev);
printf("Hank: V%d.%d\n", hw_ver, hw_rev); printf("MB: V%d.%d\n", hw_ver, hw_rev);
/* add hardware versions to environment */ /* add hardware versions to environment */
snprintf(hw_versions, sizeof(hw_versions), "CP=%d.%d", hw_ver, hw_rev); snprintf(hw_versions, sizeof(hw_versions), "CP=%d.%d", hw_ver, hw_rev);
@ -687,6 +657,18 @@ static void get_hw_version(void)
setenv("add_version_bootargs", new_env); setenv("add_version_bootargs", new_env);
} }
static void get_pmic_version(void)
{
uint8_t val = 0x00;
uint8_t ver, rev;
da9063_get_reg(PMIC_REG_CONFIG_ID, &val);
ver = (val >> 4) & 0xF;
rev = (val >> 0) & 0xF;
printf("PMIC: V%d.%d\n", ver, rev);
}
#if 0
static void check_fct(void) static void check_fct(void)
{ {
/* Check whether an I2C device (EEPROM) is present at address 0xA2/0x51 /* Check whether an I2C device (EEPROM) is present at address 0xA2/0x51
@ -738,7 +720,7 @@ static void check_reset_button(void)
if (!get_button_state()) if (!get_button_state())
break; break;
2 udelay(100*1000); /* 100ms */ udelay(100*1000); /* 100ms */
counter += 100; counter += 100;
if (counter == 2000) { if (counter == 2000) {
@ -791,14 +773,13 @@ static void check_reset_button(void)
int board_late_init(void) int board_late_init(void)
{ {
#if !defined(CONFIG_SPL_BUILD) #if !defined(CONFIG_SPL_BUILD)
/*
if (read_eeprom() < 0) if (read_eeprom() < 0)
puts("Could not get board ID.\n"); puts("Could not get board ID.\n");
get_hw_version(); get_hw_version();
get_pmic_version();
set_root_partition(); set_root_partition();
set_devicetree_name(); set_devicetree_name();
*/
/* Initialize pins */ /* Initialize pins */
REQUEST_AND_CLEAR_GPIO(GPIO_WLAN_EN); REQUEST_AND_CLEAR_GPIO(GPIO_WLAN_EN);
@ -810,7 +791,22 @@ int board_late_init(void)
REQUEST_AND_CLEAR_GPIO(GPIO_SIM_SEL); REQUEST_AND_CLEAR_GPIO(GPIO_SIM_SEL);
REQUEST_AND_CLEAR_GPIO(GPIO_RST_UI_N); REQUEST_AND_CLEAR_GPIO(GPIO_RST_UI_N);
/* FIXME: Problem switch reset lines of switch and PHY
* Clocks for PHY are only present once switch is configured
* Thus need to repeat reset sequence once in order to have
* PHY also properly bootstrapped.
* Should be reworked by giving switch a dedicated reset line
*/
init_ethernet(); init_ethernet();
init_ethernet_switch();
/* FIXME: Reset ETH system again to pin strap PHY */
mdelay(10);
gpio_set_value(GPIO_RST_ETH_N, 0);
mdelay(10);
gpio_set_value(GPIO_RST_ETH_N, 1);
init_ethernet_switch();
init_usb_hub(); init_usb_hub();
init_user_module(); init_user_module();
init_gsm(); init_gsm();
@ -833,9 +829,6 @@ int board_late_init(void)
check_fct(); check_fct();
*/ */
init_ethernet_switch();
#endif #endif
return 0; return 0;
@ -963,91 +956,6 @@ int board_fit_config_name_match(const char *name)
#if !defined(CONFIG_SPL_BUILD) #if !defined(CONFIG_SPL_BUILD)
static int do_spitest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
/* const uint8_t data[] = { 0xFF, 0xAA, 0x00 };*/
const uint8_t data[] = { 0xAA, 0x55, 0xAA, 0x55, 0x00, 0xFF };
int rc;
printf("SPI test\n");
if (spi == 0) {
/* printf("SPI1.CS Mux %08x\n", readl(0x44e10964)); */
configure_module_pin_mux(spi1_pin_mux);
/* printf("SPI1.CS Mux %08x\n", readl(0x44e10964)); */
spi_init();
spi = spi_setup_slave(CONFIG_SJA1105_SPI_BUS /*bus*/,
CONFIG_SJA1105_SPI_CS /*cs*/,
1000000 /*max_hz*/,
SPI_MODE_1 /*spi_mode*/);
}
printf("SPI Driver: %p\n", spi);
spi_claim_bus(spi);
rc = spi_xfer(spi, 8*sizeof(data) /*bitlen*/, data, NULL /*din*/, SPI_XFER_BEGIN | SPI_XFER_END /*flags*/);
printf("spi_xfer %d\n", rc);
spi_release_bus(spi);
return 0;
}
U_BOOT_CMD(
spitest, 1, 1, do_spitest,
"spi test function",
""
);
static int do_sjastart(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
uint32_t val;
if (spi == 0) {
configure_module_pin_mux(spi1_pin_mux);
spi_init();
spi = spi_setup_slave(CONFIG_SJA1105_SPI_BUS /*bus*/,
CONFIG_SJA1105_SPI_CS /*cs*/,
1000000 /*max_hz*/,
SPI_MODE_1 /*spi_mode*/);
/* spi_set_wordlen(spi,32);*/
}
spi_claim_bus(spi);
val = sja1105_read_reg(spi, 0x000000);
printf("Device ID: %08x\n", val);
val = sja1105_read_reg(spi, 0x000001);
printf("Status Reg: %08x\n", val);
sja1105_static_init(spi, 0 /*dummy*/);
val = sja1105_read_reg(spi, 0x000001);
printf("Status Reg: %08x\n", val);
sja1105_dynamic_init(spi);
val = sja1105_read_reg(spi, 0x000001);
printf("Status Reg: %08x\n", val);
spi_release_bus(spi);
return 0;
}
U_BOOT_CMD(
sjastart, 1, 1, do_sjastart,
"start and configure ETH switch",
""
);
static int do_sjainfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) static int do_sjainfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{ {
uint32_t p3_mac_stat; uint32_t p3_mac_stat;