Minor cleanup
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Wolfgang Denk
Wolfgang Denk
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177
CHANGELOG
177
CHANGELOG
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commit 00cdb4ce5e1b42248e7e6522ad0da3421b988afa
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Author: Stefan Roese <sr@denx.de>
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Date: Thu Mar 8 10:13:16 2007 +0100
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[PATCH] Update AMCC Luan 440SP eval board support
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The AMCC Luan now uses the common 440SP(e) DDR SPD code for DDR
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inititializition. This includes DDR auto calibration and support
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for different DIMM modules, instead of the fixed setup used in
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the earlier version.
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This patch also enables the cache in FLASH for the startup
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phase of U-Boot (while running from FLASH). After relocating to
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SDRAM the cache is disabled again. This will speed up the boot
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process, especially the SDRAM setup, since there are some loops
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for memory testing (auto calibration).
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit 2f5df47351910a2936c7741cf111855829200943
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Author: Stefan Roese <sr@denx.de>
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Date: Thu Mar 8 10:10:18 2007 +0100
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[PATCH] Update AMCC Yucca 440SPe eval board support
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The AMCC Yucca now uses the common 440SP(e) DDR SPD code for DDR
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inititializition. This includes DDR auto calibration and support
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for different DIMM modules, instead of the fixed setup used in
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the earlier version.
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit 2721a68a9ea91f1e494649ce68b2577261f578e2
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Author: Stefan Roese <sr@denx.de>
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Date: Thu Mar 8 10:07:18 2007 +0100
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ppc4xx: Small AMCC Katmai 440SPe update
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit df294497479b1dca6dd86318b2a912f72fede0df
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Author: Stefan Roese <sr@denx.de>
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Date: Thu Mar 8 10:06:09 2007 +0100
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ppc4xx: Update 440SP/440SPe DDR SPD setup code to support 440SP
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit fa1aef15bcd47736687be1af544506e90fba545d
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Author: Stefan Roese <sr@denx.de>
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Date: Wed Mar 7 16:43:00 2007 +0100
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[PATCH] Use dynamic SDRAM TLB setup on AMCC Ocotea eval board
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Define CONFIG_PROG_SDRAM_TLB so that the TLB entries for the
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DDR memory are dynamically programmed matching the total size
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of the equipped memory (DIMM modules).
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit e2ebe696818939e2b974628be9c921ea3fe9de13
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Author: Stefan Roese <sr@denx.de>
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Date: Wed Mar 7 16:39:36 2007 +0100
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[PATCH] Fix AMCC 44x SPD SDRAM init code to support 2 DIMM's
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This patch fixes a problem that occurs when 2 DIMM's are
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used. This problem was first spotted and fixed by Gerald Jackson
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<gerald.jackson@reaonixsecurity.com> but this patch fixes the
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problem in a little more clever way.
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This patch also adds the nice functionality to dynamically
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create the TLB entries for the SDRAM (tlb.c). So we should
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never run into such problems with wrong (too short) TLB
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initialization again on these platforms.
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As this feature is new to the "old" 44x SPD DDR driver, it
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has to be enabled via the CONFIG_PROG_SDRAM_TLB define.
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit 39218433983417b9df087976a79e3f80dd5e83d6
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Author: Wolfgang Denk <wd@denx.de>
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Date: Wed Mar 7 16:33:44 2007 +0100
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UC101: fix compiler warnings
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commit 8d7e2732221bc2d64df14f700c64c23e0a4c3dce
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Author: Wolfgang Denk <wd@pollux.denx.de>
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Date: Wed Mar 7 16:19:46 2007 +0100
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HMI1001: fix build error, cleanup compiler warnings.
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commit ad5bb451ade552c44bef9119d907929ebc2c126f
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Author: Wolfgang Denk <wd@pollux.denx.de>
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Date: Tue Mar 6 18:08:43 2007 +0100
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Restructure POST directory to support of other CPUs, boards, etc.
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commit a5284efd125967675b2e9c6ef7b95832268ad360
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Author: Wolfgang Denk <wd@pollux.denx.de>
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Date: Tue Mar 6 18:01:47 2007 +0100
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Fix HOSTARCH handling.
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Patch by Mike Frysinger, Mar 05 2007
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commit 07b7b0037aac5102939917d7cbe561b5c0d5aa44
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Author: Stefan Roese <sr@denx.de>
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Date: Tue Mar 6 07:47:04 2007 +0100
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[PATCH] Speed optimization of AMCC Sequoia/Rainier DDR2 setup
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As provided by the AMCC applications team, this patch optimizes the
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DDR2 setup for 166MHz bus speed. The values provided are also save
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to use on a "normal" 133MHz PLB bus system. Only the refresh counter
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setup has to be adjusted as done in this patch.
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For this the NAND booting version had to include the "speed.c" file
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from the cpu/ppc4xx directory. With this addition the NAND SPL image
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will just fit into the 4kbytes of program space. gcc version 4.x as
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provided with ELDK 4.x is needed to generate this optimized code.
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit ba58e4c9a9a917ce795dd16d4ec8d515f9f7aa35
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Author: Stefan Roese <sr@denx.de>
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Date: Thu Mar 1 21:11:36 2007 +0100
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[PATCH] Update AMCC Katmai 440SPe eval board support
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This patch updates the recently added Katmai board support. The biggest
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change is the support of ECC DIMM modules in the 440SP(e) SPD DDR2
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driver.
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Please note, that still some problems are left with some memory
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configurations. See the driver for more details.
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit 8c12045a3b06c5b6675d3fe02fbc9f545988129a
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Author: Stefan Roese <sr@denx.de>
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Date: Thu Mar 1 07:03:25 2007 +0100
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[PATCH] I2C: Add missing default CFG_RTC_BUS_NUM & CFG_DTT_BUS_NUM
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit ccbc7036648e465697ca298ba51e0e76dda352a0
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Author: Wolfgang Denk <wd@pollux.denx.de>
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Date: Wed Feb 28 01:28:53 2007 +0100
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SC3: fix typo in default environment
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commit e344568b1b46af85ec32d815586f91bc115d6223
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Author: Sergei Poselenov <sposelenov@emcraft.com>
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Date: Tue Feb 27 20:15:30 2007 +0300
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MCC200: Fixes for update procedure
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- fix logic error in image type handling
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- make sure file system images (cramfs etc.) get stored in flash
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with image header stripped so they can be mounted through MTD
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commit 743571145b37182757d4e688a77860b36ee77573
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Author: Wolfgang Denk <wd@pollux.denx.de>
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Date: Tue Feb 27 14:26:04 2007 +0100
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Minor code cleanup.
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commit 638dd1458bbdc2a55d4b9e25c5c4e1f838a5dc72
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Author: Sergei Poselenov <sposelenov@emcraft.com>
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Date: Tue Feb 27 12:40:16 2007 +0300
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@ -293,6 +462,14 @@ Date: Mon Feb 19 08:23:15 2007 +0100
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit 2605e90bf676d48123afe5719a846d2b52b24aac
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Author: Heiko Schocher <hs@pollux.denx.de>
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Date: Fri Feb 16 07:57:42 2007 +0100
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[PATCH] Added support for the jupiter board.
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Signed-off-by: Heiko Schocher <hs@denx.de>
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commit 497d012e5be0194e1084073d0081eb1a844796b2
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Author: Gary Jennejohn <garyj@pollux.denx.de>
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Date: Mon Feb 12 13:11:50 2007 +0100
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@ -58,7 +58,7 @@
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* 0x40000000 - 0x4fffffff - PCI Memory
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* 0x50000000 - 0x50ffffff - PCI IO Space
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*/
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//#define CONFIG_PCI
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/*#define CONFIG_PCI */
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#if defined(CONFIG_PCI)
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#define CONFIG_PCI_PNP 1
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