mips: bmips: add bcm6345-rst driver support for BCM6328
This driver can control up to 32 clocks. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
		
							parent
							
								
									efe8b9d012
								
							
						
					
					
						commit
						78118211fb
					
				| 
						 | 
					@ -6,6 +6,7 @@
 | 
				
			||||||
 | 
					
 | 
				
			||||||
#include <dt-bindings/clock/bcm6328-clock.h>
 | 
					#include <dt-bindings/clock/bcm6328-clock.h>
 | 
				
			||||||
#include <dt-bindings/gpio/gpio.h>
 | 
					#include <dt-bindings/gpio/gpio.h>
 | 
				
			||||||
 | 
					#include <dt-bindings/reset/bcm6328-reset.h>
 | 
				
			||||||
#include "skeleton.dtsi"
 | 
					#include "skeleton.dtsi"
 | 
				
			||||||
 | 
					
 | 
				
			||||||
/ {
 | 
					/ {
 | 
				
			||||||
| 
						 | 
					@ -58,6 +59,12 @@
 | 
				
			||||||
		#size-cells = <1>;
 | 
							#size-cells = <1>;
 | 
				
			||||||
		u-boot,dm-pre-reloc;
 | 
							u-boot,dm-pre-reloc;
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
							periph_rst: reset-controller@10000010 {
 | 
				
			||||||
 | 
								compatible = "brcm,bcm6345-reset";
 | 
				
			||||||
 | 
								reg = <0x10000010 0x4>;
 | 
				
			||||||
 | 
								#reset-cells = <1>;
 | 
				
			||||||
 | 
							};
 | 
				
			||||||
 | 
					
 | 
				
			||||||
		pll_cntl: syscon@10000068 {
 | 
							pll_cntl: syscon@10000068 {
 | 
				
			||||||
			compatible = "syscon";
 | 
								compatible = "syscon";
 | 
				
			||||||
			reg = <0x10000068 0x4>;
 | 
								reg = <0x10000068 0x4>;
 | 
				
			||||||
| 
						 | 
					
 | 
				
			||||||
| 
						 | 
					@ -0,0 +1,24 @@
 | 
				
			||||||
 | 
					/*
 | 
				
			||||||
 | 
					 * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
 | 
				
			||||||
 | 
					 *
 | 
				
			||||||
 | 
					 * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
 | 
				
			||||||
 | 
					 *
 | 
				
			||||||
 | 
					 * SPDX-License-Identifier:	GPL-2.0+
 | 
				
			||||||
 | 
					 */
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
					#ifndef __DT_BINDINGS_RESET_BCM6328_H
 | 
				
			||||||
 | 
					#define __DT_BINDINGS_RESET_BCM6328_H
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
					#define BCM6328_RST_SPI		0
 | 
				
			||||||
 | 
					#define BCM6328_RST_EPHY	1
 | 
				
			||||||
 | 
					#define BCM6328_RST_SAR		2
 | 
				
			||||||
 | 
					#define BCM6328_RST_ENETSW	3
 | 
				
			||||||
 | 
					#define BCM6328_RST_USBS	4
 | 
				
			||||||
 | 
					#define BCM6328_RST_USBH	5
 | 
				
			||||||
 | 
					#define BCM6328_RST_PCM		6
 | 
				
			||||||
 | 
					#define BCM6328_RST_PCIE_CORE	7
 | 
				
			||||||
 | 
					#define BCM6328_RST_PCIE	8
 | 
				
			||||||
 | 
					#define BCM6328_RST_PCIE_EXT	9
 | 
				
			||||||
 | 
					#define BCM6328_RST_PCIE_HARD	10
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
					#endif /* __DT_BINDINGS_RESET_BCM6328_H */
 | 
				
			||||||
		Loading…
	
		Reference in New Issue