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arm: dts: k3-j7200: Enable OSPI in SPL 

Add the pre-relocation property to ospi0 node to enable
OSPI boot mode. Also cleanup R5 device tree to remove
unnecessary pinmux and other settings which are already
included.

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
This commit is contained in:
Vaishnav Achath 2023-06-01 12:38:29 +05:30 committed by Udit Kumar
parent de94b52e7f
commit 7930446746
2 changed files with 16 additions and 26 deletions
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12
arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
View File

@ -167,6 +167,10 @@
bootph-pre-ram; bootph-pre-ram;
}; };
&mcu_fss0_ospi0_pins_default {
bootph-pre-ram;
};
&fss { &fss {
bootph-pre-ram; bootph-pre-ram;
}; };
@ -183,6 +187,14 @@
bootph-pre-ram; bootph-pre-ram;
}; };
&ospi0 {
bootph-pre-ram;
flash@0 {
bootph-pre-ram;
};
};
&serdes_ln_ctrl { &serdes_ln_ctrl {
u-boot,mux-autoprobe; u-boot,mux-autoprobe;
}; };

30
arch/arm/dts/k3-j7200-r5-common-proc-board.dts
View File

@ -133,25 +133,6 @@
>; >;
}; };
mcu_fss0_hpb0_pins_default: mcu-fss0-hpb0-pins-default {
pinctrl-single,pins = <
J721E_WKUP_IOPAD(0x0, PIN_OUTPUT, 1) /* (E20) MCU_OSPI0_CLK.MCU_HYPERBUS0_CK */
J721E_WKUP_IOPAD(0x4, PIN_OUTPUT, 1) /* (C21) MCU_OSPI0_LBCLKO.MCU_HYPERBUS0_CKn */
J721E_WKUP_IOPAD(0x2c, PIN_OUTPUT, 1) /* (F19) MCU_OSPI0_CSn0.MCU_HYPERBUS0_CSn0 */
J721E_WKUP_IOPAD(0x54, PIN_OUTPUT, 3) /* (E22) MCU_OSPI1_CSn1.MCU_HYPERBUS0_CSn1 */
J721E_WKUP_IOPAD(0x30, PIN_OUTPUT, 1) /* (E19) MCU_OSPI0_CSn1.MCU_HYPERBUS0_RESETn */
J721E_WKUP_IOPAD(0x8, PIN_INPUT, 1) /* (D21) MCU_OSPI0_DQS.MCU_HYPERBUS0_RWDS */
J721E_WKUP_IOPAD(0xc, PIN_INPUT, 1) /* (D20) MCU_OSPI0_D0.MCU_HYPERBUS0_DQ0 */
J721E_WKUP_IOPAD(0x10, PIN_INPUT, 1) /* (G19) MCU_OSPI0_D1.MCU_HYPERBUS0_DQ1 */
J721E_WKUP_IOPAD(0x14, PIN_INPUT, 1) /* (G20) MCU_OSPI0_D2.MCU_HYPERBUS0_DQ2 */
J721E_WKUP_IOPAD(0x18, PIN_INPUT, 1) /* (F20) MCU_OSPI0_D3.MCU_HYPERBUS0_DQ3 */
J721E_WKUP_IOPAD(0x1c, PIN_INPUT, 1) /* (F21) MCU_OSPI0_D4.MCU_HYPERBUS0_DQ4 */
J721E_WKUP_IOPAD(0x20, PIN_INPUT, 1) /* (E21) MCU_OSPI0_D5.MCU_HYPERBUS0_DQ5 */
J721E_WKUP_IOPAD(0x24, PIN_INPUT, 1) /* (B22) MCU_OSPI0_D6.MCU_HYPERBUS0_DQ6 */
J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1) /* (G21) MCU_OSPI0_D7.MCU_HYPERBUS0_DQ7 */
>;
};
wkup_gpio_pins_default: wkup-gpio-pins-default { wkup_gpio_pins_default: wkup-gpio-pins-default {
pinctrl-single,pins = < pinctrl-single,pins = <
J721E_WKUP_IOPAD(0xd8, PIN_INPUT, 7) /* (C14) WKUP_GPIO0_6 */ J721E_WKUP_IOPAD(0xd8, PIN_INPUT, 7) /* (C14) WKUP_GPIO0_6 */
@ -311,18 +292,15 @@
}; };
&hbmc { &hbmc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_fss0_hpb0_pins_default>;
reg = <0x0 0x47040000 0x0 0x100>, reg = <0x0 0x47040000 0x0 0x100>,
<0x0 0x50000000 0x0 0x8000000>; <0x0 0x50000000 0x0 0x8000000>;
ranges = <0x0 0x0 0x0 0x50000000 0x4000000>, /* 64MB Flash on CS0 */ ranges = <0x0 0x0 0x0 0x50000000 0x4000000>, /* 64MB Flash on CS0 */
<0x1 0x0 0x0 0x54000000 0x800000>; /* 8MB flash on CS1 */ <0x1 0x0 0x0 0x54000000 0x800000>; /* 8MB flash on CS1 */
flash@0,0 {
compatible = "cypress,hyperflash", "cfi-flash";
reg = <0x0 0x0 0x4000000>;
}; };
&ospi0 {
reg = <0x0 0x47040000 0x0 0x100>,
<0x0 0x50000000 0x0 0x8000000>;
}; };
&mcu_ringacc { &mcu_ringacc {