ADD: [nrhw21] added files for new platform (untested)
BugzID: 48569
This commit is contained in:
Marcel Reichmuth
parent
eab640e427
commit
7d3b90edf4
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@ -398,6 +398,14 @@ config TARGET_AM335X_NRHW20
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select DM_SERIAL
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select DM_GPIO
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config TARGET_AM335X_NRHW21
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bool "Support am335x_nrhw21"
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select CPU_V7
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select SUPPORT_SPL
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select DM
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select DM_SERIAL
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select DM_GPIO
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config TARGET_AM335X_NRHW22
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bool "Support am335x_nrhw22"
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select CPU_V7
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@ -913,6 +921,7 @@ source "board/mpl/vcma9/Kconfig"
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source "board/nm/netbird/Kconfig"
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source "board/nm/netbird_v2/Kconfig"
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source "board/nm/nrhw20/Kconfig"
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source "board/nm/nrhw21/Kconfig"
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source "board/nm/nrhw22/Kconfig"
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source "board/nm/nrhw24/Kconfig"
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source "board/olimex/mx23_olinuxino/Kconfig"
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@ -0,0 +1,26 @@
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if TARGET_AM335X_NRHW21
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config SYS_BOARD
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default "nrhw21"
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config SYS_VENDOR
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default "nm"
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config SYS_SOC
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default "am33xx"
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config SYS_CONFIG_NAME
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default "am335x_nrhw21"
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config CONS_INDEX
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int "UART used for console"
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range 1 6
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default 3
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help
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The AM335x SoC has a total of 6 UARTs (UART0 to UART5 as referenced
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in documentation, etc) available to it. Depending on your specific
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board you may want something other than UART0 as for example the IDK
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uses UART3 so enter 4 here.
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endif
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@ -0,0 +1,13 @@
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#
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# Makefile
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#
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# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
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obj-y := mux.o
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endif
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obj-y += board.o ../common/bdparser.o ../common/board_descriptor.o ../common/da9063.o fileaccess.o sja1105.o ui.o um.o
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File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,22 @@
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/*
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* board.h
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*
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* TI AM335x boards information header
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*
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* Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _BOARD_H_
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#define _BOARD_H_
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void enable_uart0_pin_mux(void);
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void enable_uart2_pin_mux(void);
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void enable_spi1_mux(void);
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void enable_board_pin_mux(void);
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#define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio))
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#endif
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@ -0,0 +1,40 @@
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#include <common.h>
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#include <fs.h>
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#define BLOCK_DEVICE "mmc"
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#define OVERLAY_PART "1:3"
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int read_file(const char* filename, char *buf, int size)
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{
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loff_t filesize = 0;
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loff_t len;
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int ret;
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if (fs_set_blk_dev(BLOCK_DEVICE, OVERLAY_PART, FS_TYPE_EXT) != 0) {
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puts("Error, can not set blk device\n");
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return -1;
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}
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/* Read at most file size bytes */
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if (fs_size(filename, &filesize)) {
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return -1;
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}
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if (filesize < size)
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size = filesize;
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/* For very unclear reasons the block device needs to be set again after the call to fs_size() */
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if (fs_set_blk_dev(BLOCK_DEVICE, OVERLAY_PART, FS_TYPE_EXT) != 0) {
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puts("Error, can not set blk device\n");
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return -1;
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}
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if ((ret = fs_read(filename, (ulong)buf, 0, size, &len))) {
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printf("Can't read file %s (size %d, len %lld, ret %d)\n", filename, size, len, ret);
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return -1;
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}
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buf[len] = 0;
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return len;
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}
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@ -0,0 +1,14 @@
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/**@file /home/eichenberger/projects/nbhw16/u-boot/board/nm/netbird_v2/fileaccess.h
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* @author eichenberger
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* @version 704
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* @date
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* Created: Tue 06 Jun 2017 02:02:33 PM CEST \n
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* Last Update: Tue 06 Jun 2017 02:02:33 PM CEST
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*/
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#ifndef FILEACCESS_H
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#define FILEACCESS_H
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void fs_set_console(void);
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int read_file(const char* filename, char *buf, int size);
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#endif // FILEACCESS_H
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@ -0,0 +1,274 @@
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/*
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* mux.c
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*
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* Copyright (C) 2018-2019 NetModule AG - http://www.netmodule.com/
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* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <common.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/mux.h>
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#include <asm/io.h>
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#include "board.h"
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static struct module_pin_mux gpio_pin_mux[] = {
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/*
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* (J18) GPIO0_16: ETH_SW_RST~ (V2.0)
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* (K15) GPIO0_17: CTRL.INT~
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* (T10) GPIO0_23: CAN_TERM1~ (V1.0)
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* (T17) GPIO0_30: LED0.GN
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*
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* (T12) GPIO1_12: SIM_SW
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* (V13) GPIO1_14: GNSS_RST~
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* (U13) GPIO1_15: CAN_TERM0~ (V1.0)
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* (R14) GPIO1_20: BT_EN
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* (V15) GPIO1_21: GSM_PWR_EN
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* (U15) GPIO1_22: LED1.RD
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* (V16) GPIO1_24: LED1.GN
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* (U16) GPIO1_25: RST_GSM
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* (T16) GPIO1_26: WLAN_EN
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* (V17) GPIO1_27: WLAN_IRQ
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* (U18) GPIO1_28: LED0.RD
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*
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* (U3) GPIO2_16: SIM_PRES~ (V2.0)
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* (R6) GPIO2_25: RST_ETH~
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*
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* (J17) GPIO3_4: GNSS_EXTINT
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* (K18) GPIO3_9: CTRL.W_DIS
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* (L18) GPIO3_10: CTRL.RST
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* (C12) GPIO3_17: UI_RST~
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* (A14) GPIO3_21: RST_HUB~ (USB)
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*/
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/* Bank 0 */
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{OFFSET(mii1_txd3), (MODE(7) | PULLUDDIS)}, /* (J18) GPIO0_16: ETH_SW_RST~ (V2.0) */
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{OFFSET(mii1_txd2), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (K15) GPIO0_17: CTRL.INT~ */
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{OFFSET(gpmc_ad9), (MODE(7) | PULLUDDIS)}, /* (T10) GPIO0_23: CAN_TERM1~ */
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{OFFSET(gpmc_wait0), (MODE(7) | PULLUDDIS)}, /* (T17) GPIO0_30: LED0.GN */
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/* Bank 1 */
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{OFFSET(gpmc_ad12), (MODE(7) | PULLUDDIS)}, /* (T12) GPIO1_12: SIM_SW */
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{OFFSET(gpmc_ad14), (MODE(7) | PULLUDDIS)}, /* (V13) GPIO1_14: GNSS_RST~ */
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{OFFSET(gpmc_ad15), (MODE(7) | PULLUDDIS)}, /* (U13) GPIO1_15: CAN_TERM0~ */
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{OFFSET(gpmc_a4), (MODE(7) | PULLUDDIS)}, /* (R14) gpio1_20: BT_EN */
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{OFFSET(gpmc_a5), (MODE(7) | PULLUDDIS)}, /* (V15) gpio1_21: GSM_PWR_EN */
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{OFFSET(gpmc_a6), (MODE(7) | PULLUDDIS)}, /* (U15) GPIO1_22: LED1.RD */
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{OFFSET(gpmc_a8), (MODE(7) | PULLUDDIS)}, /* (V16) GPIO1_24: LED1.GN */
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{OFFSET(gpmc_a9), (MODE(7) | PULLUDDIS)}, /* (U16) gpio1_25: RST_GSM */
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{OFFSET(gpmc_a10), (MODE(7) | PULLUDDIS)}, /* (T16) gpio1_26: WLAN_EN */
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{OFFSET(gpmc_a11), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (V17) gpio1_27: WLAN_IRQ */
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{OFFSET(gpmc_be1n), (MODE(7) | PULLUDDIS)}, /* (U18) GPIO1_28: LED0.RD */
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/* TODO: What about all the unused GPMC pins ? */
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/* Bank 2 */
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{OFFSET(lcd_data10), (MODE(7) | PULLUDDIS)}, /* (U3) GPIO2_16: SIM_PRES~ */
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{OFFSET(lcd_ac_bias_en), (MODE(7) | PULLUDDIS)}, /* (R6) GPIO2_25: RST_ETH~ */
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#if 0
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/* TODO: What is this meant for? */
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{OFFSET(lcd_data3), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (R4) gpio2[9] */ /* SYSBOOT_3 */
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{OFFSET(lcd_data4), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (T1) gpio2[10] */ /* SYSBOOT_4 */
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/* TODO: Check other unued pins from sysboot block */
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/* Ensure PU/PD does not work against external signal */
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/*
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* SYSBOOT 0,1,5,12,13 = Low
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* SYSBOOT 2 = High
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*/
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#endif
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/* Bank 3 */
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{OFFSET(mii1_rxdv), (MODE(7) | PULLUDDIS)}, /* (J17) GPIO3_4: GNSS_EXTINT */
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{OFFSET(mii1_txclk), (MODE(7) | PULLUDDIS)}, /* (K18) GPIO3_9: CTRL.W_DIS */
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{OFFSET(mii1_rxclk), (MODE(7) | PULLUDDIS)}, /* (L18) GPIO3_10: CTRL.RST~ */
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{OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDDIS)}, /* (C12) GPIO3_17: UI_RST~ */
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{OFFSET(mcasp0_ahclkx), (MODE(7) | PULLUDDIS)}, /* (A14) GPIO3_21: RST_HUB~ (USB) */
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{-1}
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};
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/* I2C0 PMIC */
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static struct module_pin_mux i2c0_pin_mux[] = {
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{OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (C17) I2C0_SDA */
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{OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (C16) I2C0_SCL */
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{-1}
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};
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/* I2C1 System */
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static struct module_pin_mux i2c1_pin_mux[] = {
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{OFFSET(spi0_cs0), (MODE(2) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (A16) i2c_scl */
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{OFFSET(spi0_d1), (MODE(2) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (B16) i2c_sda */
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{-1}
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};
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/* RMII1: Ethernet Switch */
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static struct module_pin_mux rmii1_pin_mux[] = {
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/* RMII */
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{OFFSET(mii1_crs), MODE(1) | PULLUDDIS | RXACTIVE}, /* (H17) rmii1_crs */
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{OFFSET(mii1_rxerr), MODE(7) | PULLUDEN | PULLDOWN_EN | RXACTIVE}, /* (J15) gpio */
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{OFFSET(mii1_rxd0), MODE(1) | PULLUDDIS | RXACTIVE}, /* (M16) rmii1_rxd0 */
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{OFFSET(mii1_rxd1), MODE(1) | PULLUDDIS | RXACTIVE}, /* (L15) rmii1_rxd1 */
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{OFFSET(mii1_txen), MODE(1) | PULLUDDIS}, /* (J16) rmii1_txen */
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{OFFSET(mii1_txd0), MODE(1) | PULLUDDIS}, /* (K17) rmii1_txd0 */
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{OFFSET(mii1_txd1), MODE(1) | PULLUDDIS}, /* (K16) rmii1_txd1 */
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{OFFSET(rmii1_refclk), MODE(0) | PULLUDDIS | RXACTIVE}, /* (H18) rmii1_refclk */
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/* SMI */
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{OFFSET(mdio_clk), MODE(0) | PULLUDDIS}, /* (M18) mdio_clk */
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{OFFSET(mdio_data), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE}, /* (M17) mdio_data */
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/* 25MHz Clock Output */
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{OFFSET(xdma_event_intr0), MODE(3)}, /* (A15) clkout1 (25 MHz clk for Switch) */
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{-1}
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};
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/* MMC0: WiFi */
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static struct module_pin_mux mmc0_sdio_pin_mux[] = {
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{OFFSET(mmc0_clk), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (G17) MMC0_CLK */
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{OFFSET(mmc0_cmd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (G18) MMC0_CMD */
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{OFFSET(mmc0_dat0), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (G16) MMC0_DAT0 */
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{OFFSET(mmc0_dat1), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (G15) MMC0_DAT1 */
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{OFFSET(mmc0_dat2), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (F18) MMC0_DAT2 */
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{OFFSET(mmc0_dat3), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (F17) MMC0_DAT3 */
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{-1}
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};
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/* MMC1: eMMC */
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static struct module_pin_mux mmc1_emmc_pin_mux[] = {
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{OFFSET(gpmc_csn1), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (U9) MMC1_CLK */
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{OFFSET(gpmc_csn2), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (V9) MMC1_CMD */
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{OFFSET(gpmc_ad0), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (U7) MMC1_DAT0 */
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{OFFSET(gpmc_ad1), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (V7) MMC1_DAT1 */
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{OFFSET(gpmc_ad2), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (R8) MMC1_DAT2 */
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{OFFSET(gpmc_ad3), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (T8) MMC1_DAT3 */
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{OFFSET(gpmc_ad4), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (U8) MMC1_DAT4 */
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{OFFSET(gpmc_ad5), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (V8) MMC1_DAT5 */
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{OFFSET(gpmc_ad6), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (R9) MMC1_DAT6 */
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{OFFSET(gpmc_ad7), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (T9) MMC1_DAT7 */
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{-1}
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};
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/* USB_DRVBUS not used -> configure as GPIO */
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static struct module_pin_mux usb_pin_mux[] = {
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{OFFSET(usb0_drvvbus), (MODE(7) | PULLUDDIS)}, /* (F16) USB0_DRVVBUS */
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{OFFSET(usb1_drvvbus), (MODE(7) | PULLUDDIS)}, /* (F15) USB1_DRVVBUS */
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{-1}
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};
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/* TODO: SPI in operational mode */
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/* What in XModem SPL Boot */
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/* SPI1 */
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static struct module_pin_mux spi1_pin_mux[] = {
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{OFFSET(ecap0_in_pwm0_out), (MODE(4) | PULLUDEN | PULLUP_EN)}, /* (C18) spi1_clk */
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{OFFSET(uart0_rtsn), (MODE(4) | PULLUDEN | PULLUP_EN)}, /* (E17) spi1_mosi */
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{OFFSET(uart0_ctsn), (MODE(4) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (E18) spi1_miso */
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{OFFSET(uart0_rxd), (MODE(1) | PULLUDEN | PULLUP_EN)}, /* (E15) spi1_cs0 */
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{OFFSET(uart0_txd), (MODE(1) | PULLUDEN | PULLUP_EN)}, /* (E16) spi1_cs1 */
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{-1}
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};
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/* CAN0: */
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static struct module_pin_mux can0_pin_mux[] = {
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{OFFSET(uart1_rtsn), (MODE(2) | RXACTIVE | PULLUDEN | PULLUP_EN)}, /* (D17) can0_rxd */
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{OFFSET(uart1_ctsn), (MODE(2) | PULLUDEN | PULLUP_EN)}, /* (D18) can0_txd */
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{-1}
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};
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/* CAN1: */
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static struct module_pin_mux can1_pin_mux[] = {
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{OFFSET(uart1_txd), (MODE(2) | RXACTIVE | PULLUDEN | PULLUP_EN)}, /* (D15) can1_rxd */
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{OFFSET(uart1_rxd), (MODE(2) | PULLUDEN | PULLUP_EN)}, /* (D16) can1_txd */
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{-1}
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};
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/* UART2: Debug/Console */
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static struct module_pin_mux uart2_pin_mux[] = {
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{OFFSET(spi0_sclk), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (A17) uart2_rxd */
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{OFFSET(spi0_d0), (MODE(1) | PULLUDEN | PULLUP_EN)}, /* (B17) uart2_txd */
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{-1}
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};
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/* UART3: GNSS */
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static struct module_pin_mux uart3_pin_mux[] = {
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{OFFSET(mii1_rxd3), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (L17) UART3_RXD */
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{OFFSET(mii1_rxd2), (MODE(1) | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (L16) UART3_TXD */
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{-1}
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};
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/* UART5: Highspeed UART for Bluetooth (no SLEWCTRL) */
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static struct module_pin_mux uart5_pin_mux[] = {
|
||||
{OFFSET(lcd_data9), (MODE(4) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (U2) UART5_RXD */
|
||||
{OFFSET(lcd_data8), (MODE(4) | PULLUDEN | PULLUP_EN)}, /* (U1) UART5_TXD */
|
||||
{OFFSET(lcd_data14), (MODE(6) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (V4) uart5_ctsn */
|
||||
{OFFSET(lcd_data15), (MODE(6) | PULLUDEN | PULLUP_EN)}, /* (T5) uart5_rtsn */
|
||||
{-1}
|
||||
};
|
||||
|
||||
static struct module_pin_mux unused_pin_mux[] = {
|
||||
/* SYSBOOT6, 7, 10, 11: Not used pulldown active, receiver disabled */
|
||||
{OFFSET(lcd_data6), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
|
||||
{OFFSET(lcd_data7), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
|
||||
{OFFSET(lcd_data11), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
|
||||
|
||||
/* TODO: GPMCA1..3, A6..8 */
|
||||
|
||||
{-1}
|
||||
};
|
||||
|
||||
/* UART0: <tbd> */
|
||||
static struct module_pin_mux uart0_pin_mux[] = {
|
||||
{OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (E15) UART0_RXD */
|
||||
{OFFSET(uart0_txd), (MODE(0) | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (E16) UART0_TXD */
|
||||
{-1}
|
||||
};
|
||||
|
||||
void enable_board_pin_mux(void)
|
||||
{
|
||||
configure_module_pin_mux(gpio_pin_mux);
|
||||
|
||||
configure_module_pin_mux(rmii1_pin_mux);
|
||||
configure_module_pin_mux(mmc0_sdio_pin_mux);
|
||||
configure_module_pin_mux(mmc1_emmc_pin_mux);
|
||||
configure_module_pin_mux(usb_pin_mux);
|
||||
|
||||
configure_module_pin_mux(i2c0_pin_mux);
|
||||
configure_module_pin_mux(i2c1_pin_mux);
|
||||
/* configure_module_pin_mux(spi1_pin_mux); */
|
||||
/* TODO: SPL Bringup */
|
||||
|
||||
configure_module_pin_mux(uart3_pin_mux);
|
||||
configure_module_pin_mux(uart5_pin_mux);
|
||||
|
||||
configure_module_pin_mux(can0_pin_mux);
|
||||
configure_module_pin_mux(can1_pin_mux);
|
||||
|
||||
configure_module_pin_mux(unused_pin_mux);
|
||||
}
|
||||
|
||||
void enable_uart0_pin_mux(void)
|
||||
{
|
||||
configure_module_pin_mux(uart0_pin_mux);
|
||||
}
|
||||
|
||||
void enable_uart2_pin_mux(void)
|
||||
{
|
||||
configure_module_pin_mux(uart2_pin_mux);
|
||||
}
|
||||
|
||||
void enable_spi1_mux(void)
|
||||
{
|
||||
configure_module_pin_mux(spi1_pin_mux);
|
||||
}
|
||||
|
|
@ -0,0 +1,274 @@
|
|||
/*
|
||||
* sja1105.c
|
||||
*
|
||||
* Functions for NXP SJA1105 Ethernet Switch
|
||||
*
|
||||
* Copyright (C) 2018 NetModule AG - http://www.netmodule.com/
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <errno.h>
|
||||
#include <spi.h>
|
||||
|
||||
#include "sja1105.h"
|
||||
|
||||
|
||||
#define SJA_OPCODE_WRITE 0x80
|
||||
#define SJA_OPCODE_READ 0x00
|
||||
#define SJA_READ_CNT(x) (((x) & 0x3F) << 1)
|
||||
|
||||
|
||||
|
||||
static struct spi_slave *sja1105_spi_bus = 0;
|
||||
static int bus_claimed = 0;
|
||||
|
||||
|
||||
void sja1105_init(struct spi_slave *spi)
|
||||
{
|
||||
sja1105_spi_bus = spi;
|
||||
}
|
||||
|
||||
void sja1105_claim_bus(void)
|
||||
{
|
||||
spi_claim_bus(sja1105_spi_bus);
|
||||
|
||||
bus_claimed++;
|
||||
}
|
||||
|
||||
void sja1105_release_bus(void)
|
||||
{
|
||||
spi_release_bus(sja1105_spi_bus);
|
||||
|
||||
bus_claimed--;
|
||||
}
|
||||
|
||||
uint32_t sja1105_read_reg(uint32_t address)
|
||||
{
|
||||
uint32_t return_value;
|
||||
uint8_t dataspi[8];
|
||||
uint8_t datain[8];
|
||||
|
||||
/* OPCODE: READ, READ CNT = 1, address from bit 24 DOWNTO bit 4 */
|
||||
|
||||
dataspi[0] = (SJA_OPCODE_READ | SJA_READ_CNT(1)) | ((address >> 20) & 0x01); /* MSB */
|
||||
dataspi[1] = (address >> 12) & 0xFF;
|
||||
dataspi[2] = (address >> 4) & 0xFF;
|
||||
dataspi[3] = (address << 4) & 0xF0;
|
||||
|
||||
dataspi[4] = 0x00; /* ignored by slave, use to readout the register */
|
||||
dataspi[5] = 0x00;
|
||||
dataspi[6] = 0x00;
|
||||
dataspi[7] = 0x00;
|
||||
|
||||
(void)spi_xfer(sja1105_spi_bus, 8*sizeof(dataspi) /*bitlen*/, dataspi, datain /*din*/, SPI_XFER_BEGIN | SPI_XFER_END /*flags*/);
|
||||
|
||||
return_value = (datain[4]<<24) | (datain[5]<<16) | (datain[6]<<8) | (datain[7]<<0);
|
||||
|
||||
return return_value;
|
||||
}
|
||||
|
||||
void sja1105_write_reg(uint32_t address, uint32_t data)
|
||||
{
|
||||
uint8_t dataspi[8];
|
||||
|
||||
/* OPCODE: WRITE, address from bit 24 DOWNTO bit 4 */
|
||||
|
||||
dataspi[0] = SJA_OPCODE_WRITE | (address >> 20 & 0x01);
|
||||
dataspi[1] = (address >> 12) & 0xFF;/* */
|
||||
dataspi[2] = (address >> 4) & 0xFF;
|
||||
dataspi[3] = (address << 4) & 0xF0;
|
||||
|
||||
dataspi[4] = (data >> 24) & 0xFF;
|
||||
dataspi[5] = (data >> 16) & 0xFF;
|
||||
dataspi[6] = (data >> 8) & 0xFF;
|
||||
dataspi[7] = data & 0xFF;
|
||||
|
||||
(void)spi_xfer(sja1105_spi_bus, 8*sizeof(dataspi) /*bitlen*/, dataspi, NULL /*din*/, SPI_XFER_BEGIN| SPI_XFER_END /*flags*/);
|
||||
}
|
||||
|
||||
void sja1105_configure_firmware(void)
|
||||
{
|
||||
static const uint8_t config_data_0[] = { 0x80, 0x20, 0x00, 0x00, 0x9E, 0x00, 0x03, 0x0E, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x21, 0x6F, 0x25, 0x6B, 0xFE, 0xF7, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF };
|
||||
static const uint8_t config_data_1[] = { 0x80, 0x20, 0x04, 0x00, 0xFE, 0xF7, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFA, 0x2E, 0x19, 0xF8, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x7D, 0x0B, 0xCB, 0xF2, 0xF8, 0x00, 0x00, 0x00, 0x00, 0x31, 0x80, 0x7F, 0x09, 0x52, 0x68, 0x0D, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1A, 0x6A, 0xF6, 0x23, 0x53, 0x10, 0x00, 0x00, 0x00, 0xF7, 0xBD, 0xF5, 0x8D, 0x10, 0x00, 0x00, 0x00, 0xEF, 0x7B, 0xF5, 0x8D, 0x10, 0x00, 0x00, 0x00, 0xDE, 0xF7, 0xF5, 0x8D, 0x10, 0x00, 0x00, 0x00, 0xBD, 0xEF, 0xF5, 0x8D, 0x10, 0x00, 0x00, 0x00, 0x7B, 0xDF, 0xF5, 0x8D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x04, 0xA6, 0x06, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23, 0xDA, 0xB5, 0xBD, 0xC8, 0x00, 0x3F, 0xFC, 0x08, 0x00, 0x00, 0x00, 0x00, 0x07, 0xFC, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00 };
|
||||
static const uint8_t config_data_2[] = { 0x80, 0x20, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0xFC, 0x08, 0x00, 0x00, 0x00, 0x00, 0x07, 0xFC, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0xFC, 0x08, 0x00, 0x00, 0x00, 0x00, 0x07, 0xFC, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0xFC, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x07, 0xFC, 0x01, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0xFC, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x07, 0xFC, 0x01, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x83, 0x75, 0xF9, 0x8D, 0x0D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x25, 0x0E, 0x7C, 0xBD, 0x00, 0x01, 0x25, 0xC0, 0x70, 0x94, 0x84, 0x50, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0xC8, 0xA7, 0xCE, 0xE6, 0x00, 0x71, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC3, 0xF7, 0x04, 0xB9, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x57, 0x1F, 0x81, 0x3F, 0x06, 0x44, 0x00, 0x00, 0x00, 0x00, 0x04, 0x08, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x0D, 0xB0, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x58, 0x00, 0x00, 0x00, 0x5A, 0x9C, 0x37, 0x20, 0x4E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x3A, 0x5D, 0x5E, 0x24, 0xA4, 0x9A, 0x00, 0x00, 0x7B, 0x51, 0xDA, 0x7D, 0x00, 0x00, 0x00, 0x00 };
|
||||
static const uint8_t config_data_3[] = { 0x80, 0x20, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x37, 0x6E, 0x02, 0x8B };
|
||||
|
||||
uint32_t val;
|
||||
int rc;
|
||||
|
||||
rc = spi_xfer(sja1105_spi_bus, 8*sizeof(config_data_0) /*bitlen*/, config_data_0, NULL, SPI_XFER_BEGIN | SPI_XFER_END /*flags*/);
|
||||
if (rc != 0)
|
||||
printf ("spi_xfer fail for config data 0\n");
|
||||
|
||||
rc = spi_xfer(sja1105_spi_bus, 8*sizeof(config_data_1) /*bitlen*/, config_data_1, NULL, SPI_XFER_BEGIN | SPI_XFER_END /*flags*/);
|
||||
if (rc != 0)
|
||||
printf ("spi_xfer fail for config data 1\n");
|
||||
|
||||
rc = spi_xfer(sja1105_spi_bus, 8*sizeof(config_data_2) /*bitlen*/, config_data_2, NULL, SPI_XFER_BEGIN | SPI_XFER_END /*flags*/);
|
||||
if (rc != 0)
|
||||
printf ("spi_xfer fail for config data 2\n");
|
||||
|
||||
rc = spi_xfer(sja1105_spi_bus, 8*sizeof(config_data_3) /*bitlen*/, config_data_3, NULL, SPI_XFER_BEGIN | SPI_XFER_END /*flags*/);
|
||||
if (rc != 0)
|
||||
printf ("spi_xfer fail for config data 3\n");
|
||||
|
||||
/* Check that config was properly loaded */
|
||||
val = sja1105_read_reg(SJA_REG_CONFIG_STATUS);
|
||||
if ((val & 0x80000000) != 0x80000000) { // TODO: Define bitmask
|
||||
printf("ERROR: Switch configuration load failed\n");
|
||||
|
||||
// TODO: provide return code.
|
||||
}
|
||||
}
|
||||
|
||||
void sja1105_configure_mode_and_clocks(void)
|
||||
{
|
||||
sja1105_write_reg( 0x10000A, 0x0A010141); /* PLL 1 setup for 50MHz */
|
||||
sja1105_write_reg( 0x10000A, 0x0A010940); /* PLL 1 setup for 50MHz */
|
||||
|
||||
/* Port 0: RMII (PHY mode = external REFCLK) */
|
||||
sja1105_write_reg( 0x10000B, 0x0A000001); // Disable IDIV0
|
||||
sja1105_write_reg( 0x100015, 0x00000800); // CLKSRC of RMII_REF_CLK_0 = TX_CLK_0
|
||||
|
||||
/* Port 1: RMII (MAC mode) */
|
||||
sja1105_write_reg( 0x10000C, 0x0A000001); // Disable IDIV1
|
||||
sja1105_write_reg( 0x10001C, 0x02000800); // CLKSRC of RMII_REF_CLK_1 = TX_CLK_1
|
||||
sja1105_write_reg( 0x10001F, 0x0E000800); // CLKSRC of EXT_TX_CLK1 = PLL1 (50 MHz)
|
||||
|
||||
/* Port 2: RMII (MAC mode) */
|
||||
sja1105_write_reg( 0x10000D, 0x0A000001); // Disable IDIV2
|
||||
sja1105_write_reg( 0x100023, 0x04000800); // CLKSRC of RMII_REF_CLK_2 = TX_CLK_2
|
||||
sja1105_write_reg( 0x100026, 0x0E000800); // CLKSRC of EXT_TX_CLK2 = PLL1 (50 MHz)
|
||||
|
||||
/* Port 3: RMII (MAC mode) */
|
||||
sja1105_write_reg( 0x10000E, 0x0A000001); // Disable IDIV3
|
||||
sja1105_write_reg( 0x10002A, 0x06000800); // CLKSRC of RMII_REF_CLK_3 = TX_CLK_3
|
||||
sja1105_write_reg( 0x10002D, 0x0E000800); // CLKSRC of EXT_TX_CLK3 = PLL1 (50 MHz)
|
||||
|
||||
/* Port 4: RMII (PHY mode = external REFCLK) */
|
||||
sja1105_write_reg( 0x10000F, 0x0A000001); // Disable IDIV4
|
||||
sja1105_write_reg( 0x100031, 0x08000800); // CLKSRC of RMII_REF_CLK_4 = TX_CLK_4
|
||||
}
|
||||
|
||||
void sja1105_configure_io(void)
|
||||
{
|
||||
/* Port 0 and Port 4 RX */
|
||||
/* Enable pull down on CPU Port RX_DV/CRS_DV/RX_CTL and RX_ER and RX_CLK/RXC and RXD2 RXD3 */
|
||||
sja1105_write_reg(0x100801, 0x03020313);
|
||||
sja1105_write_reg(0x100809, 0x03020313);
|
||||
|
||||
/* Port 1 to Port 3 RX */
|
||||
/* Enable pull down on CPU Port ... and RX_CLK/RXC and RXD2 RXD3 */
|
||||
// TODO: What is ...
|
||||
sja1105_write_reg(0x100803, 0x03020213);
|
||||
sja1105_write_reg(0x100805, 0x03020213);
|
||||
sja1105_write_reg(0x100807, 0x03020213);
|
||||
|
||||
/* Port 0 to Port 4 TX */
|
||||
/* Enable pull down on CPU Port TX_ER and TXD2 TXD3 */
|
||||
sja1105_write_reg(0x100800, 0x13121312);
|
||||
sja1105_write_reg(0x100802, 0x13121312);
|
||||
sja1105_write_reg(0x100804, 0x13121312);
|
||||
sja1105_write_reg(0x100806, 0x13121312);
|
||||
sja1105_write_reg(0x100808, 0x13121312);
|
||||
}
|
||||
|
||||
#if 0
|
||||
/*
|
||||
* readout and print the configured IO pads (unused IOs)
|
||||
*/
|
||||
static void sja1105_read_io(void)
|
||||
{
|
||||
uint32_t val;
|
||||
|
||||
val = sja1105_read_reg(0x100801);
|
||||
printf("CFG_PAD_MII0_RX Reg: %08x\n", val);
|
||||
val = sja1105_read_reg(0x100800);
|
||||
printf("CFG_PAD_MII0_TX Reg: %08x\n", val);
|
||||
|
||||
val = sja1105_read_reg(0x100803);
|
||||
printf("CFG_PAD_MII1_RX Reg: %08x\n", val);
|
||||
val = sja1105_read_reg(0x100802);
|
||||
printf("CFG_PAD_MII1_TX Reg: %08x\n", val);
|
||||
|
||||
val = sja1105_read_reg(0x100805);
|
||||
printf("CFG_PAD_MII2_RX Reg: %08x\n", val);
|
||||
val = sja1105_read_reg(0x100804);
|
||||
printf("CFG_PAD_MII2_TX Reg: %08x\n", val);
|
||||
|
||||
val = sja1105_read_reg(0x100807);
|
||||
printf("CFG_PAD_MII3_RX Reg: %08x\n", val);
|
||||
val = sja1105_read_reg(0x100806);
|
||||
printf("CFG_PAD_MII3_TX Reg: %08x\n", val);
|
||||
|
||||
val = sja1105_read_reg(0x100809);
|
||||
printf("CFG_PAD_MII4_RX Reg: %08x\n", val);
|
||||
val = sja1105_read_reg(0x100808);
|
||||
printf("CFG_PAD_MII4_TX Reg: %08x\n", val);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#if !defined(CONFIG_SPL_BUILD)
|
||||
|
||||
static int do_sjainfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
|
||||
{
|
||||
uint32_t p0_mac_stat;
|
||||
uint32_t p0_txf;
|
||||
uint32_t p0_rxf;
|
||||
uint32_t p1_mac_stat;
|
||||
uint32_t p1_txf;
|
||||
uint32_t p1_rxf;
|
||||
uint32_t p2_mac_stat;
|
||||
uint32_t p2_rxf;
|
||||
uint32_t p2_txf;
|
||||
uint32_t p3_mac_stat;
|
||||
uint32_t p3_txf;
|
||||
uint32_t p3_rxf;
|
||||
uint32_t p4_mac_stat;
|
||||
uint32_t p4_rxf;
|
||||
uint32_t p4_txf;
|
||||
|
||||
sja1105_claim_bus();
|
||||
|
||||
p0_mac_stat = sja1105_read_reg(0x00200);
|
||||
p0_rxf = sja1105_read_reg(0x00406);
|
||||
p0_txf = sja1105_read_reg(0x00402);
|
||||
|
||||
p1_mac_stat = sja1105_read_reg(0x00202);
|
||||
p1_rxf = sja1105_read_reg(0x00416);
|
||||
p1_txf = sja1105_read_reg(0x00412);
|
||||
|
||||
p2_mac_stat = sja1105_read_reg(0x00204);
|
||||
p2_rxf = sja1105_read_reg(0x00426);
|
||||
p2_txf = sja1105_read_reg(0x00422);
|
||||
|
||||
p3_mac_stat = sja1105_read_reg(0x00206);
|
||||
p3_rxf = sja1105_read_reg(0x00436);
|
||||
p3_txf = sja1105_read_reg(0x00432);
|
||||
|
||||
p4_mac_stat = sja1105_read_reg(0x00208);
|
||||
p4_rxf = sja1105_read_reg(0x00446);
|
||||
p4_txf = sja1105_read_reg(0x00442);
|
||||
|
||||
sja1105_release_bus();
|
||||
|
||||
printf("Port MAC Stat Rx Tx\n");
|
||||
printf("0 (UM) : %08x %u %u\n", p0_mac_stat, p0_rxf, p0_txf);
|
||||
printf("1 (BroadR-0) : %08x %u %u\n", p1_mac_stat, p1_rxf, p1_txf);
|
||||
printf("2 (BroadR-1) : %08x %u %u\n", p2_mac_stat, p2_rxf, p2_txf);
|
||||
printf("3 (100bTx) : %08x %u %u\n", p3_mac_stat, p3_rxf, p3_txf);
|
||||
printf("4 (CPU) : %08x %u %u\n", p4_mac_stat, p4_rxf, p4_txf);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
U_BOOT_CMD(
|
||||
sjainfo, 1, 1, do_sjainfo,
|
||||
"show eth switch information",
|
||||
""
|
||||
);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,89 @@
|
|||
/*
|
||||
* sja1105.c
|
||||
*
|
||||
* Functions for NXP SJA1105 Ethernet Switch
|
||||
*
|
||||
* Copyright (C) 2018 NetModule AG - http://www.netmodule.com/
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
#ifndef _SJA1105_H_
|
||||
#define _SJA1105_H_
|
||||
|
||||
#define SJA_REG_DEVICE_ID 0x000000
|
||||
#define SJA_REG_CONFIG_STATUS 0x000001
|
||||
|
||||
/**
|
||||
* Initializes the sja1105 driver.
|
||||
*
|
||||
* Must be called before any other function can be used.
|
||||
* Takes and remembers SPI driver for later calls.
|
||||
*
|
||||
* @param spi SPI driver instance
|
||||
*/
|
||||
void sja1105_init(struct spi_slave *spi);
|
||||
|
||||
/**
|
||||
* Claims bus for subsequent switch accesses.
|
||||
*/
|
||||
void sja1105_claim_bus(void);
|
||||
|
||||
/**
|
||||
* Releases bus.
|
||||
*/
|
||||
void sja1105_release_bus(void);
|
||||
|
||||
/**
|
||||
* Reads switch register.
|
||||
*
|
||||
* (multiple register not possible with this function)
|
||||
*
|
||||
* @param address register to read (range 0x0 to 0x100BC3)
|
||||
* @returns readback data
|
||||
*/
|
||||
uint32_t sja1105_read_reg(uint32_t address);
|
||||
|
||||
/**
|
||||
* Writes switch register.
|
||||
*
|
||||
* @param address register to write (range 0x0 to 0x100BC3)
|
||||
* @param data data to write
|
||||
*/
|
||||
void sja1105_write_reg(uint32_t address, uint32_t data);
|
||||
|
||||
/**
|
||||
* Loads switch firmware.
|
||||
*
|
||||
* This function must be called after the switch has been powered up
|
||||
*
|
||||
* When the device is powered up, it expects to receive an input stream
|
||||
* containing initial setup information over the configuration interface.
|
||||
* The initial configuration data sets the port modes, sets up VLANs
|
||||
* and defines other forwarding and quality-of-service rules.
|
||||
*
|
||||
* This function takes care of loading the configuration according to the
|
||||
* SJA1105 user manual.
|
||||
*/
|
||||
void sja1105_configure_firmware(void);
|
||||
|
||||
/**
|
||||
* Configures the PLL, the CGU and the Auxiliary Configuration Unit.
|
||||
*
|
||||
* Notes: sja1105_configure_firmware() must be called prior to this function.
|
||||
*
|
||||
* Mode and clock description :
|
||||
* - RMII operation on all ports:
|
||||
* - PLL 1 setup for 50Mhz
|
||||
* - Port 0 and 4: RMII (PHY mode = external REFCLK)
|
||||
* - Port 1,2 and 3: RMII (MAC mode)
|
||||
*/
|
||||
void sja1105_configure_mode_and_clocks(void);
|
||||
|
||||
/**
|
||||
* Configures IO pads to a safe state.
|
||||
*
|
||||
* Unused I/Os: Sets pull down to unused pins and set drive strengths
|
||||
*/
|
||||
void sja1105_configure_io(void);
|
||||
|
||||
#endif /* _SJA1105_H_ */
|
||||
|
|
@ -0,0 +1,158 @@
|
|||
/*
|
||||
* Copyright (c) 2004-2008 Texas Instruments
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(_start)
|
||||
SECTIONS
|
||||
{
|
||||
. = 0x00000000;
|
||||
|
||||
. = ALIGN(4);
|
||||
.text :
|
||||
{
|
||||
*(.__image_copy_start)
|
||||
*(.vectors)
|
||||
CPUDIR/start.o (.text*)
|
||||
board/nm/nrhw21/built-in.o (.text*)
|
||||
*(.text*)
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
|
||||
|
||||
. = ALIGN(4);
|
||||
.data : {
|
||||
*(.data*)
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
. = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
.u_boot_list : {
|
||||
KEEP(*(SORT(.u_boot_list*)));
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
.__efi_runtime_start : {
|
||||
*(.__efi_runtime_start)
|
||||
}
|
||||
|
||||
.efi_runtime : {
|
||||
*(efi_runtime_text)
|
||||
*(efi_runtime_data)
|
||||
}
|
||||
|
||||
.__efi_runtime_stop : {
|
||||
*(.__efi_runtime_stop)
|
||||
}
|
||||
|
||||
.efi_runtime_rel_start :
|
||||
{
|
||||
*(.__efi_runtime_rel_start)
|
||||
}
|
||||
|
||||
.efi_runtime_rel : {
|
||||
*(.relefi_runtime_text)
|
||||
*(.relefi_runtime_data)
|
||||
}
|
||||
|
||||
.efi_runtime_rel_stop :
|
||||
{
|
||||
*(.__efi_runtime_rel_stop)
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
.image_copy_end :
|
||||
{
|
||||
*(.__image_copy_end)
|
||||
}
|
||||
|
||||
.rel_dyn_start :
|
||||
{
|
||||
*(.__rel_dyn_start)
|
||||
}
|
||||
|
||||
.rel.dyn : {
|
||||
*(.rel*)
|
||||
}
|
||||
|
||||
.rel_dyn_end :
|
||||
{
|
||||
*(.__rel_dyn_end)
|
||||
}
|
||||
|
||||
.hash : { *(.hash*) }
|
||||
|
||||
.end :
|
||||
{
|
||||
*(.__end)
|
||||
}
|
||||
|
||||
_image_binary_end = .;
|
||||
|
||||
/*
|
||||
* Deprecated: this MMU section is used by pxa at present but
|
||||
* should not be used by new boards/CPUs.
|
||||
*/
|
||||
. = ALIGN(4096);
|
||||
.mmutable : {
|
||||
*(.mmutable)
|
||||
}
|
||||
|
||||
/*
|
||||
* Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
|
||||
* __bss_base and __bss_limit are for linker only (overlay ordering)
|
||||
*/
|
||||
|
||||
.bss_start __rel_dyn_start (OVERLAY) : {
|
||||
KEEP(*(.__bss_start));
|
||||
__bss_base = .;
|
||||
}
|
||||
|
||||
.bss __bss_base (OVERLAY) : {
|
||||
*(.bss*)
|
||||
. = ALIGN(4);
|
||||
__bss_limit = .;
|
||||
}
|
||||
|
||||
.bss_end __bss_limit (OVERLAY) : {
|
||||
KEEP(*(.__bss_end));
|
||||
}
|
||||
|
||||
.dynsym _image_binary_end : { *(.dynsym) }
|
||||
.dynbss : { *(.dynbss) }
|
||||
.dynstr : { *(.dynstr*) }
|
||||
.dynamic : { *(.dynamic*) }
|
||||
.gnu.hash : { *(.gnu.hash) }
|
||||
.plt : { *(.plt*) }
|
||||
.interp : { *(.interp*) }
|
||||
.gnu : { *(.gnu*) }
|
||||
.ARM.exidx : { *(.ARM.exidx*) }
|
||||
}
|
||||
|
|
@ -0,0 +1,219 @@
|
|||
/*
|
||||
* ui.c
|
||||
*
|
||||
* User Interface access
|
||||
*
|
||||
* Copyright (C) 2018 NetModule AG - http://www.netmodule.com/
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <errno.h>
|
||||
#include <i2c.h>
|
||||
|
||||
#include "ui.h"
|
||||
|
||||
/* TODO: Define as masks */
|
||||
/* HW V1.0: PCA9539BS (16 Bit) */
|
||||
#define UI_V1_TOP_LED_GREEN 6
|
||||
#define UI_V1_TOP_LED_RED 7
|
||||
#define UI_V1_BOTTOM_LED_GREEN 9
|
||||
#define UI_V1_BOTTOM_LED_RED 8
|
||||
|
||||
/* HW V2.0: PCA9538ABS (8 Bit) */
|
||||
#define UI_V2_ID_0 0
|
||||
#define UI_V2_ID_1 1
|
||||
#define UI_V2_TOP_LED_GREEN 2
|
||||
#define UI_V2_TOP_LED_RED 3
|
||||
#define UI_V2_BOTTOM_LED_GREEN 6
|
||||
#define UI_V2_BOTTOM_LED_RED 5
|
||||
|
||||
|
||||
#define PCA9538_OUT_REG 0x01
|
||||
#define PCA9538_CONF_REG 0x03
|
||||
|
||||
#define PCA9539_OUT_REG 0x02
|
||||
#define PCA9539_CONF_REG 0x06
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
static int ioext_i2c_bus = 0;
|
||||
|
||||
/* -1: unitialized, 0: UI not available, 1: UI V1.x, 2: UI V2.x */
|
||||
static int hw_version = -1;
|
||||
static int bus_claimed = 0;
|
||||
|
||||
static uint8_t out_reg[2];
|
||||
|
||||
|
||||
|
||||
static void set_output(uint bit, bool state)
|
||||
{
|
||||
if (state) {
|
||||
out_reg[bit/8U] &= ~(1U << (bit % 8U));
|
||||
}
|
||||
else {
|
||||
out_reg[bit/8U] |= (1U << (bit % 8U));
|
||||
}
|
||||
}
|
||||
|
||||
static int switch_i2c_bus(int* old_bus)
|
||||
{
|
||||
int ret = 0;
|
||||
|
||||
if (old_bus == 0)
|
||||
return -1;
|
||||
|
||||
*old_bus = i2c_get_bus_num();
|
||||
if (*old_bus != ioext_i2c_bus) {
|
||||
ret = i2c_set_bus_num(ioext_i2c_bus);
|
||||
}
|
||||
|
||||
bus_claimed++;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void revert_i2c_bus(int bus)
|
||||
{
|
||||
if (ioext_i2c_bus != bus) {
|
||||
(void)i2c_set_bus_num(bus);
|
||||
}
|
||||
|
||||
bus_claimed--;
|
||||
}
|
||||
|
||||
static void detect_version(void)
|
||||
{
|
||||
int ret;
|
||||
uint8_t temp = 0;
|
||||
|
||||
hw_version = 0;
|
||||
|
||||
/* Try to detect PCA9539 on V1.x HW */
|
||||
ret = i2c_read(CONFIG_UI_V1_I2C_ADDR, 0x00, 1, &temp, 1);
|
||||
if (ret == 0) {
|
||||
hw_version = 1;
|
||||
}
|
||||
|
||||
if (hw_version == 0) {
|
||||
/* Try to detect PCA9538 on V2.x HW */
|
||||
ret = i2c_read(CONFIG_UI_V2_I2C_ADDR, 0x00, 1, &temp, 1);
|
||||
if (ret == 0) {
|
||||
hw_version = 2;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void init_io(void)
|
||||
{
|
||||
switch (hw_version) {
|
||||
case 1: {
|
||||
uint8_t dir[2] = { 0x00, 0x00 }; /* All IOs = Outputs */
|
||||
(void)i2c_write(CONFIG_UI_V1_I2C_ADDR, PCA9539_CONF_REG, 1, dir, 2);
|
||||
|
||||
out_reg[0] = 0xFF;
|
||||
out_reg[1] = 0xFF;
|
||||
break;
|
||||
}
|
||||
|
||||
case 2: {
|
||||
uint8_t dir[1] = { 0x03 }; /* Keep IO 0 & 1 as inputs */
|
||||
(void)i2c_write(CONFIG_UI_V2_I2C_ADDR, PCA9538_CONF_REG, 1, dir, 1);
|
||||
|
||||
out_reg[0] = 0xFF;
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static void v1_set_top_leds(int red, int green)
|
||||
{
|
||||
set_output(UI_V1_TOP_LED_RED, red);
|
||||
set_output(UI_V1_TOP_LED_GREEN, green);
|
||||
|
||||
(void)i2c_write(CONFIG_UI_V1_I2C_ADDR, PCA9539_OUT_REG, 1, out_reg, 2);
|
||||
}
|
||||
|
||||
static void v1_set_bottom_leds(int red, int green)
|
||||
{
|
||||
set_output(UI_V1_BOTTOM_LED_RED, red);
|
||||
set_output(UI_V1_BOTTOM_LED_GREEN, green);
|
||||
|
||||
(void)i2c_write(CONFIG_UI_V1_I2C_ADDR, PCA9539_OUT_REG, 1, out_reg, 2);
|
||||
}
|
||||
|
||||
static void v2_set_top_leds(int red, int green)
|
||||
{
|
||||
set_output(UI_V2_TOP_LED_RED, red);
|
||||
set_output(UI_V2_TOP_LED_GREEN, green);
|
||||
|
||||
(void)i2c_write(CONFIG_UI_V2_I2C_ADDR, PCA9538_OUT_REG, 1, out_reg, 1);
|
||||
}
|
||||
|
||||
static void v2_set_bottom_leds(int red, int green)
|
||||
{
|
||||
set_output(UI_V2_BOTTOM_LED_RED, red);
|
||||
set_output(UI_V2_BOTTOM_LED_GREEN, green);
|
||||
|
||||
(void)i2c_write(CONFIG_UI_V2_I2C_ADDR, PCA9538_OUT_REG, 1, out_reg, 1);
|
||||
}
|
||||
|
||||
|
||||
void ui_init(int i2c_bus)
|
||||
{
|
||||
int bus = -1;
|
||||
int claimed;
|
||||
|
||||
ioext_i2c_bus = i2c_bus;
|
||||
|
||||
claimed = switch_i2c_bus(&bus);
|
||||
if (claimed == 0) {
|
||||
detect_version();
|
||||
init_io();
|
||||
}
|
||||
revert_i2c_bus(bus);
|
||||
}
|
||||
|
||||
int ui_version(void)
|
||||
{
|
||||
return hw_version;
|
||||
}
|
||||
|
||||
void ui_set_top_led(int red, int green)
|
||||
{
|
||||
int bus = -1;
|
||||
int claimed;
|
||||
|
||||
claimed = switch_i2c_bus(&bus);
|
||||
if (claimed == 0) {
|
||||
switch (hw_version) {
|
||||
case 1: v1_set_top_leds(red, green); break;
|
||||
case 2: v2_set_top_leds(red, green); break;
|
||||
default: break;
|
||||
}
|
||||
revert_i2c_bus(bus);
|
||||
}
|
||||
}
|
||||
|
||||
void ui_set_bottom_led(int red, int green)
|
||||
{
|
||||
int bus = -1;
|
||||
int claimed;
|
||||
|
||||
claimed = switch_i2c_bus(&bus);
|
||||
if (claimed == 0) {
|
||||
switch (hw_version) {
|
||||
case 1: v1_set_bottom_leds(red, green); break;
|
||||
case 2: v2_set_bottom_leds(red, green); break;
|
||||
default: break;
|
||||
}
|
||||
revert_i2c_bus(bus);
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,39 @@
|
|||
/*
|
||||
* ui.c
|
||||
*
|
||||
* User Interface access
|
||||
*
|
||||
* Copyright (C) 2018 NetModule AG - http://www.netmodule.com/
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#ifndef UI_H
|
||||
#define UI_H
|
||||
|
||||
|
||||
#define CONFIG_UI_I2C_BUS 1
|
||||
|
||||
#define CONFIG_UI_V1_I2C_ADDR 0x74
|
||||
#define CONFIG_UI_V2_I2C_ADDR 0x70
|
||||
|
||||
|
||||
/**
|
||||
* Initializes user interface module.
|
||||
*
|
||||
* @param i2c_bus Number of I2C bus UI is attached to.
|
||||
*/
|
||||
extern void ui_init(int i2c_bus);
|
||||
|
||||
/**
|
||||
* Returns hardware version of UI.
|
||||
*
|
||||
* @return 0: No or unknown UI
|
||||
* >0: Version (e.g. 1 or 2)
|
||||
*/
|
||||
extern int ui_version(void);
|
||||
|
||||
void ui_set_top_led(int red, int green);
|
||||
void ui_set_bottom_led(int red, int green);
|
||||
|
||||
#endif /* UI_H */
|
||||
|
|
@ -0,0 +1,171 @@
|
|||
/*
|
||||
* um.c
|
||||
*
|
||||
* User Module Access
|
||||
*
|
||||
* Copyright (C) 2019 NetModule AG - http://www.netmodule.com/
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <errno.h>
|
||||
#include <i2c.h>
|
||||
|
||||
#include "um.h"
|
||||
|
||||
|
||||
static int um_i2c_bus = 0;
|
||||
static int bus_claimed = 0;
|
||||
|
||||
static int module_present = 0;
|
||||
static um_type_t module_type = UM_TYPE_RESERVED;
|
||||
static int hw_version = 0;
|
||||
static int hw_revision = 0;
|
||||
static struct in_addr ipv4_addr;
|
||||
static struct in_addr ipv4_mask;
|
||||
|
||||
|
||||
static int switch_i2c_bus(int* old_bus)
|
||||
{
|
||||
int ret = 0;
|
||||
|
||||
if (old_bus == NULL)
|
||||
return -1;
|
||||
|
||||
*old_bus = i2c_get_bus_num();
|
||||
if (*old_bus != um_i2c_bus) {
|
||||
ret = i2c_set_bus_num(um_i2c_bus);
|
||||
}
|
||||
|
||||
bus_claimed++;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void revert_i2c_bus(int bus)
|
||||
{
|
||||
if (um_i2c_bus != bus) {
|
||||
(void)i2c_set_bus_num(bus);
|
||||
}
|
||||
|
||||
bus_claimed--;
|
||||
}
|
||||
|
||||
static void get_version(void)
|
||||
{
|
||||
int ret;
|
||||
uint8_t reg[1];
|
||||
|
||||
ret = i2c_read(CONFIG_UM_I2C_ADDR, UM_REG_HW_VER, 1, reg, 1);
|
||||
if (ret == 0) {
|
||||
hw_version = (reg[0] >> 4) & 0x0F;
|
||||
hw_revision = (reg[0] >> 0) & 0x0F;
|
||||
} else {
|
||||
puts("error reading user module version\n");
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static void set_inaddr(const uint8_t* data, struct in_addr* in)
|
||||
{
|
||||
in->s_addr = htonl(data[0] << 24 | data[1] << 16 | data[2] << 8 | data[3] << 0);
|
||||
}
|
||||
|
||||
static void get_network_address(void)
|
||||
{
|
||||
int ret;
|
||||
uint8_t data[8];
|
||||
|
||||
ret = i2c_read(CONFIG_UM_I2C_ADDR, UM_REG_IPV4_ADDR, 1, data, 8);
|
||||
if (ret == 0) {
|
||||
set_inaddr(&data[0], &ipv4_addr);
|
||||
set_inaddr(&data[4], &ipv4_mask);
|
||||
} else {
|
||||
puts("error reading user module network configuration\n");
|
||||
}
|
||||
}
|
||||
|
||||
static void detect(void)
|
||||
{
|
||||
int ret;
|
||||
int i;
|
||||
uint8_t reg[2];
|
||||
|
||||
hw_version = 0;
|
||||
|
||||
/* We don't know how fast the UM boots, try for up to 500 msecs */
|
||||
for (i=0; i<500/10; i++) {
|
||||
/* Try to read detect and type register */
|
||||
ret = i2c_read(CONFIG_UM_I2C_ADDR, UM_REG_PRESENCE, 1, reg, 2);
|
||||
if (ret == 0) {
|
||||
/* i2c read was successful, now check presence register */
|
||||
if (reg[UM_REG_PRESENCE] == UM_PRESENCE_TOKEN) {
|
||||
module_present = 1;
|
||||
|
||||
module_type = (um_type_t)(reg[UM_REG_TYPE]);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
udelay(10*1000); /* 10 ms */
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void um_init(int i2c_bus)
|
||||
{
|
||||
int bus = -1;
|
||||
int claimed;
|
||||
|
||||
um_i2c_bus = i2c_bus;
|
||||
|
||||
claimed = switch_i2c_bus(&bus);
|
||||
|
||||
if (claimed == 0) {
|
||||
detect();
|
||||
|
||||
if (module_present) {
|
||||
/* TODO: Check why this delay is required.
|
||||
* Is the UM software still reading board descriptor?
|
||||
*/
|
||||
udelay(50*1000); /* 50 ms delay (tested with 30 ms) */
|
||||
|
||||
get_version();
|
||||
get_network_address();
|
||||
}
|
||||
}
|
||||
|
||||
revert_i2c_bus(bus);
|
||||
}
|
||||
|
||||
int um_present(void)
|
||||
{
|
||||
return module_present;
|
||||
}
|
||||
|
||||
const char* um_type_as_str(void)
|
||||
{
|
||||
switch (module_type) {
|
||||
case UM_TYPE_VCUPRO: return "VCU Pro";
|
||||
default: return "<unknown";
|
||||
}
|
||||
}
|
||||
|
||||
void um_version(uint8_t *version, uint8_t *revision)
|
||||
{
|
||||
if (version != NULL)
|
||||
*version = hw_version;
|
||||
|
||||
if (revision != NULL)
|
||||
*revision = hw_revision;
|
||||
}
|
||||
|
||||
void um_network_address(struct in_addr* ip, struct in_addr* mask)
|
||||
{
|
||||
if (ip != NULL)
|
||||
*ip = ipv4_addr;
|
||||
|
||||
if (mask != NULL)
|
||||
*mask = ipv4_mask;
|
||||
}
|
||||
|
|
@ -0,0 +1,76 @@
|
|||
/*
|
||||
* um.h
|
||||
*
|
||||
* User Module Access
|
||||
*
|
||||
* Copyright (C) 2019 NetModule AG - http://www.netmodule.com/
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#ifndef UM_H
|
||||
#define UM_H
|
||||
|
||||
#include <net.h>
|
||||
|
||||
|
||||
#define CONFIG_UM_I2C_BUS 1
|
||||
#define CONFIG_UM_I2C_ADDR 0x40
|
||||
|
||||
#define UM_REG_PRESENCE 0x00 /* Presence register, value = 0xC5 */
|
||||
#define UM_REG_TYPE 0x01 /* See um_type_t */
|
||||
#define UM_REG_HW_VER 0x04 /* Version.Revision, e.g. 0x21 = v2.1 */
|
||||
|
||||
#define UM_REG_IPV4_ADDR 0x10 /* IPv4 address in network byte order, 4 bytes */
|
||||
#define UM_REG_IPV4_MASK 0x14 /* IPv4 mask in network byte order, 4 bytes */
|
||||
|
||||
#define UM_PRESENCE_TOKEN 0xC5
|
||||
|
||||
|
||||
/* Known user modules */
|
||||
typedef enum {
|
||||
UM_TYPE_RESERVED = 0,
|
||||
UM_TYPE_VCUPRO = 1,
|
||||
|
||||
UM_TYPE_MAX
|
||||
} um_type_t;
|
||||
|
||||
|
||||
/**
|
||||
* Initializes user user module.
|
||||
*
|
||||
* @param i2c_bus Number of I2C bus module is attached to.
|
||||
*/
|
||||
void um_init(int i2c_bus);
|
||||
|
||||
/**
|
||||
* Returns whether a module has been detected.
|
||||
*
|
||||
* @return 1 if module is detected, 0 otherwise.
|
||||
*/
|
||||
int um_present(void);
|
||||
|
||||
/**
|
||||
* Returns name of module.
|
||||
*
|
||||
* @return Name of module or "<unknown>".
|
||||
*/
|
||||
const char* um_type_as_str(void);
|
||||
|
||||
/**
|
||||
* Returns hardware version of module.
|
||||
*
|
||||
* @param version Pointer to variable to receive module version (0..15)
|
||||
* @param revision Pointer to variable to receive module revision (0..15)
|
||||
*/
|
||||
void um_version(uint8_t *version, uint8_t *revision);
|
||||
|
||||
/**
|
||||
* Returns user module IPv4 configuration
|
||||
*
|
||||
* @param ip Pointer to variable to receive IPv4 address
|
||||
* @param mask Pointer to variable to receive IPv4 mask
|
||||
*/
|
||||
void um_network_address(struct in_addr* ip, struct in_addr* mask);
|
||||
|
||||
#endif /* UM_H */
|
||||
|
|
@ -0,0 +1,49 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_TARGET_AM335X_NRHW21=y
|
||||
CONFIG_SPL_STACK_R_ADDR=0x82000000
|
||||
CONFIG_SPL=y
|
||||
CONFIG_SPL_STACK_R=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT"
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_AUTOBOOT_KEYED=y
|
||||
CONFIG_AUTOBOOT_PROMPT="Press s to abort autoboot in %d seconds\n"
|
||||
CONFIG_AUTOBOOT_STOP_STR="s"
|
||||
CONFIG_CMD_BOOTZ=y
|
||||
# CONFIG_CMD_IMLS is not set
|
||||
CONFIG_CMD_ASKENV=y
|
||||
# CONFIG_CMD_FLASH is not set
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_EXT4=y
|
||||
CONFIG_CMD_EXT4_WRITE=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_FS_GENERIC=y
|
||||
CONFIG_DFU_TFTP=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_MUSB_HOST=y
|
||||
CONFIG_USB_MUSB_GADGET=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_DOWNLOAD=y
|
||||
CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
|
||||
CONFIG_G_DNL_VENDOR_NUM=0x0451
|
||||
CONFIG_G_DNL_PRODUCT_NUM=0xd022
|
||||
CONFIG_OF_LIBFDT=y
|
||||
# CONFIG_BOOTP_PXE_CLIENTARCH is not set
|
||||
# CONFIG_CMD_PXE is not set
|
||||
# CONFIG_CMD_BOOTEFI is not set
|
||||
# CONFIG_CMD_XIMG is not set
|
||||
# CONFIG_CMD_ELF is not set
|
||||
# CONFIG_FPGA is not set
|
||||
# CONFIG_CMD_FPGA is not set
|
||||
# CONFIG_CMD_PMIC is not set
|
||||
# CONFIG_EFI_LOADER is not set
|
||||
# CONFIG_CMD_LOADB is not set
|
||||
# CONFIG_CMD_LOADS is not set
|
||||
|
|
@ -0,0 +1,271 @@
|
|||
/*
|
||||
* am335x_nrhw21.h
|
||||
*
|
||||
* Copyright (C) 2018-2019 NetModule AG - http://www.netmodule.com/
|
||||
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation version 2.
|
||||
*
|
||||
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
|
||||
* kind, whether express or implied; without even the implied warranty
|
||||
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_AM335X_NRHW21_H
|
||||
#define __CONFIG_AM335X_NRHW21_H
|
||||
|
||||
#include <configs/ti_am335x_common.h>
|
||||
|
||||
/* Disable U-Boot load from filesystems, to save around 10 kB SPL image size */
|
||||
#ifdef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
|
||||
# undef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
|
||||
#endif
|
||||
|
||||
#undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
|
||||
|
||||
#undef CONFIG_HW_WATCHDOG
|
||||
#undef CONFIG_OMPAP_WATCHDOG
|
||||
#undef CONFIG_SPL_WATCHDOG_SUPPORT
|
||||
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
# define CONFIG_TIMESTAMP
|
||||
# define CONFIG_LZO
|
||||
#endif
|
||||
|
||||
#define CONFIG_SYS_BOOTM_LEN (16 << 20)
|
||||
|
||||
#define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */
|
||||
#define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM
|
||||
#define CONFIG_BOARD_LATE_INIT
|
||||
|
||||
/* Clock Defines */
|
||||
#define V_OSCK 0 /* 0 means detect from sysboot1 config */
|
||||
#define V_SCLK (V_OSCK)
|
||||
|
||||
#include <config_distro_bootcmd.h>
|
||||
|
||||
/* Dynamic override for PHY_ANEG_TIMEOUT value */
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
# ifndef __ASSEMBLER__
|
||||
int eth_phy_timeout(void);
|
||||
# endif
|
||||
#endif
|
||||
#define PHY_ANEG_TIMEOUT eth_phy_timeout()
|
||||
#define PHY_ANEG_DEFAULT_TIMEOUT 5000
|
||||
|
||||
#define CONFIG_ARP_TIMEOUT 200
|
||||
#undef CONFIG_NET_RETRY_COUNT
|
||||
#define CONFIG_NET_RETRY_COUNT 5
|
||||
#define CONFIG_BOOTP_MAY_FAIL
|
||||
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
|
||||
|
||||
/*
|
||||
* Memory map for booting Linux
|
||||
*
|
||||
* 0x80000000 63MB KERNEL_ADDR (kernel_addr), kernel execution address
|
||||
* 0x83F00000 1MB FDT_ADDR (fdt_addr_r), device tree loading address if not included in kernel
|
||||
* 0x84000000 126MB RD_ADDR (ramdisk_addr_r), ramdisc loading address
|
||||
* 0x8BE00000 2MB PXE_ADDR (pxefile_addr_r), pxe configuration file (pxe get command)
|
||||
* 0x8C000000 1MB LOAD_ADDR (load_addr), loading address for generic files
|
||||
* 0x8C100000 63MB KERNEL_ADDR_R (kernel_addr_r), kernel loading address (will be relocated to kernel_addr)
|
||||
* 0x90000000 256MB <>, Free space 512MB systems
|
||||
* 0xA0000000 512MB <>, Free space, 1GB systems only
|
||||
* 0xC0000000 End of RAM
|
||||
*/
|
||||
|
||||
#define KERNEL_ADDR "0x80000000"
|
||||
#define FDT_ADDR "0x83F00000"
|
||||
#define RD_ADDR "0x84000000"
|
||||
#define PXE_ADDR "0x8BE00000"
|
||||
#define LOAD_ADDR "0x8C000000"
|
||||
#define KERNEL_ADDR_R "0x8C100000"
|
||||
|
||||
/*
|
||||
* Avoid copying ramdisc and dtb above 512MB, as it breaks Linux boot.
|
||||
* -1 means "do not copy" to high address, use in place.
|
||||
*/
|
||||
#define INITRD_HIGH_ADDR "0x84000000"
|
||||
#define FDT_HIGH_ADDR "0xffffffff"
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"kernel_image=kernel.bin\0" \
|
||||
"fdt_image=am335x-nmhw21-prod1.dtb\0" \
|
||||
"modeboot=sdboot\0" \
|
||||
"fdt_addr=" FDT_ADDR "\0" \
|
||||
"kernel_addr=" KERNEL_ADDR "\0" \
|
||||
"load_addr=" LOAD_ADDR "\0" \
|
||||
"root_part=1\0" /* Default root partition, overwritten in board file */ \
|
||||
"defaultconsole=ttyS2\0" \
|
||||
"add_sd_bootargs=setenv bootargs $bootargs root=/dev/${mmc_dev}p$root_part rootfstype=ext4 " \
|
||||
"console=$defaultconsole,115200 rootwait loglevel=4 ti_cpsw.rx_packet_max=1526\0" \
|
||||
"add_version_bootargs=setenv bootargs $bootargs\0" \
|
||||
"fdt_skip_update=yes\0" \
|
||||
"ethprime=cpsw\0" \
|
||||
"sdbringup=echo Try bringup boot && ext4load mmc 1:$root_part $kernel_addr /boot/zImage && " \
|
||||
"ext4load mmc 1:$root_part $fdt_addr /boot/$fdt_image && setenv bootargs $bootargs rw;\0" \
|
||||
"sdprod=ext4load mmc 1:$root_part $kernel_addr /boot/$kernel_image && " \
|
||||
"ext4load mmc 1:$root_part $fdt_addr /boot/$fdt_image && setenv bootargs $bootargs ro;\0" \
|
||||
"sdboot=if mmc dev 1; then echo Copying Linux from SD to RAM...; "\
|
||||
"if test -e mmc 1:$root_part /boot/$kernel_image; then run sdprod; " \
|
||||
"else run sdbringup; fi; " \
|
||||
/* For v4.19 kernel $mmc_dev should be "mmcblk1" (read from DT), for v3.18 kernel: "mmcblk0". */ \
|
||||
"fdt addr $fdt_addr;if fdt get value mmc_dev /nm_env nm,mmc-dev;then;else setenv mmc_dev mmcblk0;fi;" \
|
||||
"run add_sd_bootargs; run add_version_bootargs; run shieldcmd; " \
|
||||
"bootz $kernel_addr - $fdt_addr; fi\0" \
|
||||
"bootcmd=run sdboot\0" \
|
||||
"ipaddr=192.168.1.1\0" \
|
||||
"serverip=192.168.1.254\0" \
|
||||
"pxefile_addr_r=" PXE_ADDR "\0" \
|
||||
"fdt_addr_r=" FDT_ADDR "\0" \
|
||||
"fdt_high=" FDT_HIGH_ADDR "\0" \
|
||||
"kernel_addr_r=" KERNEL_ADDR "\0" \
|
||||
"ramdisk_addr_r=" LOAD_ADDR "\0" \
|
||||
"bootpretryperiod=1000\0" \
|
||||
"tftptimeout=2000\0" \
|
||||
"tftptimeoutcountmax=5\0" \
|
||||
"bootpretryperiod=2000\0" \
|
||||
"autoload=false\0" \
|
||||
"tftp_recovery=tftpboot $kernel_addr recovery-image; tftpboot $fdt_addr recovery-dtb; " \
|
||||
"setenv bootargs rdinit=/etc/preinit console=$defaultconsole,115200 " \
|
||||
"debug ti_cpsw.rx_packet_max=1526; run shieldcmd; " \
|
||||
"bootz $kernel_addr - $fdt_addr\0" \
|
||||
"pxe_recovery=mdio up $ethprime && dhcp && pxe get && pxe boot\0" \
|
||||
"recovery=run pxe_recovery || setenv ipaddr $ipaddr; setenv serverip $serverip; run tftp_recovery\0" \
|
||||
/* setenv ipaddr and serverip is necessary, because dhclient can destroy the IPs internally */
|
||||
#endif
|
||||
|
||||
/* UART Configuration */
|
||||
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0: XModem Boot */
|
||||
#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1: Unused, see note below */
|
||||
#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2: eMMC Boot, User UART */
|
||||
/* NOTE: NS16550 definitions are cumulative, need to set COM2 to have COM3 */
|
||||
#define CONFIG_SYS_NS16550_COM4 0x481A6000 /* UART3: xxx */
|
||||
#define CONFIG_SYS_NS16550_COM5 0x481A8000 /* UART4: yyy */
|
||||
#define CONFIG_SYS_NS16550_COM6 0x481AA000 /* UART5: zzz */
|
||||
|
||||
#define CONFIG_I2C
|
||||
#define CONFIG_I2C_MULTI_BUS
|
||||
|
||||
#define CONFIG_CMD_EEPROM
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
|
||||
#define CONFIG_SYS_I2C_SPEED 100000
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 50 /* TODO: Can this be reduced to 20ms */
|
||||
|
||||
/* Put Environment in eMMC */
|
||||
#define CONFIG_ENV_OFFSET (512 * 128) /* @ 512*256 SPL starts */
|
||||
#define CONFIG_ENV_SIZE (4 * 1024)
|
||||
#define CONFIG_ENV_IS_IN_MMC
|
||||
#define CONFIG_SYS_MMC_ENV_DEV 1
|
||||
|
||||
#undef CONFIG_SPL_ENV_SUPPORT
|
||||
#undef CONFIG_SPL_NAND_SUPPORT
|
||||
#undef CONFIG_SPL_ONENAND_SUPPORT
|
||||
|
||||
/* We need to disable SPI to not confuse the eeprom env driver */
|
||||
|
||||
/* SPI IP Block */
|
||||
#define CONFIG_OMAP3_SPI /* Already define in ti_armv7_omap.h, included by ti_am335x_common.h */
|
||||
#define CONFIG_SJA1105_SPI_BUS 1 /* bus 1 = spi1 = McSPI2 */
|
||||
#define CONFIG_SJA1105_SPI_CS 1 /* SJA1105 uses CS1~ */
|
||||
|
||||
#undef CONFIG_SPI
|
||||
#undef CONFIG_SPI_BOOT
|
||||
#undef CONFIG_SPL_OS_BOOT
|
||||
|
||||
#define CONFIG_SPL_YMODEM_SUPPORT
|
||||
|
||||
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
|
||||
|
||||
#define CONFIG_SUPPORT_EMMC_BOOT
|
||||
|
||||
/*
|
||||
* USB configuration. We enable MUSB support, both for host and for
|
||||
* gadget. We set USB0 as peripheral and USB1 as host, based on the
|
||||
* board schematic and physical port wired to each. Then for host we
|
||||
* add mass storage support and for gadget we add both RNDIS ethernet
|
||||
* and DFU.
|
||||
*/
|
||||
#define CONFIG_USB_MUSB_DSPS
|
||||
#define CONFIG_ARCH_MISC_INIT
|
||||
#define CONFIG_USB_MUSB_PIO_ONLY
|
||||
#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT
|
||||
#define CONFIG_AM335X_USB0
|
||||
#define CONFIG_AM335X_USB0_MODE MUSB_HOST
|
||||
|
||||
/* To support eMMC booting */
|
||||
#define CONFIG_STORAGE_EMMC
|
||||
#define CONFIG_FASTBOOT_FLASH_MMC_DEV 1
|
||||
|
||||
#ifdef CONFIG_USB_MUSB_HOST
|
||||
#define CONFIG_USB_STORAGE
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USB_MUSB_GADGET
|
||||
/* Removing USB gadget and can be enabled adter adding support usb DM */
|
||||
#ifndef CONFIG_DM_ETH
|
||||
#define CONFIG_USB_ETHER
|
||||
#define CONFIG_USB_ETH_RNDIS
|
||||
#define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00"
|
||||
#endif /* CONFIG_DM_ETH */
|
||||
#endif /* CONFIG_USB_MUSB_GADGET */
|
||||
|
||||
|
||||
/*
|
||||
* Disable MMC DM for SPL build and can be re-enabled after adding
|
||||
* DM support in SPL
|
||||
*/
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
#undef CONFIG_DM_MMC
|
||||
#undef CONFIG_TIMER
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SPL_BUILD)
|
||||
/* Remove other SPL modes. */
|
||||
#undef CONFIG_SPL_NAND_SUPPORT
|
||||
#define CONFIG_ENV_IS_NOWHERE
|
||||
#undef CONFIG_PARTITION_UUIDS
|
||||
#undef CONFIG_EFI_PARTITION
|
||||
#endif
|
||||
|
||||
/* Network. */
|
||||
#define CONFIG_PHYLIB
|
||||
#define CONFIG_PHY_SMSC
|
||||
|
||||
#define CONFIG_CMD_MEMTEST
|
||||
#define CONFIG_SYS_MEMTEST_START 0x84000000
|
||||
#define CONFIG_SYS_MEMTEST_END 0x87900000
|
||||
|
||||
/* support for NM packed bootloader */
|
||||
#define CONFIG_NM_BOOTLOADER_FORMAT
|
||||
#define CONFIG_NM_LOGIN
|
||||
#define CONFIG_CRYPT
|
||||
|
||||
#if 0
|
||||
#define CONFIG_POWER
|
||||
#define CONFIG_POWER_I2C
|
||||
#define CONFIG_POWER_DA9063 /* TODO: Provide driver */
|
||||
#endif
|
||||
|
||||
#define CONFIG_CMD_PXE
|
||||
|
||||
#define CONFIG_OF_BOARD_SETUP
|
||||
|
||||
#define CONFIG_JTAG_MARKER_SPL 0x402FFF00
|
||||
#define CONFIG_JTAG_MARKER_UBOOT 0x807FFF00
|
||||
|
||||
#define RESET_REASON_SHM_LOCATION 0x8e000000
|
||||
#define EXTERNAL_WATCHDOG_PATTERN 0x781f9ce2
|
||||
/* SPL command is not needed */
|
||||
#undef CONFIG_CMD_SPL
|
||||
|
||||
/* Never enable ISO it is broken and can lead to a crash */
|
||||
#undef CONFIG_ISO_PARTITION
|
||||
|
||||
#endif /* ! __CONFIG_AM335X_NRHW21_H */
|
||||
Loading…
Reference in New Issue