nrhw20: refactore and cleanup board file

- move environment to eMMC
- add i2c io extender driver
- enable RTC backup battery charging
- remove occurances of 2nd ethernet port
- remove dead code

board/nm/nrhw20/board.c

@@ -27,6 +27,7 @@
 #include <asm/emif.h>
 #include <asm/gpio.h>
 #include <i2c.h>
+#include <pca953x.h>
 #include <miiphy.h>
 #include <cpsw.h>
 #include <environment.h>
@@ -43,9 +44,6 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 
-/* GPIO that controls power to DDR on EVM-SK */
-#define GPIO_TO_PIN(bank, gpio)		(32 * (bank) + (gpio))
-
 /*
  * CPU GPIOs
  *
@@ -76,6 +74,8 @@ DECLARE_GLOBAL_DATA_PTR;
  * GPIO3_21: RST_HUB~ (USB)
  */
 
+#define GPIO_TO_PIN(bank, gpio)		(32 * (bank) + (gpio))
+
 #define NETBIRD_GPIO_RESET_BUTTON	GPIO_TO_PIN(3, 0) /* TODO: From PMIC */
 
 #define NETBIRD_GPIO_RST_PHY_N		GPIO_TO_PIN(0, 16)
@@ -112,6 +112,30 @@ DECLARE_GLOBAL_DATA_PTR;
 #define PMIC_LED0_GREEN			11
 
 
+/*
+ * I2C IO Extender
+ *
+ * GPIO_0: LED0, Red
+ * GPIO_1: LED0, Green
+ * ..
+ * GPIO_8: LED4, Red
+ * GPIO_9: LED4, Green
+ */
+
+#define IOEXT_LED0_RED_MASK		(1U << 0)
+#define IOEXT_LED0_GREEN_MASK		(1U << 1)
+#define IOEXT_LED1_RED_MASK		(1U << 2)
+#define IOEXT_LED1_GREEN_MASK		(1U << 3)
+#define IOEXT_LED2_RED_MASK		(1U << 4)
+#define IOEXT_LED2_GREEN_MASK		(1U << 5)
+#define IOEXT_LED3_RED_MASK		(1U << 6)
+#define IOEXT_LED3_GREEN_MASK		(1U << 7)
+#define IOEXT_LED4_RED_MASK		(1U << 8)
+#define IOEXT_LED4_GREEN_MASK		(1U << 9)
+#define IOEXT_LEDS_ALL_MASK		(0x03FF)
+
+
+
 #define DDR3_CLOCK_FREQUENCY		(400)
 
 #if defined(CONFIG_SPL_BUILD) || \
@@ -125,11 +149,12 @@ static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
 #define PD_ADDRESS			(0x0200)  /* Product descriptor */
 #define PARTITION_ADDRESS		(0x0600)  /* Partition Table */
 
-static BD_Context   bdctx[3];		/* The descriptor context */
-
 #define SHIELD_COM_IO	0
 #define SHIELD_DUALCAN	1
 
+
+static BD_Context   bdctx[3];		/* The descriptor contexts */
+
 static int _bd_init(void)
 {
 	int old_bus;
@@ -145,10 +170,13 @@ static int _bd_init(void)
 
 	if (bd_get_context(&bdctx[1], BD_EEPROM_ADDR, PD_ADDRESS) != 0) {
 		printf("%s() no valid pd found (legacy support)\n", __func__);
+		return -1;
 	}
 
+	/* TODO: Can we get rid of this and use eMMC partitino table solely? */
 	if (bd_get_context(&bdctx[2], BD_EEPROM_ADDR, PARTITION_ADDRESS) != 0) {
 		printf("%s() no valid partition table found\n", __func__);
+		/* TODO: error handling */
 	}
 
 	bd_register_context_list(bdctx, ARRAY_SIZE(bdctx));
@@ -158,6 +186,44 @@ static int _bd_init(void)
 	return 0;
 }
 
+
+static void init_indicator_leds(void)
+{
+	int old_bus;
+
+	old_bus = i2c_get_bus_num();
+	i2c_set_bus_num(CONFIG_SYS_I2C_PCA953X_BUS);
+
+	/* Set all IOs as output */
+	(void)pca953x_set_dir(CONFIG_SYS_I2C_PCA953X_ADDR, IOEXT_LEDS_ALL_MASK, PCA953X_DIR_OUT);
+
+	/* Set all LEDs off */
+	(void)pca953x_set_val(CONFIG_SYS_I2C_PCA953X_ADDR, IOEXT_LEDS_ALL_MASK, IOEXT_LEDS_ALL_MASK);
+
+	i2c_set_bus_num(old_bus);
+}
+
+static void set_indicator(unsigned led, int red, int green)
+{
+	int old_bus;
+	uint led_red_mask = 0x1U << (2*led);
+	uint led_green_mask = 0x2U << (2*led);
+	uint led_val = 0;
+
+	old_bus = i2c_get_bus_num();
+	i2c_set_bus_num(CONFIG_SYS_I2C_PCA953X_BUS);
+
+	if (!red)
+		led_val |= led_red_mask;
+	if (!green)
+		led_val |= led_green_mask;
+
+	(void)pca953x_set_val(CONFIG_SYS_I2C_PCA953X_ADDR, led_red_mask | led_green_mask, led_val);
+
+	i2c_set_bus_num(old_bus);
+}
+
+
 /*
  * Read header information from EEPROM into global structure.
  */
@@ -166,6 +232,9 @@ static inline int __maybe_unused read_eeprom(void)
 	return _bd_init();
 }
 
+/* Selects console for SPL.
+ * U-Boot console is defined by CONFIG_CONS_INDEX (via menuconfig)
+ */
 struct serial_device *default_serial_console(void)
 {
 	if (spl_boot_device() == BOOT_DEVICE_UART) {
@@ -173,9 +242,10 @@ struct serial_device *default_serial_console(void)
 		return &eserial1_device;
 	}
 	else {
-		return &eserial1_device;
 		/* TODO: Check */
-/*        return &eserial2_device; */
+		/* return &eserial1_device; */
+		enable_uart1_pin_mux();
+		return &eserial2_device;
     }
 }
 
@@ -211,32 +281,17 @@ static struct emif_regs ddr3_emif_reg_data = {
 };
 
 
-#ifdef CONFIG_SPL_OS_BOOT
-int spl_start_uboot(void)
-{
-	/* break into full u-boot on 'c' */
-	if (serial_tstc() && serial_getc() == 'c')
-		return 1;
-
-#ifdef CONFIG_SPL_ENV_SUPPORT
-	env_init();
-	env_relocate_spec();
-	if (getenv_yesno("boot_os") != 1)
-		return 1;
-#endif
-
-	return 0;
-}
-#endif
-
 #define OSC	(V_OSCK/1000000)
 
 /* TODO: Rename */
 struct dpll_params dpll_ddr_nbhw16= {
 		DDR3_CLOCK_FREQUENCY, OSC-1, 1, -1, -1, -1, -1};
 
+
 void am33xx_spl_board_init(void)
 {
+	/* TODO: Remove one of the two opp100 settings */
+
 	/* Get the frequency */
 	dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
 
@@ -246,16 +301,18 @@ void am33xx_spl_board_init(void)
 	/* Set CORE Frequencies to OPP100 (600MHz) */
 	do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
 
-	/* TODO: Check PMIC settings if required */
+	/* TODO: Modify PMIC settings if required */
-
+	init_indicator_leds();
-
+	set_indicator(0, 1, 1); /* Orange */
 
 	/* Set MPU Frequency to what we detected now that voltages are set */
 	do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100);
 
-	/* TODO: What is this */
+	/* TODO: Should not be needed in SPL */
+/*
 	if (read_eeprom() < 0)
 		puts("Could not get board ID.\n");
+*/
 }
 
 const struct dpll_params *get_dpll_ddr_params(void)
@@ -267,6 +324,7 @@ const struct dpll_params *get_dpll_ddr_params(void)
 void set_uart_mux_conf(void)
 {
 	enable_uart0_pin_mux();
+	enable_uart1_pin_mux();
 	/* TODO: ?? */
 	/* disable_uart0_pin_mux(); */
 	/* enable_uart1_pin_mux(); */
@@ -325,7 +383,7 @@ err_free_gpio:
 #define REQUEST_AND_SET_GPIO(N)		request_and_set_gpio(N, #N, 1);
 #define REQUEST_AND_CLEAR_GPIO(N)	request_and_set_gpio(N, #N, 0);
 
-
+#if 0 /* TODO: Remove if not required */
 static void request_input_gpio(int gpio, const char *name, int value)
 {
 	int ret;
@@ -349,7 +407,7 @@ err_free_gpio:
 }
 
 #define REQUEST_INPUT_GPIO(N)		request_input_gpio(N, #N, 0);
-
+#endif
 
 
 #if !defined(CONFIG_SPL_BUILD)
@@ -450,11 +508,13 @@ static int check_reset_button(void)
 #define PMIC_REG_GPIO_MODE0_7	0x1D	/* Control register for GPIOs 0..7 */
 #define PMIC_REG_GPIO_MODE8_15	0x1E	/* Control register for GPIOs 8..15 */
 
+#define PMIC_REG_BBAT_CONT	0xC5	/* Control register for backup battery */
+
+
 static int da9063_i2c_bus = 0;
 
 void da9063_init(int i2c_bus)
 {
-	printf("da9063_init %d\n", i2c_bus);
 	da9063_i2c_bus = i2c_bus;
 }
 
@@ -468,6 +528,7 @@ int da9093_get_reg(int reg, u8* val)
 	old_bus = i2c_get_bus_num();
 	i2c_set_bus_num(da9063_i2c_bus);
 
+	/* TODO: Use CONFIG_PMIC_I2C_ADDR+1 if reg > 0xFF */
 	*val = 0;
 	ret = i2c_read(CONFIG_PMIC_I2C_ADDR, reg, 1, &temp, 1);
 	if (ret == 0)
@@ -483,9 +544,11 @@ int da9093_set_reg(int reg, u8 val)
 	int ret;
 	int old_bus;
 
+	/* TODO: Check whether switching is required */
 	old_bus = i2c_get_bus_num();
 	i2c_set_bus_num(da9063_i2c_bus);
 
+	/* TODO: Use CONFIG_PMIC_I2C_ADDR+1 if reg > 0xFF */
 	ret = i2c_write(CONFIG_PMIC_I2C_ADDR, reg, 1, &val, 1);
 	if (ret != 0)
 		puts("da9063 write error\n");
@@ -511,7 +574,7 @@ void da9063_set_gpio(unsigned bit, int state)
 		bitmask = 1U << (bit-8);
 	}
 
-	printf("da9063_set_gpio %d 0x%04x\n", pmic_reg, bitmask);
+/*	printf("da9063_set_gpio %d 0x%04x\n", pmic_reg, bitmask); */
 	ret = da9093_get_reg(pmic_reg, &reg);
 
 	if (ret == 0)  {
@@ -525,41 +588,16 @@ void da9063_set_gpio(unsigned bit, int state)
 
 static void set_status_led(int red, int green)
 {
+	/* LED outputs are active low, invert state */
 	da9063_set_gpio(PMIC_LED0_RED, !red);
 	da9063_set_gpio(PMIC_LED0_GREEN, !green);
 }
 
 
-/* TODO: Create I2C IoExtender Accessor Module */
-
-#define CONFIG_SYS_I2C_BUS	2
-#define CONFIG_IOEXT_I2C_ADDR	0x74
-#define IOEXT_REG_DIR		0x06
-#define IOEXT_REG_DATA		0x02
-
-static void init_indicator_leds(void)
-{
-	int ret;
-	int old_bus;
-	unsigned char dir[2] = { 0x00, 0x00 };
-	unsigned char val[2] = { 0xFF, 0xFD };
-
-	old_bus = i2c_get_bus_num();
-	i2c_set_bus_num(CONFIG_SYS_I2C_BUS);
-
-	/* Set all IOs as output */
-	(void)i2c_write(CONFIG_IOEXT_I2C_ADDR, IOEXT_REG_DIR, 1, dir, 2);
-
-	/* Set LED5 green, all others off */
-	(void)i2c_write(CONFIG_IOEXT_I2C_ADDR, IOEXT_REG_DATA, 1, val, 2);
-
-	i2c_set_bus_num(old_bus);
-}
-
-
 
 /*
- * Basic board specific setup.  Pinmux has been handled already.
+ * Basic board specific setup. Pinmux has been handled already.
+ * Not called in SPL build.
  */
 int board_init(void)
 {
@@ -569,9 +607,6 @@ int board_init(void)
 
 	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 
-#if defined(CONFIG_NOR) || defined(CONFIG_NAND)
-	gpmc_init();
-#endif
 	/* Configure both I2C buses used in NRHW20 */
 	i2c_set_bus_num(0);
 	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
@@ -580,9 +615,12 @@ int board_init(void)
 	i2c_set_bus_num(0);
 
 	da9063_init(CONFIG_PMIC_I2C_BUS);
-	set_status_led(1, 1);	/* Orange */
 	init_indicator_leds();
 
+	set_status_led(1, 1);	/* Orange */
+	set_indicator(0, 0, 1); /* Green */
+	set_indicator(1, 0, 1); /* Green */
+
 	/* Keep unused subsystems in reset */
 	REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_WLAN_EN);
 	REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_BT_EN);
@@ -593,10 +631,13 @@ int board_init(void)
 	da9063_set_gpio(PMIC_PCIe_SUPPLY_EN_IO, 0);	/* PCIe Supply off */
 	da9063_set_gpio(PMIC_PCIe_SUPPLY_VSEL_IO, 0);	/* PCIe voltage = 3.3V */
 
+	/* Enable charging of RTC backup capacitor (1mA, 3.1V) */
+	(void)da9093_set_reg(PMIC_REG_BBAT_CONT, 0xCF);
+
 	/* Enable Ethernet switch */
 	REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_RST_PHY_N);
 	mdelay(1);
-	/* OMAP3 does not feature open drain pins, thus configure as input */
+	/* OMAP3 does not feature open drain pins, thus configure pin as input */
 	gpio_direction_input(NETBIRD_GPIO_RST_PHY_N);
 	/* When the Ethernet switch senses reset, it drives reset for 8..14ms
 	 * Wait longer than this time to avoid IO congestion later on.
@@ -617,9 +658,9 @@ int board_init(void)
 
 	/* Enable GSM supply */
 	da9063_set_gpio(PMIC_GSM_SUPPLY_EN_IO, 1);
+	mdelay(20);
 
 	/* Take modem out of reset, we have to wait 300ms afterwards */
-	mdelay(20);
 	gpio_set_value(NETBIRD_GPIO_RST_GSM, 0);
 	mdelay(300);
 
@@ -632,14 +673,14 @@ int board_init(void)
 	mdelay(1200);
 	gpio_set_value(NETBIRD_GPIO_PWR_GSM, 0);
 
-
+#if 0
 	/* TODO: Move to pinmux? Required??? RMII2 not used! */
 	/* There are two functions on the same mux mode for MMC2_DAT7 we want
 	 * to use RMII2_CRS_DV so we need to set SMA2 Register to 1
 	 * See SPRS717J site 49 (10)*/
 	#define SMA2_REGISTER (CTRL_BASE + 0x1320)
 	writel(0x01, SMA2_REGISTER); /* Select RMII2_CRS_DV instead of MMC2_DAT7 */
-
+#endif
 
 	printf("OSC:   %lu MHz\n", get_osclk()/1000000);
 
@@ -651,7 +692,7 @@ int board_init(void)
 void set_console(void)
 {
 	char buf[8];
-	char *defaultconsole = getenv("defaultconsole");
+	const char *defaultconsole = getenv("defaultconsole");
 	int shield_id = bd_get_shield(0);
 
 	if (defaultconsole == 0) {
@@ -668,7 +709,7 @@ void set_console(void)
 	/* With comio shield the defaultconsole should be ttyS0 and not ttyS1 */
 	setenv("defaultconsole", "ttyS0");
 
-	/* If consoldev is set take this as productive conosle instead of default console */
+	/* If consoldev is set take this as productive console instead of default console */
 	if (read_file("/root/boot/consoledev", buf, 5) != 5) {
 		puts("Invalid file consoledev\n");
 		return;
@@ -686,9 +727,9 @@ static void set_devicetree_name(void)
 
 	/* add hardware versions to environment */
 	if (bd_get_devicetree(devicetreename, sizeof(devicetreename)) != 0) {
-		printf("Devicetree name not found, use legacy name\n");
+		printf("Devicetree name not found, using legacy name\n");
-		/* TODO: Rename */
+		/* TODO: Check naming convention */
-		strcpy(devicetreename, "am335x-nbhw16-prod2.dtb");
+		strcpy(devicetreename, "am335x-nrhw20-prod1.dtb");
 	}
 
 	setenv("fdt_image", devicetreename);
@@ -721,6 +762,7 @@ static void check_fct(void)
 		printf("Entering fct mode\n");
 		setenv ("bootcmd", "");
 	}
+	/* TODO: needs to test on bus 2 ! */
 }
 
 static void set_fdtshieldcmd(const char *fdt_cmd)
@@ -815,7 +857,6 @@ static void shield_init(void)
 }
 #endif
 
-#ifdef CONFIG_BOARD_LATE_INIT
 int board_late_init(void)
 {
 #if !defined(CONFIG_SPL_BUILD)
@@ -839,26 +880,18 @@ int board_late_init(void)
 
 	set_devicetree_name();
 
-	set_console();
+	/* TODO: Later */
+	/* set_console(); */
 
 	set_status_led(0, 1);	/* Green */
-#endif
 
-#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
-	int rc;
-	char *name = NULL;
-
-	set_board_info_env(name);
-#endif
-
-#if !defined(CONFIG_SPL_BUILD)
 	shield_init();
+
 	check_fct();
 #endif
 
 	return 0;
 }
-#endif
 
 #ifndef CONFIG_DM_ETH
 
@@ -875,14 +908,9 @@ static struct cpsw_slave_data cpsw_slaves[] = {
 	{
 		.slave_reg_ofs	= 0x208,
 		.sliver_reg_ofs	= 0xd80,
+		.phy_if		= PHY_INTERFACE_MODE_RMII,
 		.phy_addr	= 0,
-	},
+	}
-	/* TODO: remove ? */
-	{
-		.slave_reg_ofs	= 0x308,
-		.sliver_reg_ofs	= 0xdc0,
-		.phy_addr	= 1,
-	},
 };
 
 static struct cpsw_platform_data cpsw_data = {
@@ -948,12 +976,7 @@ int board_eth_init(bd_t *bis)
 	bd_get_mac(0, mac_addr0, sizeof(mac_addr0));
 	set_mac_address(0, mac_addr0);
 
-	/* TODO: Check 2x Ethernet? */
 	writel(RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE, &cdev->miisel);
-	cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RMII;
-	cpsw_slaves[1].phy_if = PHY_INTERFACE_MODE_RMII;
-	cpsw_slaves[0].phy_addr = 0;
-	cpsw_slaves[1].phy_addr = 1;
 
 	rv = cpsw_register(&cpsw_data);
 	if (rv < 0)
@@ -961,8 +984,8 @@ int board_eth_init(bd_t *bis)
 	else
 		n += rv;
 #endif
-
 #endif
+
 #if defined(CONFIG_USB_ETHER) && \
 	(!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_USBETH_SUPPORT))
 	if (is_valid_ethaddr(mac_addr0))

include/configs/am335x_nrhw20.h

@@ -17,19 +17,11 @@
 #ifndef __CONFIG_AM335X_NRHW20_H
 #define __CONFIG_AM335X_NRHW20_H
 
-/* TODO:
- * When this define is set, the code is still running on NBHW16
- * It allows to prepare stuff for NRHW20, without loosing test capability
- * on existing HW
- */
-
-/*
-#define NRHW20_ON_HW16_MODE
-*/
-
 #include <configs/ti_am335x_common.h>
 
+/*#define CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC*/
 #undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
+
 #undef CONFIG_HW_WATCHDOG
 #undef CONFIG_OMPAP_WATCHDOG
 #undef CONFIG_SPL_WATCHDOG_SUPPORT
@@ -104,29 +96,22 @@
 
 #endif
 
-/* NS16550 Configuration */
+/* UART Configuration */
-#define CONFIG_SYS_NS16550_COM1		0x44e09000	/* Base EVM has UART0 */
+#define CONFIG_SYS_NS16550_COM1		0x44e09000	/* UART0: XModem Boot, Shield */
-#define CONFIG_SYS_NS16550_COM2		0x48022000	/* UART1 */
+#define CONFIG_SYS_NS16550_COM2		0x48022000	/* UART1: eMMC Boot, User UART */
-#define CONFIG_SYS_NS16550_COM3		0x48024000	/* UART2 */
-#define CONFIG_SYS_NS16550_COM4		0x481a6000	/* UART3 */
-#define CONFIG_SYS_NS16550_COM5		0x481a8000	/* UART4 */
-#define CONFIG_SYS_NS16550_COM6		0x481aa000	/* UART5 */
-#define CONFIG_BAUDRATE			115200
-#define CONFIG_CONS_INDEX		1		/* Use UART1 as standard UART (1 = UART0) */
-/* TODO: Check whether CONFIG_CONS_INDEX can be removed --> menuconfig */
-
 
 #define CONFIG_I2C
 #define CONFIG_I2C_MULTI_BUS
 
 #define CONFIG_CMD_EEPROM
-/*#define CONFIG_SYS_I2C_EEPROM_BUS		2*/
+/* TODO: Why doesn't this work? #define CONFIG_SYS_I2C_EEPROM_BUS		2 */
 #define CONFIG_SYS_I2C_EEPROM_ADDR              0x50	/* Main EEPROM */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          2
 #define CONFIG_SYS_I2C_SPEED                    100000
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       4
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   50	/* TODO: Can this be reduced to 20ms */
 
+#if 0
 #define CONFIG_ENV_IS_IN_EEPROM
 #define CONFIG_I2C_ENV_EEPROM_BUS		0
 /* TODO: Broken, access to EEPROM is incredibly slow.
@@ -135,7 +120,23 @@
  */
 #define CONFIG_ENV_OFFSET			0x1000  /* The Environment is located at 4k */
 #define CONFIG_ENV_SIZE				0x800	/* The maximum size is 2k */
-/* TODO: Enalarge to 4kB */
+#endif
+
+#if 1 /* TODO: Check env in eMMC */
+#define CONFIG_ENV_OFFSET			(512 * 128)	/* @ 512*256 SPL starts */
+#define CONFIG_ENV_SIZE				(4 * 1024)
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV			1
+#endif
+
+#if 0
+
+#define CONFIG_SYS_MMC_ENV_PART		2
+#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+
+#endif
+
 
 #undef CONFIG_SPL_ENV_SUPPORT
 #undef CONFIG_SPL_NAND_SUPPORT
@@ -147,7 +148,7 @@
 #undef CONFIG_SPI_BOOT
 #undef CONFIG_SPL_OS_BOOT
 
-#define CONFIG_SPL_POWER_SUPPORT
+#define CONFIG_SPL_POWER_SUPPORT	/* TODO: Check */
 #define CONFIG_SPL_YMODEM_SUPPORT
 
 #define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/am33xx/u-boot-spl.lds"
@@ -213,7 +214,9 @@
 #endif
 
 /* USB Device Firmware Update support */
+#if 0
 #ifndef CONFIG_SPL_BUILD
+
 /* TODO: Check -> Remove */
 #define CONFIG_USB_FUNCTION_DFU
 #define CONFIG_DFU_MMC
@@ -242,13 +245,12 @@
 	DFU_ALT_INFO_MMC \
 	DFU_ALT_INFO_RAM \
 	DFU_ALT_INFO_NAND
+
+#endif
 #endif
 
 /* Network. */
-/* TODO: Check CONFIG_PHY_GIGE, we don't have GigE */
-#define CONFIG_PHY_GIGE
 #define CONFIG_PHYLIB
-#define CONFIG_PHY_SMSC
 
 #ifdef CONFIG_DRIVER_TI_CPSW
 #define CONFIG_CLOCK_SYNTHESIZER
@@ -260,13 +262,16 @@
 
 /* TODO: Check/remove */
 
+#if 0
 /* Enable support for TPS 65218 */
 #define CONFIG_POWER
 #define CONFIG_POWER_I2C
+
 #define CONFIG_POWER_TPS65218
 /* For compatibility reasons (BeagleBone) */
 #define CONFIG_POWER_TPS65217
 #define CONFIG_POWER_TPS62362
+#endif
 
 #define CONFIG_CMD_PXE
 
@@ -278,4 +283,17 @@
 #define CONFIG_MV88E60XX_PHY_PORTS	0x0F
 #define CONFIG_MV88E60XX_CPU_PORT	5
 
+/* TODO: RTC Bug -> Breaks boot... */
+/*#define CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC*/
+
+
+/*CONFIG_DM_PCA953X*/
+#define CONFIG_PCA953X
+#define CONFIG_SYS_I2C_PCA953X_BUS	2
+#define CONFIG_SYS_I2C_PCA953X_ADDR	0x74
+#define CONFIG_SYS_I2C_PCA953X_WIDTH	{ {0x74, 16} }
+#define CONFIG_CMD_PCA953X
+#define CONFIG_CMD_PCA953X_INFO
+
+
 #endif	/* ! __CONFIG_AM335X_NRHW20_H */