MLK-13929-2 video: Add mipi panel driver for hx8363
Add the mipi dsi panel driver for device HX8363 from kernel. The panel driver needs work with mipi_dsi_northwest driver. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 0c6d0f4202bae7f61d38ecff1c9d255261f022f2) (cherry picked from commit d65bbb0585a906072f01a2d72169be0b13b1d9b8)
This commit is contained in:
Ye Li
parent
a4f1e8b676
commit
86264cba4b
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@ -63,6 +63,7 @@ obj-$(CONFIG_VIDEO_CSI) += mxc_csi.o
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obj-$(CONFIG_VIDEO_PXP) += mxc_pxp.o
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obj-$(CONFIG_VIDEO_GIS) += mxc_gis.o
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obj-$(CONFIG_MXC_MIPI_DSI_NORTHWEST) += mipi_dsi_northwest.o
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obj-$(CONFIG_HX8363) += hx8363_wvga.o
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obj-y += bridge/
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obj-y += sunxi/
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@ -0,0 +1,148 @@
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/*
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* Copyright (C) 2016 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2017 NXP
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <mipi_dsi_northwest.h>
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#include <mipi_display.h>
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#define HX8363_TWO_DATA_LANE (0x2)
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#define HX8363_MAX_DPHY_CLK (800)
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#define HX8363_CMD_GETHXID (0xF4)
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#define HX8363_CMD_GETHXID_LEN (0x4)
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#define HX8363_ID (0x84)
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#define HX8363_ID_MASK (0xFF)
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#define CHECK_RETCODE(ret) \
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do { \
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if (ret < 0) { \
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printf("%s ERR: ret:%d, line:%d.\n", \
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__func__, ret, __LINE__); \
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return ret; \
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} \
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} while (0)
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static void parse_variadic(int n, u8 *buf, ...)
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{
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int i = 0;
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va_list args;
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if (unlikely(!n))
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return;
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va_start(args, buf);
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for (i = 0; i < n; i++)
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buf[i + 1] = (u8)va_arg(args, int);
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va_end(args);
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}
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#define TC358763_DCS_write_1A_nP(n, addr, ...) { \
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int err; \
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\
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buf[0] = addr; \
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parse_variadic(n, buf, ##__VA_ARGS__); \
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\
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if (n >= 2) \
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err = mipi_dsi->mipi_dsi_pkt_write(mipi_dsi, \
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MIPI_DSI_DCS_LONG_WRITE, (u32 *)buf, n + 1); \
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else if (n == 1) \
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err = mipi_dsi->mipi_dsi_pkt_write(mipi_dsi, \
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MIPI_DSI_DCS_SHORT_WRITE_PARAM, (u32 *)buf, 0); \
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else if (n == 0) { \
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buf[1] = 0; \
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err = mipi_dsi->mipi_dsi_pkt_write(mipi_dsi, \
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MIPI_DSI_DCS_SHORT_WRITE, (u32 *)buf, 0); \
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} \
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CHECK_RETCODE(err); \
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}
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#define TC358763_DCS_write_1A_0P(addr) \
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TC358763_DCS_write_1A_nP(0, addr)
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#define TC358763_DCS_write_1A_1P(addr, ...) \
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TC358763_DCS_write_1A_nP(1, addr, __VA_ARGS__)
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#define TC358763_DCS_write_1A_2P(addr, ...) \
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TC358763_DCS_write_1A_nP(2, addr, __VA_ARGS__)
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#define TC358763_DCS_write_1A_3P(addr, ...) \
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TC358763_DCS_write_1A_nP(3, addr, __VA_ARGS__)
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#define TC358763_DCS_write_1A_5P(addr, ...) \
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TC358763_DCS_write_1A_nP(5, addr, __VA_ARGS__)
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#define TC358763_DCS_write_1A_6P(addr, ...) \
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TC358763_DCS_write_1A_nP(6, addr, __VA_ARGS__)
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#define TC358763_DCS_write_1A_7P(addr, ...) \
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TC358763_DCS_write_1A_nP(7, addr, __VA_ARGS__)
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#define TC358763_DCS_write_1A_12P(addr, ...) \
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TC358763_DCS_write_1A_nP(12, addr, __VA_ARGS__)
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#define TC358763_DCS_write_1A_13P(addr, ...) \
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TC358763_DCS_write_1A_nP(13, addr, __VA_ARGS__)
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#define TC358763_DCS_write_1A_14P(addr, ...) \
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TC358763_DCS_write_1A_nP(14, addr, __VA_ARGS__)
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#define TC358763_DCS_write_1A_19P(addr, ...) \
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TC358763_DCS_write_1A_nP(19, addr, __VA_ARGS__)
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#define TC358763_DCS_write_1A_34P(addr, ...) \
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TC358763_DCS_write_1A_nP(34, addr, __VA_ARGS__)
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#define TC358763_DCS_write_1A_127P(addr, ...) \
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TC358763_DCS_write_1A_nP(127, addr, __VA_ARGS__)
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int mipid_hx8363_lcd_setup(struct mipi_dsi_northwest_panel_device *panel_dev)
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{
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u8 buf[DSI_CMD_BUF_MAXSIZE];
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struct mipi_dsi_northwest_info *mipi_dsi = panel_dev->host;
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debug("MIPI DSI LCD HX8363 setup.\n");
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TC358763_DCS_write_1A_3P(0xB9, 0xFF, 0x83, 0x63);/* SET password */
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TC358763_DCS_write_1A_19P(0xB1, 0x01, 0x00, 0x44, 0x08, 0x01, 0x10, 0x10, 0x36,
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0x3E, 0x1A, 0x1A, 0x40, 0x12, 0x00, 0xE6, 0xE6, 0xE6, 0xE6, 0xE6);/* Set Power */
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TC358763_DCS_write_1A_2P(0xB2, 0x08, 0x03);/* Set DISP */
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TC358763_DCS_write_1A_7P(0xB4, 0x02, 0x18, 0x9C, 0x08, 0x18, 0x04, 0x6C);
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TC358763_DCS_write_1A_1P(0xB6, 0x00);/* Set VCOM */
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TC358763_DCS_write_1A_1P(0xCC, 0x0B);/* Set Panel */
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TC358763_DCS_write_1A_34P(0xE0, 0x0E, 0x15, 0x19, 0x30, 0x31, 0x3F, 0x27, 0x3C, 0x88, 0x8F, 0xD1, 0xD5, 0xD7, 0x16, 0x16,
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0x0C, 0x1E, 0x0E, 0x15, 0x19, 0x30, 0x31, 0x3F, 0x27, 0x3C, 0x88, 0x8F,
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0xD1, 0xD5, 0xD7, 0x16, 0x16, 0x0C, 0x1E);
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mdelay(5);
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TC358763_DCS_write_1A_1P(0x3A, 0x77);/* 24bit */
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TC358763_DCS_write_1A_14P(0xBA, 0x11, 0x00, 0x56, 0xC6, 0x10, 0x89, 0xFF, 0x0F, 0x32, 0x6E, 0x04, 0x07, 0x9A, 0x92);
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TC358763_DCS_write_1A_0P(0x21);
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TC358763_DCS_write_1A_0P(0x11);
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mdelay(10);
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TC358763_DCS_write_1A_0P(0x29);
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mdelay(120);
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return 0;
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}
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static struct mipi_dsi_northwest_panel_driver hx8363_drv = {
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.name = "HX8363_WVGA",
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.mipi_panel_setup = mipid_hx8363_lcd_setup,
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};
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void hx8363_init(void)
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{
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mipi_dsi_northwest_register_panel_driver(&hx8363_drv);
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}
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@ -957,6 +957,7 @@ CONFIG_HUSH_INIT_VAR
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CONFIG_HVBOOT
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CONFIG_HWCONFIG
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CONFIG_HW_ENV_SETTINGS
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CONFIG_HX8363
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CONFIG_I2C
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CONFIG_I2C_CHIPADDRESS
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CONFIG_I2C_CMD_TREE
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