ARM: imx: m53menlo: Convert MMC, USB and block to DM
Enable DM block and DM MMC and DM USB support on iMX53 M53Menlo . Convert board code to match the DM support. This also enables DM pincontrol to configure the SDHI pins. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
This commit is contained in:
Marek Vasut
Stefano Babic
parent
9b352ae1ae
commit
86aa7103b6
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@ -80,35 +80,6 @@ static void setup_iomux_uart(void)
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imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
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imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
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}
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}
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#ifdef CONFIG_USB_EHCI_MX5
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int board_ehci_hcd_init(int port)
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{
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if (port == 0) {
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/* USB OTG PWRON */
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imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX53_PAD_GPIO_4__GPIO1_4,
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PAD_CTL_PKE |
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PAD_CTL_DSE_HIGH));
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gpio_request(IMX_GPIO_NR(1, 4), "USB_OTG_PWRON");
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gpio_direction_output(IMX_GPIO_NR(1, 4), 0);
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/* USB OTG Over Current */
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imx_iomux_v3_setup_pad(MX53_PAD_GPIO_18__GPIO7_13);
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} else if (port == 1) {
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/* USB Host PWRON */
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imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX53_PAD_GPIO_2__GPIO1_2,
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PAD_CTL_PKE |
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PAD_CTL_DSE_HIGH));
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gpio_request(IMX_GPIO_NR(1, 2), "USB_HOST_PWRON");
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gpio_direction_output(IMX_GPIO_NR(1, 2), 0);
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/* USB Host Over Current */
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imx_iomux_v3_setup_pad(MX53_PAD_GPIO_3__USBOH3_USBH1_OC);
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}
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return 0;
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}
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#endif
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static void setup_iomux_fec(void)
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static void setup_iomux_fec(void)
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{
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{
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static const iomux_v3_cfg_t fec_pads[] = {
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static const iomux_v3_cfg_t fec_pads[] = {
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@ -152,43 +123,6 @@ static void setup_iomux_fec(void)
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imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
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imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
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}
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}
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#ifdef CONFIG_FSL_ESDHC
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struct fsl_esdhc_cfg esdhc_cfg = {
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MMC_SDHC1_BASE_ADDR,
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};
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int board_mmc_getcd(struct mmc *mmc)
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{
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imx_iomux_v3_setup_pad(MX53_PAD_GPIO_1__GPIO1_1);
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gpio_direction_input(IMX_GPIO_NR(1, 1));
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return !gpio_get_value(IMX_GPIO_NR(1, 1));
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}
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#define SD_CMD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \
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PAD_CTL_PUS_100K_UP)
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#define SD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | \
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PAD_CTL_DSE_HIGH)
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int board_mmc_init(bd_t *bis)
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{
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static const iomux_v3_cfg_t sd1_pads[] = {
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NEW_PAD_CTRL(MX53_PAD_SD1_CMD__ESDHC1_CMD, SD_CMD_PAD_CTRL),
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NEW_PAD_CTRL(MX53_PAD_SD1_CLK__ESDHC1_CLK, SD_PAD_CTRL),
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NEW_PAD_CTRL(MX53_PAD_SD1_DATA0__ESDHC1_DAT0, SD_PAD_CTRL),
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NEW_PAD_CTRL(MX53_PAD_SD1_DATA1__ESDHC1_DAT1, SD_PAD_CTRL),
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NEW_PAD_CTRL(MX53_PAD_SD1_DATA2__ESDHC1_DAT2, SD_PAD_CTRL),
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NEW_PAD_CTRL(MX53_PAD_SD1_DATA3__ESDHC1_DAT3, SD_PAD_CTRL),
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};
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esdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
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imx_iomux_v3_setup_multiple_pads(sd1_pads, ARRAY_SIZE(sd1_pads));
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return fsl_esdhc_initialize(bis, &esdhc_cfg);
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}
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#endif
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#ifdef CONFIG_VIDEO
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#ifdef CONFIG_VIDEO
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static void enable_lvds_clock(struct display_info_t const *dev, const u8 hclk)
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static void enable_lvds_clock(struct display_info_t const *dev, const u8 hclk)
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{
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{
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@ -28,12 +28,14 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y
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CONFIG_HUSH_PARSER=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_ASKENV=y
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CONFIG_CMD_ASKENV=y
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CONFIG_CMD_GREPENV=y
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CONFIG_CMD_GREPENV=y
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CONFIG_CMD_DM=y
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# CONFIG_CMD_FLASH is not set
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_FUSE=y
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CONFIG_CMD_FUSE=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_NAND_TRIMFFS=y
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CONFIG_CMD_NAND_TRIMFFS=y
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# CONFIG_CMD_PINMUX is not set
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CONFIG_CMD_USB=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_MII=y
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@ -58,14 +60,21 @@ CONFIG_BOOTCOUNT_LIMIT=y
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CONFIG_BOOTCOUNT_BOOTLIMIT=3
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CONFIG_BOOTCOUNT_BOOTLIMIT=3
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CONFIG_SYS_BOOTCOUNT_MAGIC=0x0B01C041
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CONFIG_SYS_BOOTCOUNT_MAGIC=0x0B01C041
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CONFIG_DM_GPIO=y
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CONFIG_DM_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_FSL_ESDHC=y
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CONFIG_FSL_ESDHC=y
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CONFIG_NAND=y
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CONFIG_NAND=y
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CONFIG_NAND_MXC=y
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CONFIG_NAND_MXC=y
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CONFIG_PHYLIB=y
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CONFIG_PHYLIB=y
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CONFIG_PHY_MICREL=y
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CONFIG_PHY_MICREL=y
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CONFIG_PHY_MICREL_KSZ8XXX=y
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CONFIG_PHY_MICREL_KSZ8XXX=y
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CONFIG_PINCTRL=y
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CONFIG_PINCTRL_IMX5=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_DM_REGULATOR_GPIO=y
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CONFIG_RTC_M41T62=y
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CONFIG_RTC_M41T62=y
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CONFIG_USB=y
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CONFIG_USB=y
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CONFIG_DM_USB=y
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CONFIG_USB_EHCI_MX5=y
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CONFIG_USB_EHCI_MX5=y
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CONFIG_USB_STORAGE=y
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CONFIG_USB_STORAGE=y
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CONFIG_USB_HOST_ETHER=y
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CONFIG_USB_HOST_ETHER=y
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