doc: board: Move j721e document to doc/board/ti/ directory
Move j721e document from board/ti/j721e/README to doc/board/ti/j721e_evm.rst after converting it to RST format. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210721155849.20994-20-kishon@ti.com
This commit is contained in:
Kishon Vijay Abraham I
Lokesh Vutla
parent
8fa3286408
commit
8baeeecbe3
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@ -1,277 +0,0 @@
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Introduction:
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-------------
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The J721e family of SoCs are part of K3 Multicore SoC architecture platform
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targeting automotive applications. They are designed as a low power, high
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performance and highly integrated device architecture, adding significant
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enhancement on processing power, graphics capability, video and imaging
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processing, virtualization and coherent memory support.
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The device is partitioned into three functional domains, each containing
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specific processing cores and peripherals:
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1. Wake-up (WKUP) domain:
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- Device Management and Security Controller (DMSC)
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2. Microcontroller (MCU) domain:
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- Dual Core ARM Cortex-R5F processor
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3. MAIN domain:
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- Dual core 64-bit ARM Cortex-A72
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- 2 x Dual cortex ARM Cortex-R5 subsystem
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- 2 x C66x Digital signal processor sub system
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- C71x Digital signal processor sub-system with MMA.
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More info can be found in TRM: http://www.ti.com/lit/pdf/spruil1
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Boot Flow:
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----------
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Boot flow is similar to that of AM65x SoC and extending it with remoteproc
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support. Below is the pictorial representation of boot flow:
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+------------------------------------------------------------------------+-----------------------+
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| DMSC | MCU R5 | A72 | MAIN R5/C66x/C7x |
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+------------------------------------------------------------------------+-----------------------+
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| +--------+ | | | |
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| | Reset | | | | |
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| +--------+ | | | |
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| : | | | |
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| +--------+ | +-----------+ | | |
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| | *ROM* |----------|-->| Reset rls | | | |
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| +--------+ | +-----------+ | | |
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| | | | : | | |
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| | ROM | | : | | |
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| |services| | : | | |
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| | | | +-------------+ | | |
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| | | | | *R5 ROM* | | | |
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| | | | +-------------+ | | |
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| | |<---------|---|Load and auth| | | |
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| | | | | tiboot3.bin | | | |
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| | | | +-------------+ | | |
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| | | | : | | |
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| | | | : | | |
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| | | | : | | |
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| | | | +-------------+ | | |
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| | | | | *R5 SPL* | | | |
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| | | | +-------------+ | | |
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| | | | | Load | | | |
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| | | | | sysfw.itb | | | |
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| | Start | | +-------------+ | | |
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| | System |<---------|---| Start | | | |
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| |Firmware| | | SYSFW | | | |
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| +--------+ | +-------------+ | | |
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| : | | | | | |
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| +---------+ | | Load | | | |
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| | *SYSFW* | | | system | | | |
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| +---------+ | | Config data | | | |
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| | |<--------|---| | | | |
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| | | | +-------------+ | | |
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| | | | | DDR | | | |
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| | | | | config | | | |
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| | | | +-------------+ | | |
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| | | | | Load | | | |
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| | | | | tispl.bin | | | |
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| | | | +-------------+ | | |
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| | | | | Load R5 | | | |
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| | | | | firmware | | | |
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| | | | +-------------+ | | |
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| | |<--------|---| Start A72 | | | |
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| | | | | and jump to | | | |
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| | | | | DM fw image | | | |
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| | | | +-------------+ | | |
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| | | | | +-----------+ | |
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| | |---------|-----------------------|---->| Reset rls | | |
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| | | | | +-----------+ | |
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| | TIFS | | | : | |
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| |Services | | | +-----------+ | |
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| | |<--------|-----------------------|---->|*ATF/OPTEE*| | |
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| | | | | +-----------+ | |
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| | | | | : | |
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| | | | | +-----------+ | |
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| | |<--------|-----------------------|---->| *A72 SPL* | | |
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| | | | | +-----------+ | |
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| | | | | | Load | | |
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| | | | | | u-boot.img| | |
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| | | | | +-----------+ | |
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| | | | | : | |
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| | | | | +-----------+ | |
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| | |<--------|-----------------------|---->| *U-Boot* | | |
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| | | | | +-----------+ | |
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| | | | | | prompt | | |
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| | | | | +-----------+ | |
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| | | | | | Load R5 | | |
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| | | | | | Firmware | | |
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| | | | | +-----------+ | |
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| | |<--------|-----------------------|-----| Start R5 | | +-----------+ |
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| | |---------|-----------------------|-----+-----------+-----|----->| R5 starts | |
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| | | | | | Load C6 | | +-----------+ |
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| | | | | | Firmware | | |
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| | | | | +-----------+ | |
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| | |<--------|-----------------------|-----| Start C6 | | +-----------+ |
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| | |---------|-----------------------|-----+-----------+-----|----->| C6 starts | |
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| | | | | | Load C7 | | +-----------+ |
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| | | | | | Firmware | | |
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| | | | | +-----------+ | |
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| | |<--------|-----------------------|-----| Start C7 | | +-----------+ |
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| | |---------|-----------------------|-----+-----------+-----|----->| C7 starts | |
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| +---------+ | | | +-----------+ |
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| | | | |
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+------------------------------------------------------------------------+-----------------------+
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- Here DMSC acts as master and provides all the critical services. R5/A72
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requests DMSC to get these services done as shown in the above diagram.
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Sources:
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--------
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1. SYSFW:
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Tree: git://git.ti.com/k3-image-gen/k3-image-gen.git
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Branch: master
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2. ATF:
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Tree: https://github.com/ARM-software/arm-trusted-firmware.git
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Branch: master
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3. OPTEE:
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Tree: https://github.com/OP-TEE/optee_os.git
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Branch: master
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4. U-Boot:
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Tree: https://source.denx.de/u-boot/u-boot
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Branch: master
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Build procedure:
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----------------
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1. SYSFW:
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$ make CROSS_COMPILE=arm-linux-gnueabihf-
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2. ATF:
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$ make CROSS_COMPILE=aarch64-linux-gnu- ARCH=aarch64 PLAT=k3 TARGET_BOARD=generic SPD=opteed
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3. OPTEE:
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$ make PLATFORM=k3-j721e CFG_ARM64_core=y
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4. U-Boot:
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4.1. R5:
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$ make CROSS_COMPILE=arm-linux-gnueabihf- j721e_evm_r5_defconfig O=/tmp/r5
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$ make CROSS_COMPILE=arm-linux-gnueabihf- O=/tmp/r5
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4.2. A72:
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$ make CROSS_COMPILE=aarch64-linux-gnu- j721e_evm_a72_defconfig O=/tmp/a72
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$ make CROSS_COMPILE=aarch64-linux-gnu- ATF=<path to ATF dir>/build/k3/generic/release/bl31.bin TEE=<path to OPTEE OS dir>/out/arm-plat-k3/core/tee-pager_v2.bin DM=<path to DM firmware image> O=/tmp/a72
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Target Images
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--------------
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Copy the below images to an SD card and boot:
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- sysfw.itb from step 1
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- tiboot3.bin from step 4.1
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- tispl.bin, u-boot.img from 4.2
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Image formats:
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--------------
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- tiboot3.bin:
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+-----------------------+
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| X.509 |
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| Certificate |
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| +-------------------+ |
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| | | |
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| | R5 | |
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| | u-boot-spl.bin | |
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| | | |
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| +-------------------+ |
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| | | |
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| | FIT header | |
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| | +---------------+ | |
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| | | | | |
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| | | DTB 1...N | | |
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| | +---------------+ | |
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| +-------------------+ |
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+-----------------------+
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- tispl.bin
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+-----------------------+
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| |
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| FIT HEADER |
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| +-------------------+ |
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| | | |
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| | A72 ATF | |
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| +-------------------+ |
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| | | |
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| | A72 OPTEE | |
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| +-------------------+ |
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| | | |
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| | R5 DM FW | |
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| +-------------------+ |
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| | | |
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| | A72 SPL | |
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| +-------------------+ |
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| | | |
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| | SPL DTB 1...N | |
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| +-------------------+ |
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+-----------------------+
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- sysfw.itb
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+-----------------------+
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| |
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| FIT HEADER |
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| +-------------------+ |
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| | | |
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| | sysfw.bin | |
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| +-------------------+ |
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| | | |
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| | board config | |
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| +-------------------+ |
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| | | |
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| | PM config | |
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| +-------------------+ |
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| | | |
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| | RM config | |
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| +-------------------+ |
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| | | |
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| | Secure config | |
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| +-------------------+ |
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+-----------------------+
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OSPI:
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-----
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ROM supports booting from OSPI from offset 0x0.
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Flashing images to OSPI:
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Below commands can be used to download tiboot3.bin, tispl.bin, u-boot.img,
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and sysfw.itb over tftp and then flash those to OSPI at their respective
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addresses.
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=> sf probe
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=> tftp ${loadaddr} tiboot3.bin
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=> sf update $loadaddr 0x0 $filesize
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=> tftp ${loadaddr} tispl.bin
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=> sf update $loadaddr 0x80000 $filesize
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=> tftp ${loadaddr} u-boot.img
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=> sf update $loadaddr 0x280000 $filesize
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=> tftp ${loadaddr} sysfw.itb
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=> sf update $loadaddr 0x6C0000 $filesize
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Flash layout for OSPI:
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0x0 +----------------------------+
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| ospi.tiboot3(512K) |
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| |
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0x80000 +----------------------------+
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| ospi.tispl(2M) |
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| |
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0x280000 +----------------------------+
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| ospi.u-boot(4M) |
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| |
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0x680000 +----------------------------+
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| ospi.env(128K) |
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| |
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0x6A0000 +----------------------------+
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| ospi.env.backup (128K) |
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| |
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0x6C0000 +----------------------------+
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| ospi.sysfw(1M) |
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| |
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0x7C0000 +----------------------------+
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| padding (256k) |
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0x800000 +----------------------------+
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| ospi.rootfs(UBIFS) |
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| |
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+----------------------------+
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@ -27,6 +27,7 @@ Board-specific doc
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socionext/index
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st/index
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tbs/index
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ti/index
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toradex/index
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xen/index
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xilinx/index
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|
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@ -0,0 +1,316 @@
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.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
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.. sectionauthor:: Lokesh Vutla <lokeshvutla@ti.com>
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Texas Instruments K3 Platforms
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==============================
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Introduction:
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-------------
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The J721e family of SoCs are part of K3 Multicore SoC architecture platform
|
||||
targeting automotive applications. They are designed as a low power, high
|
||||
performance and highly integrated device architecture, adding significant
|
||||
enhancement on processing power, graphics capability, video and imaging
|
||||
processing, virtualization and coherent memory support.
|
||||
|
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The device is partitioned into three functional domains, each containing
|
||||
specific processing cores and peripherals:
|
||||
|
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1. Wake-up (WKUP) domain:
|
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* Device Management and Security Controller (DMSC)
|
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|
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2. Microcontroller (MCU) domain:
|
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* Dual Core ARM Cortex-R5F processor
|
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|
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3. MAIN domain:
|
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* Dual core 64-bit ARM Cortex-A72
|
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* 2 x Dual cortex ARM Cortex-R5 subsystem
|
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* 2 x C66x Digital signal processor sub system
|
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* C71x Digital signal processor sub-system with MMA.
|
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|
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More info can be found in TRM: http://www.ti.com/lit/pdf/spruil1
|
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|
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Boot Flow:
|
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----------
|
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Boot flow is similar to that of AM65x SoC and extending it with remoteproc
|
||||
support. Below is the pictorial representation of boot flow:
|
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|
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.. code-block:: text
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+------------------------------------------------------------------------+-----------------------+
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| DMSC | MCU R5 | A72 | MAIN R5/C66x/C7x |
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+------------------------------------------------------------------------+-----------------------+
|
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| +--------+ | | | |
|
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| | Reset | | | | |
|
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| +--------+ | | | |
|
||||
| : | | | |
|
||||
| +--------+ | +-----------+ | | |
|
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| | *ROM* |----------|-->| Reset rls | | | |
|
||||
| +--------+ | +-----------+ | | |
|
||||
| | | | : | | |
|
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| | ROM | | : | | |
|
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| |services| | : | | |
|
||||
| | | | +-------------+ | | |
|
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| | | | | *R5 ROM* | | | |
|
||||
| | | | +-------------+ | | |
|
||||
| | |<---------|---|Load and auth| | | |
|
||||
| | | | | tiboot3.bin | | | |
|
||||
| | | | +-------------+ | | |
|
||||
| | | | : | | |
|
||||
| | | | : | | |
|
||||
| | | | : | | |
|
||||
| | | | +-------------+ | | |
|
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| | | | | *R5 SPL* | | | |
|
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| | | | +-------------+ | | |
|
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| | | | | Load | | | |
|
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| | | | | sysfw.itb | | | |
|
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| | Start | | +-------------+ | | |
|
||||
| | System |<---------|---| Start | | | |
|
||||
| |Firmware| | | SYSFW | | | |
|
||||
| +--------+ | +-------------+ | | |
|
||||
| : | | | | | |
|
||||
| +---------+ | | Load | | | |
|
||||
| | *SYSFW* | | | system | | | |
|
||||
| +---------+ | | Config data | | | |
|
||||
| | |<--------|---| | | | |
|
||||
| | | | +-------------+ | | |
|
||||
| | | | | DDR | | | |
|
||||
| | | | | config | | | |
|
||||
| | | | +-------------+ | | |
|
||||
| | | | | Load | | | |
|
||||
| | | | | tispl.bin | | | |
|
||||
| | | | +-------------+ | | |
|
||||
| | | | | Load R5 | | | |
|
||||
| | | | | firmware | | | |
|
||||
| | | | +-------------+ | | |
|
||||
| | |<--------|---| Start A72 | | | |
|
||||
| | | | | and jump to | | | |
|
||||
| | | | | DM fw image | | | |
|
||||
| | | | +-------------+ | | |
|
||||
| | | | | +-----------+ | |
|
||||
| | |---------|-----------------------|---->| Reset rls | | |
|
||||
| | | | | +-----------+ | |
|
||||
| | TIFS | | | : | |
|
||||
| |Services | | | +-----------+ | |
|
||||
| | |<--------|-----------------------|---->|*ATF/OPTEE*| | |
|
||||
| | | | | +-----------+ | |
|
||||
| | | | | : | |
|
||||
| | | | | +-----------+ | |
|
||||
| | |<--------|-----------------------|---->| *A72 SPL* | | |
|
||||
| | | | | +-----------+ | |
|
||||
| | | | | | Load | | |
|
||||
| | | | | | u-boot.img| | |
|
||||
| | | | | +-----------+ | |
|
||||
| | | | | : | |
|
||||
| | | | | +-----------+ | |
|
||||
| | |<--------|-----------------------|---->| *U-Boot* | | |
|
||||
| | | | | +-----------+ | |
|
||||
| | | | | | prompt | | |
|
||||
| | | | | +-----------+ | |
|
||||
| | | | | | Load R5 | | |
|
||||
| | | | | | Firmware | | |
|
||||
| | | | | +-----------+ | |
|
||||
| | |<--------|-----------------------|-----| Start R5 | | +-----------+ |
|
||||
| | |---------|-----------------------|-----+-----------+-----|----->| R5 starts | |
|
||||
| | | | | | Load C6 | | +-----------+ |
|
||||
| | | | | | Firmware | | |
|
||||
| | | | | +-----------+ | |
|
||||
| | |<--------|-----------------------|-----| Start C6 | | +-----------+ |
|
||||
| | |---------|-----------------------|-----+-----------+-----|----->| C6 starts | |
|
||||
| | | | | | Load C7 | | +-----------+ |
|
||||
| | | | | | Firmware | | |
|
||||
| | | | | +-----------+ | |
|
||||
| | |<--------|-----------------------|-----| Start C7 | | +-----------+ |
|
||||
| | |---------|-----------------------|-----+-----------+-----|----->| C7 starts | |
|
||||
| +---------+ | | | +-----------+ |
|
||||
| | | | |
|
||||
+------------------------------------------------------------------------+-----------------------+
|
||||
|
||||
- Here DMSC acts as master and provides all the critical services. R5/A72
|
||||
requests DMSC to get these services done as shown in the above diagram.
|
||||
|
||||
Sources:
|
||||
--------
|
||||
1. SYSFW:
|
||||
Tree: git://git.ti.com/k3-image-gen/k3-image-gen.git
|
||||
Branch: master
|
||||
|
||||
2. ATF:
|
||||
Tree: https://github.com/ARM-software/arm-trusted-firmware.git
|
||||
Branch: master
|
||||
|
||||
3. OPTEE:
|
||||
Tree: https://github.com/OP-TEE/optee_os.git
|
||||
Branch: master
|
||||
|
||||
4. U-Boot:
|
||||
Tree: https://source.denx.de/u-boot/u-boot
|
||||
Branch: master
|
||||
|
||||
Build procedure:
|
||||
----------------
|
||||
1. SYSFW:
|
||||
|
||||
.. code-block:: text
|
||||
|
||||
$ make CROSS_COMPILE=arm-linux-gnueabihf-
|
||||
|
||||
2. ATF:
|
||||
|
||||
.. code-block:: text
|
||||
|
||||
$ make CROSS_COMPILE=aarch64-linux-gnu- ARCH=aarch64 PLAT=k3 TARGET_BOARD=generic SPD=opteed
|
||||
|
||||
3. OPTEE:
|
||||
|
||||
.. code-block:: text
|
||||
|
||||
$ make PLATFORM=k3-j721e CFG_ARM64_core=y
|
||||
|
||||
4. U-Boot:
|
||||
|
||||
* 4.1 R5:
|
||||
|
||||
.. code-block:: text
|
||||
|
||||
$ make CROSS_COMPILE=arm-linux-gnueabihf- j721e_evm_r5_defconfig O=/tmp/r5
|
||||
$ make CROSS_COMPILE=arm-linux-gnueabihf- O=/tmp/r5
|
||||
|
||||
* 4.2 A72:
|
||||
|
||||
.. code-block:: text
|
||||
|
||||
$ make CROSS_COMPILE=aarch64-linux-gnu- j721e_evm_a72_defconfig O=/tmp/a72
|
||||
$ make CROSS_COMPILE=aarch64-linux-gnu- ATF=<path to ATF dir>/build/k3/generic/release/bl31.bin TEE=<path to OPTEE OS dir>/out/arm-plat-k3/core/tee-pager_v2.bin DM=<path to DM firmware image> O=/tmp/a72
|
||||
|
||||
Target Images
|
||||
--------------
|
||||
Copy the below images to an SD card and boot:
|
||||
- sysfw.itb from step 1
|
||||
- tiboot3.bin from step 4.1
|
||||
- tispl.bin, u-boot.img from 4.2
|
||||
|
||||
Image formats:
|
||||
--------------
|
||||
|
||||
- tiboot3.bin:
|
||||
|
||||
.. code-block:: text
|
||||
|
||||
+-----------------------+
|
||||
| X.509 |
|
||||
| Certificate |
|
||||
| +-------------------+ |
|
||||
| | | |
|
||||
| | R5 | |
|
||||
| | u-boot-spl.bin | |
|
||||
| | | |
|
||||
| +-------------------+ |
|
||||
| | | |
|
||||
| | FIT header | |
|
||||
| | +---------------+ | |
|
||||
| | | | | |
|
||||
| | | DTB 1...N | | |
|
||||
| | +---------------+ | |
|
||||
| +-------------------+ |
|
||||
+-----------------------+
|
||||
|
||||
- tispl.bin
|
||||
|
||||
.. code-block:: text
|
||||
|
||||
+-----------------------+
|
||||
| |
|
||||
| FIT HEADER |
|
||||
| +-------------------+ |
|
||||
| | | |
|
||||
| | A72 ATF | |
|
||||
| +-------------------+ |
|
||||
| | | |
|
||||
| | A72 OPTEE | |
|
||||
| +-------------------+ |
|
||||
| | | |
|
||||
| | R5 DM FW | |
|
||||
| +-------------------+ |
|
||||
| | | |
|
||||
| | A72 SPL | |
|
||||
| +-------------------+ |
|
||||
| | | |
|
||||
| | SPL DTB 1...N | |
|
||||
| +-------------------+ |
|
||||
+-----------------------+
|
||||
|
||||
- sysfw.itb
|
||||
|
||||
.. code-block:: text
|
||||
|
||||
+-----------------------+
|
||||
| |
|
||||
| FIT HEADER |
|
||||
| +-------------------+ |
|
||||
| | | |
|
||||
| | sysfw.bin | |
|
||||
| +-------------------+ |
|
||||
| | | |
|
||||
| | board config | |
|
||||
| +-------------------+ |
|
||||
| | | |
|
||||
| | PM config | |
|
||||
| +-------------------+ |
|
||||
| | | |
|
||||
| | RM config | |
|
||||
| +-------------------+ |
|
||||
| | | |
|
||||
| | Secure config | |
|
||||
| +-------------------+ |
|
||||
+-----------------------+
|
||||
|
||||
OSPI:
|
||||
-----
|
||||
ROM supports booting from OSPI from offset 0x0.
|
||||
|
||||
Flashing images to OSPI:
|
||||
|
||||
Below commands can be used to download tiboot3.bin, tispl.bin, u-boot.img,
|
||||
and sysfw.itb over tftp and then flash those to OSPI at their respective
|
||||
addresses.
|
||||
|
||||
.. code-block:: text
|
||||
|
||||
=> sf probe
|
||||
=> tftp ${loadaddr} tiboot3.bin
|
||||
=> sf update $loadaddr 0x0 $filesize
|
||||
=> tftp ${loadaddr} tispl.bin
|
||||
=> sf update $loadaddr 0x80000 $filesize
|
||||
=> tftp ${loadaddr} u-boot.img
|
||||
=> sf update $loadaddr 0x280000 $filesize
|
||||
=> tftp ${loadaddr} sysfw.itb
|
||||
=> sf update $loadaddr 0x6C0000 $filesize
|
||||
|
||||
Flash layout for OSPI:
|
||||
|
||||
.. code-block:: text
|
||||
|
||||
0x0 +----------------------------+
|
||||
| ospi.tiboot3(512K) |
|
||||
| |
|
||||
0x80000 +----------------------------+
|
||||
| ospi.tispl(2M) |
|
||||
| |
|
||||
0x280000 +----------------------------+
|
||||
| ospi.u-boot(4M) |
|
||||
| |
|
||||
0x680000 +----------------------------+
|
||||
| ospi.env(128K) |
|
||||
| |
|
||||
0x6A0000 +----------------------------+
|
||||
| ospi.env.backup (128K) |
|
||||
| |
|
||||
0x6C0000 +----------------------------+
|
||||
| ospi.sysfw(1M) |
|
||||
| |
|
||||
0x7C0000 +----------------------------+
|
||||
| padding (256k) |
|
||||
0x800000 +----------------------------+
|
||||
| ospi.rootfs(UBIFS) |
|
||||
| |
|
||||
+----------------------------+
|
||||
Loading…
Reference in New Issue